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BibTeX records: Yuyun Liao
@article{DBLP:journals/jssc/MeinerzhagenTMV19, author = {Pascal Andreas Meinerzhagen and Carlos Tokunaga and Andres Malavasi and Vaibhav A. Vaidya and Ashwin Mendon and Deepak Mathaikutty and Jaydeep Kulkarni and Charles Augustine and Minki Cho and Stephen T. Kim and George E. Matthew and Rinkle Jain and Joseph F. Ryan and Chung{-}Ching Peng and Somnath Paul and Sriram R. Vangal and Brando Perez Esparza and Luis Cuellar and Michael Woodman and Bala Iyer and Subramaniam Maiyuran and Gautham N. Chinya and Xiang Zou and Yuyun Liao and Krishnan Ravichandran and Hong Wang and Muhammad M. Khellah and James W. Tschanz and Vivek De}, title = {An Energy-Efficient Graphics Processor in 14-nm Tri-Gate {CMOS} Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and {\textdollar}\{V\}{\_}\{{\textbackslash}text\{MIN\}\}{\textdollar} Optimization}, journal = {{IEEE} J. Solid State Circuits}, volume = {54}, number = {1}, pages = {144--157}, year = {2019}, url = {https://doi.org/10.1109/JSSC.2018.2875097}, doi = {10.1109/JSSC.2018.2875097}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/MeinerzhagenTMV19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/micro/DaviesSLCCCDJIJ18, author = {Mike Davies and Narayan Srinivasa and Tsung{-}Han Lin and Gautham N. Chinya and Yongqiang Cao and Sri Harsha Choday and Georgios D. Dimou and Prasad Joshi and Nabil Imam and Shweta Jain and Yuyun Liao and Chit{-}Kwan Lin and Andrew Lines and Ruokun Liu and Deepak Mathaikutty and Steven McCoy and Arnab Paul and Jonathan Tse and Guruguhanathan Venkataramanan and Yi{-}Hsin Weng and Andreas Wild and Yoonseok Yang and Hong Wang}, title = {Loihi: {A} Neuromorphic Manycore Processor with On-Chip Learning}, journal = {{IEEE} Micro}, volume = {38}, number = {1}, pages = {82--99}, year = {2018}, url = {https://doi.org/10.1109/MM.2018.112130359}, doi = {10.1109/MM.2018.112130359}, timestamp = {Sun, 02 Jun 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/micro/DaviesSLCCCDJIJ18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/MeinerzhagenTMV18, author = {Pascal Meinerzhagen and Carlos Tokunaga and Andres Malavasi and Vaibhav A. Vaidya and Ashwin Mendon and Deepak Mathaikutty and Jaydeep Kulkarni and Charles Augustine and Minki Cho and Stephen T. Kim and George E. Matthew and Rinkle Jain and Joseph F. Ryan and Chung{-}Ching Peng and Somnath Paul and Sriram R. Vangal and Brando Perez Esparza and Luis Cuellar and Michael Woodman and Bala Iyer and Subramaniam Maiyuran and Gautham N. Chinya and Chris Zou and Yuyun Liao and Krishnan Ravichandran and Hong Wang and Muhammad M. Khellah and James W. Tschanz and Vivek De}, title = {An energy-efficient graphics processor featuring fine-grain {DVFS} with integrated voltage regulators, execution-unit turbo, and retentive sleep in 14nm tri-gate {CMOS}}, booktitle = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2018, San Francisco, CA, USA, February 11-15, 2018}, pages = {38--40}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.1109/ISSCC.2018.8310172}, doi = {10.1109/ISSCC.2018.8310172}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isscc/MeinerzhagenTMV18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/LiaoR02, author = {Yuyun Liao and David B. Roberts}, title = {A high-performance and low-power 32-bit multiply-accumulate unit with single-instruction-multiple-data {(SIMD)} feature}, journal = {{IEEE} J. Solid State Circuits}, volume = {37}, number = {7}, pages = {926--931}, year = {2002}, url = {https://doi.org/10.1109/JSSC.2002.1015692}, doi = {10.1109/JSSC.2002.1015692}, timestamp = {Mon, 04 Apr 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/LiaoR02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/ClarkHMBLSMVY01, author = {Lawrence T. Clark and Eric J. Hoffman and Jay B. Miller and Manish Biyani and Yuyun Liao and Stephen J. Strazdus and Michael Morrow and Kimberley E. Velarde and Mark A. Yarch}, title = {An embedded 32-b microprocessor core for low-power and high-performance applications}, journal = {{IEEE} J. Solid State Circuits}, volume = {36}, number = {11}, pages = {1599--1608}, year = {2001}, url = {https://doi.org/10.1109/4.962279}, doi = {10.1109/4.962279}, timestamp = {Wed, 08 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jssc/ClarkHMBLSMVY01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/LiaoW96, author = {Yuyun Liao and D. M. H. Walker}, title = {Fault Coverage Analysis for Physically-Based {CMOS} Bridging Faults at Different Power Supply Voltages}, booktitle = {Proceedings {IEEE} International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996}, pages = {767--775}, publisher = {{IEEE} Computer Society}, year = {1996}, url = {https://doi.org/10.1109/TEST.1996.557136}, doi = {10.1109/TEST.1996.557136}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/LiaoW96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/spdp/LiaoLT96, author = {Yuyun Liao and Mi Lu and Nian{-}Feng Tzeng}, title = {The Palindrome network for fault-tolerant interconnection}, booktitle = {Proceedings of the Eighth {IEEE} Symposium on Parallel and Distributed Processing, {SPDP} 1996, New Orleans, Louisiana, USA, October 23-26, 1996}, pages = {556--561}, publisher = {{IEEE} Computer Society}, year = {1996}, url = {https://doi.org/10.1109/SPDP.1996.570383}, doi = {10.1109/SPDP.1996.570383}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/spdp/LiaoLT96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vts/LiaoW96, author = {Yuyun Liao and D. M. H. Walker}, title = {Optimal voltage testing for physically-based faults}, booktitle = {14th {IEEE} {VLSI} Test Symposium (VTS'96), April 28 - May 1, 1996, Princeton, NJ, {USA}}, pages = {344--353}, publisher = {{IEEE} Computer Society}, year = {1996}, url = {https://doi.org/10.1109/VTEST.1996.510878}, doi = {10.1109/VTEST.1996.510878}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vts/LiaoW96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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