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BibTeX records: Wuxi Li

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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@inproceedings{DBLP:conf/ispd/LiKSBD24,
  author       = {Wuxi Li and
                  Yuji Kukimoto and
                  Gr{\'{e}}gory Servel and
                  Ismail Bustany and
                  Mehrdad E. Dehkordi},
  editor       = {Iris Hui{-}Ru Jiang and
                  Gracieli Posser},
  title        = {Calibration-Based Differentiable Timing Optimization in Non-linear
                  Global Placement},
  booktitle    = {Proceedings of the 2024 International Symposium on Physical Design,
                  {ISPD} 2024, Taipei, Taiwan, March 12-15, 2024},
  pages        = {31--39},
  publisher    = {{ACM}},
  year         = {2024},
  url          = {https://doi.org/10.1145/3626184.3633313},
  doi          = {10.1145/3626184.3633313},
  timestamp    = {Mon, 01 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ispd/LiKSBD24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/GuoMZLHLLQCSXKZC23,
  author       = {Licheng Guo and
                  Pongstorn Maidee and
                  Yun Zhou and
                  Chris Lavin and
                  Eddie Hung and
                  Wuxi Li and
                  Jason Lau and
                  Weikang Qiao and
                  Yuze Chi and
                  Linghao Song and
                  Yuanlong Xiao and
                  Alireza Kaviani and
                  Zhiru Zhang and
                  Jason Cong},
  title        = {RapidStream 2.0: Automated Parallel Implementation of Latency-Insensitive
                  {FPGA} Designs Through Partial Reconfiguration},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {16},
  number       = {4},
  pages        = {59:1--59:30},
  year         = {2023},
  url          = {https://doi.org/10.1145/3593025},
  doi          = {10.1145/3593025},
  timestamp    = {Sat, 13 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/trets/GuoMZLHLLQCSXKZC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/GuoZJLLWH23,
  author       = {Zizheng Guo and
                  Zuodong Zhang and
                  Xun Jiang and
                  Wuxi Li and
                  Yibo Lin and
                  Runsheng Wang and
                  Ru Huang},
  title        = {General-Purpose Gate-Level Simulation with Partition-Agnostic Parallelism},
  booktitle    = {60th {ACM/IEEE} Design Automation Conference, {DAC} 2023, San Francisco,
                  CA, USA, July 9-13, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/DAC56929.2023.10247907},
  doi          = {10.1109/DAC56929.2023.10247907},
  timestamp    = {Sun, 24 Sep 2023 13:31:06 +0200},
  biburl       = {https://dblp.org/rec/conf/dac/GuoZJLLWH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/HuFLYH23,
  author       = {Hailiang Hu and
                  Donghao Fang and
                  Wuxi Li and
                  Bo Yuan and
                  Jiang Hu},
  title        = {Systolic Array Placement on FPGAs},
  booktitle    = {{IEEE/ACM} International Conference on Computer Aided Design, {ICCAD}
                  2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023},
  pages        = {1--9},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/ICCAD57390.2023.10323742},
  doi          = {10.1109/ICCAD57390.2023.10323742},
  timestamp    = {Wed, 03 Jan 2024 08:34:26 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/HuFLYH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mlcad/BustanyGGKKLP23,
  author       = {Ismail Bustany and
                  Grigor Gasparyan and
                  Amit Gupta and
                  Andrew B. Kahng and
                  Meghraj Kalase and
                  Wuxi Li and
                  Bodhisatta Pramanik},
  title        = {The 2023 {MLCAD} {FPGA} Macro Placement Benchmark Design Suite and
                  Contest Results},
  booktitle    = {5th {ACM/IEEE} Workshop on Machine Learning for CAD, {MLCAD} 2023,
                  Snowbird, UT, USA, September 10-13, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/MLCAD58807.2023.10299868},
  doi          = {10.1109/MLCAD58807.2023.10299868},
  timestamp    = {Wed, 15 Nov 2023 09:43:46 +0100},
  biburl       = {https://dblp.org/rec/conf/mlcad/BustanyGGKKLP23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/MengLLP22,
  author       = {Yibai Meng and
                  Wuxi Li and
                  Yibo Lin and
                  David Z. Pan},
  title        = {elfPlace: Electrostatics-Based Placement for Large-Scale Heterogeneous
                  FPGAs},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {41},
  number       = {1},
  pages        = {155--168},
  year         = {2022},
  url          = {https://doi.org/10.1109/TCAD.2021.3053191},
  doi          = {10.1109/TCAD.2021.3053191},
  timestamp    = {Sat, 08 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tcad/MengLLP22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/FangZHL0H22,
  author       = {Donghao Fang and
                  Boyang Zhang and
                  Hailiang Hu and
                  Wuxi Li and
                  Bo Yuan and
                  Jiang Hu},
  editor       = {Laleh Behjat and
                  Stephen Yang},
  title        = {Global Placement Exploiting Soft 2D Regularity},
  booktitle    = {{ISPD} 2022: International Symposium on Physical Design, Virtual Event,
                  Canada, March 27 - 30, 2022},
  pages        = {203--210},
  publisher    = {{ACM}},
  year         = {2022},
  url          = {https://doi.org/10.1145/3505170.3506723},
  doi          = {10.1145/3505170.3506723},
  timestamp    = {Thu, 14 Apr 2022 14:53:52 +0200},
  biburl       = {https://dblp.org/rec/conf/ispd/FangZHL0H22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/LinJGLDRKP21,
  author       = {Yibo Lin and
                  Zixuan Jiang and
                  Jiaqi Gu and
                  Wuxi Li and
                  Shounak Dhar and
                  Haoxing Ren and
                  Brucek Khailany and
                  David Z. Pan},
  title        = {DREAMPlace: Deep Learning Toolkit-Enabled {GPU} Acceleration for Modern
                  {VLSI} Placement},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {40},
  number       = {4},
  pages        = {748--761},
  year         = {2021},
  url          = {https://doi.org/10.1109/TCAD.2020.3003843},
  doi          = {10.1109/TCAD.2020.3003843},
  timestamp    = {Thu, 29 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/LinJGLDRKP21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/LinLGRKP20,
  author       = {Yibo Lin and
                  Wuxi Li and
                  Jiaqi Gu and
                  Haoxing Ren and
                  Brucek Khailany and
                  David Z. Pan},
  title        = {ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on
                  Multithreaded CPUs and GPUs},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {39},
  number       = {12},
  pages        = {5083--5096},
  year         = {2020},
  url          = {https://doi.org/10.1109/TCAD.2020.2971531},
  doi          = {10.1109/TCAD.2020.2971531},
  timestamp    = {Tue, 01 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tcad/LinLGRKP20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/AlawiehLLSIP20,
  author       = {Mohamed Baker Alawieh and
                  Wuxi Li and
                  Yibo Lin and
                  Love Singhal and
                  Mahesh A. Iyer and
                  David Z. Pan},
  title        = {High-Definition Routing Congestion Prediction for Large-Scale FPGAs},
  booktitle    = {25th Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2020, Beijing, China, January 13-16, 2020},
  pages        = {26--31},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ASP-DAC47756.2020.9045178},
  doi          = {10.1109/ASP-DAC47756.2020.9045178},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/AlawiehLLSIP20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/LiuLZXLSTSP20,
  author       = {Mingjie Liu and
                  Wuxi Li and
                  Keren Zhu and
                  Biying Xu and
                  Yibo Lin and
                  Linxiao Shen and
                  Xiyuan Tang and
                  Nan Sun and
                  David Z. Pan},
  title        = {S\({}^{\mbox{3}}\)DET: Detecting System Symmetry Constraints for Analog
                  Circuits with Graph Similarity},
  booktitle    = {25th Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2020, Beijing, China, January 13-16, 2020},
  pages        = {193--198},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ASP-DAC47756.2020.9045109},
  doi          = {10.1109/ASP-DAC47756.2020.9045109},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/LiuLZXLSTSP20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/GuZFLCP20,
  author       = {Jiaqi Gu and
                  Zheng Zhao and
                  Chenghao Feng and
                  Wuxi Li and
                  Ray T. Chen and
                  David Z. Pan},
  title        = {{FLOPS:} EFficient On-Chip Learning for OPtical Neural Networks Through
                  Stochastic Zeroth-Order Optimization},
  booktitle    = {57th {ACM/IEEE} Design Automation Conference, {DAC} 2020, San Francisco,
                  CA, USA, July 20-24, 2020},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/DAC18072.2020.9218593},
  doi          = {10.1109/DAC18072.2020.9218593},
  timestamp    = {Fri, 30 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/dac/GuZFLCP20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/LiYLXLP19,
  author       = {Meng Li and
                  Bei Yu and
                  Yibo Lin and
                  Xiaoqing Xu and
                  Wuxi Li and
                  David Z. Pan},
  title        = {A Practical Split Manufacturing Framework for Trojan Prevention via
                  Simultaneous Wire Lifting and Cell Insertion},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {38},
  number       = {9},
  pages        = {1585--1598},
  year         = {2019},
  url          = {https://doi.org/10.1109/TCAD.2018.2859402},
  doi          = {10.1109/TCAD.2018.2859402},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/LiYLXLP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/LiP19,
  author       = {Wuxi Li and
                  David Z. Pan},
  title        = {A New Paradigm for {FPGA} Placement Without Explicit Packing},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {38},
  number       = {11},
  pages        = {2113--2126},
  year         = {2019},
  url          = {https://doi.org/10.1109/TCAD.2018.2877017},
  doi          = {10.1109/TCAD.2018.2877017},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/LiP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/LinDLRKP19,
  author       = {Yibo Lin and
                  Shounak Dhar and
                  Wuxi Li and
                  Haoxing Ren and
                  Brucek Khailany and
                  David Z. Pan},
  title        = {DREAMPlace: Deep Learning Toolkit-Enabled {GPU} Acceleration for Modern
                  {VLSI} Placement},
  booktitle    = {Proceedings of the 56th Annual Design Automation Conference 2019,
                  {DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019},
  pages        = {117},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3316781.3317803},
  doi          = {10.1145/3316781.3317803},
  timestamp    = {Sun, 08 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/dac/LinDLRKP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/LiDYP19,
  author       = {Wuxi Li and
                  Mehrdad E. Dehkordi and
                  Stephen Yang and
                  David Z. Pan},
  editor       = {Kia Bazargan and
                  Stephen Neuendorffer},
  title        = {Simultaneous Placement and Clock Tree Construction for Modern FPGAs},
  booktitle    = {Proceedings of the 2019 {ACM/SIGDA} International Symposium on Field-Programmable
                  Gate Arrays, {FPGA} 2019, Seaside, CA, USA, February 24-26, 2019},
  pages        = {132--141},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3289602.3293897},
  doi          = {10.1145/3289602.3293897},
  timestamp    = {Tue, 05 Mar 2019 07:04:43 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LiDYP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/LiLP19,
  author       = {Wuxi Li and
                  Yibo Lin and
                  David Z. Pan},
  editor       = {David Z. Pan},
  title        = {elfPlace: Electrostatics-based Placement for Large-Scale Heterogeneous
                  FPGAs},
  booktitle    = {Proceedings of the International Conference on Computer-Aided Design,
                  {ICCAD} 2019, Westminster, CO, USA, November 4-7, 2019},
  pages        = {1--8},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ICCAD45719.2019.8942075},
  doi          = {10.1109/ICCAD45719.2019.8942075},
  timestamp    = {Wed, 19 Feb 2020 16:38:01 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/LiLP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/LiDP18,
  author       = {Wuxi Li and
                  Shounak Dhar and
                  David Z. Pan},
  title        = {UTPlaceF: {A} Routability-Driven {FPGA} Placer With Physical and Congestion
                  Aware Packing},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {37},
  number       = {4},
  pages        = {869--882},
  year         = {2018},
  url          = {https://doi.org/10.1109/TCAD.2017.2729349},
  doi          = {10.1109/TCAD.2017.2729349},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/LiDP18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/LiLLDP18,
  author       = {Wuxi Li and
                  Yibo Lin and
                  Meng Li and
                  Shounak Dhar and
                  David Z. Pan},
  title        = {UTPlaceF 2.0: {A} High-Performance Clock-Aware {FPGA} Placement Engine},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {23},
  number       = {4},
  pages        = {42:1--42:23},
  year         = {2018},
  url          = {https://doi.org/10.1145/3174849},
  doi          = {10.1145/3174849},
  timestamp    = {Wed, 21 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/LiLLDP18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/LiYLXLP18,
  author       = {Meng Li and
                  Bei Yu and
                  Yibo Lin and
                  Xiaoqing Xu and
                  Wuxi Li and
                  David Z. Pan},
  editor       = {Youngsoo Shin},
  title        = {A practical split manufacturing framework for Trojan prevention via
                  simultaneous wire lifting and cell insertion},
  booktitle    = {23rd Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2018, Jeju, Korea (South), January 22-25, 2018},
  pages        = {265--270},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ASPDAC.2018.8297316},
  doi          = {10.1109/ASPDAC.2018.8297316},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/LiYLXLP18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/LiLWP17,
  author       = {Wuxi Li and
                  Meng Li and
                  Jiajun Wang and
                  David Z. Pan},
  editor       = {Sri Parameswaran},
  title        = {UTPlaceF 3.0: {A} parallelization framework for modern {FPGA} global
                  placement: (Invited paper)},
  booktitle    = {2017 {IEEE/ACM} International Conference on Computer-Aided Design,
                  {ICCAD} 2017, Irvine, CA, USA, November 13-16, 2017},
  pages        = {922--928},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ICCAD.2017.8203879},
  doi          = {10.1109/ICCAD.2017.8203879},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/LiLWP17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/islped/YeLXLFSZP17,
  author       = {Wei Ye and
                  Yibo Lin and
                  Xiaoqing Xu and
                  Wuxi Li and
                  Yiwei Fu and
                  Yongsheng Sun and
                  Canhui Zhan and
                  David Z. Pan},
  title        = {Placement mitigation techniques for power grid electromigration},
  booktitle    = {2017 {IEEE/ACM} International Symposium on Low Power Electronics and
                  Design, {ISLPED} 2017, Taipei, Taiwan, July 24-26, 2017},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISLPED.2017.8009178},
  doi          = {10.1109/ISLPED.2017.8009178},
  timestamp    = {Mon, 28 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/islped/YeLXLFSZP17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/LiDP16,
  author       = {Wuxi Li and
                  Shounak Dhar and
                  David Z. Pan},
  editor       = {Frank Liu},
  title        = {UTPlaceF: a routability-driven {FPGA} placer with physical and congestion
                  aware packing},
  booktitle    = {Proceedings of the 35th International Conference on Computer-Aided
                  Design, {ICCAD} 2016, Austin, TX, USA, November 7-10, 2016},
  pages        = {66},
  publisher    = {{ACM}},
  year         = {2016},
  url          = {https://doi.org/10.1145/2966986.2980083},
  doi          = {10.1145/2966986.2980083},
  timestamp    = {Fri, 23 Jun 2023 22:29:48 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/LiDP16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/XuLLYW14,
  author       = {Wei Xu and
                  Xiyan Li and
                  Wuxi Li and
                  Hang Yuan and
                  Guoxing Wang},
  title        = {Live demonstration: An optimization software and a design case of
                  a novel dual band wireless power and data transmission system},
  booktitle    = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
                  Melbourne, Victoria, Australia, June 1-5, 2014},
  pages        = {436},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISCAS.2014.6865159},
  doi          = {10.1109/ISCAS.2014.6865159},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/XuLLYW14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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