BibTeX records: Belliappa Kuttanna

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@inproceedings{DBLP:conf/date/MandalJOKGNRSHR19,
  author    = {Dipan Kumar Mandal and
               Srivatsava Jandhyala and
               Om J. Omer and
               Gurpreet S. Kalsi and
               Biji George and
               Gopi Neela and
               Santhosh Kumar Rethinagiri and
               Sreenivas Subramoney and
               Lance Hacking and
               Jim Radford and
               Eagle Jones and
               Belliappa Kuttanna and
               Hong Wang},
  editor    = {J{\"{u}}rgen Teich and
               Franco Fummi},
  title     = {Visual Inertial Odometry At the Edge: {A} Hardware-Software Co-design
               Approach for Ultra-low Latency and Power},
  booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
               {DATE} 2019, Florence, Italy, March 25-29, 2019},
  pages     = {960--963},
  publisher = {{IEEE}},
  year      = {2019},
  url       = {https://doi.org/10.23919/DATE.2019.8714921},
  doi       = {10.23919/DATE.2019.8714921},
  timestamp = {Thu, 17 Oct 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/date/MandalJOKGNRSHR19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/BurresGMRSLTMKL15,
  author    = {Bradley Burres and
               Johan van de Groenendaal and
               Praveen Mosur and
               Jonathan Robinson and
               Ian M. Steiner and
               Yi{-}Feng Liu and
               Sin S. Tan and
               Erik McShane and
               Belliappa Kuttanna and
               Sridhar Lakshmanamurthy},
  title     = {Intel Atom {C2000} Processor Family: Power-Efficient Datacenter Processing},
  journal   = {{IEEE} Micro},
  volume    = {35},
  number    = {2},
  pages     = {26--34},
  year      = {2015},
  url       = {https://doi.org/10.1109/MM.2015.14},
  doi       = {10.1109/MM.2015.14},
  timestamp = {Mon, 25 Mar 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/micro/BurresGMRSLTMKL15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/OttoniHWBKW11,
  author    = {Guilherme Ottoni and
               Thomas Hartin and
               Christopher T. Weaver and
               Jason Brandt and
               Belliappa Kuttanna and
               Hong Wang},
  editor    = {Calin Cascaval and
               Pedro Trancoso and
               Viktor K. Prasanna},
  title     = {Harmonia: a transparent, efficient, and harmonious dynamic binary
               translator targeting the Intel{\textregistered} architecture},
  booktitle = {Proceedings of the 8th Conference on Computing Frontiers, 2011, Ischia,
               Italy, May 3-5, 2011},
  pages     = {26},
  publisher = {{ACM}},
  year      = {2011},
  url       = {https://doi.org/10.1145/2016604.2016635},
  doi       = {10.1145/2016604.2016635},
  timestamp = {Thu, 17 Oct 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/cf/OttoniHWBKW11.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/GerosaCDJKMPTS09,
  author    = {Gianfranco Gerosa and
               Steve Curtis and
               Michael D'Addeo and
               Bo Jiang and
               Belliappa Kuttanna and
               Feroze Merchant and
               Binta Patel and
               Mohammed H. Taufique and
               Haytham Samarchi},
  title     = {A Sub-2 {W} Low Power {IA} Processor for Mobile Internet Devices in
               45 nm High-k Metal Gate {CMOS}},
  journal   = {J. Solid-State Circuits},
  volume    = {44},
  number    = {1},
  pages     = {73--82},
  year      = {2009},
  url       = {https://doi.org/10.1109/JSSC.2008.2007170},
  doi       = {10.1109/JSSC.2008.2007170},
  timestamp = {Wed, 10 Jul 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/jssc/GerosaCDJKMPTS09.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WangCWKSCSSDSW09,
  author    = {Perry H. Wang and
               Jamison D. Collins and
               Christopher T. Weaver and
               Belliappa Kuttanna and
               Shahram Salamian and
               Gautham N. Chinya and
               Ethan Schuchman and
               Oliver Schilling and
               Thorsten Doil and
               Sebastian Steibl and
               Hong Wang},
  editor    = {Paul Chow and
               Peter Y. K. Cheung},
  title     = {Intel{\textregistered} atom\({}^{\mbox{TM}}\) processor core made
               FPGA-synthesizable},
  booktitle = {Proceedings of the {ACM/SIGDA} 17th International Symposium on Field
               Programmable Gate Arrays, {FPGA} 2009, Monterey, California, USA,
               February 22-24, 2009},
  pages     = {209--218},
  publisher = {{ACM}},
  year      = {2009},
  url       = {https://doi.org/10.1145/1508128.1508160},
  doi       = {10.1145/1508128.1508160},
  timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
  biburl    = {https://dblp.org/rec/conf/fpga/WangCWKSCSSDSW09.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/GerosaCDJKMPTS08,
  author    = {Gianfranco Gerosa and
               Steve Curtis and
               Michael D'Addeo and
               Bo Jiang and
               Belliappa Kuttanna and
               Feroze Merchant and
               Binta Patel and
               Mohammed H. Taufique and
               Haytham Samarchi},
  title     = {A Sub-1W to 2W Low-Power {IA} Processor for Mobile Internet Devices
               and Ultra-Mobile PCs in 45nm Hi-{\(\Kappa\)} Metal Gate {CMOS}},
  booktitle = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC}
               2008, Digest of Technical Papers, San Francisco, CA, USA, February
               3-7, 2008},
  pages     = {256--257},
  publisher = {{IEEE}},
  year      = {2008},
  url       = {https://doi.org/10.1109/ISSCC.2008.4523154},
  doi       = {10.1109/ISSCC.2008.4523154},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/isscc/GerosaCDJKMPTS08.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/KennedyAFLKPPPC97,
  author    = {A. Richard Kennedy and
               Mike Alexander and
               Eric Fiene and
               Jose A. Lyon and
               Belli Kuttanna and
               Rajesh Patel and
               Mydung N. Pham and
               Michael Putrino and
               Cody Croxton and
               Suzanne Litch and
               Brad Burgess},
  title     = {A {G3} PowerPC{\texttrademark} superscalar low-power microprocessor},
  booktitle = {Proceedings {IEEE} {COMPCON} 97, San Jose, California, USA, February
               23-26, 1997, Digest of Papers},
  pages     = {315--324},
  publisher = {{IEEE} Computer Society},
  year      = {1997},
  url       = {https://doi.org/10.1109/CMPCON.1997.584742},
  doi       = {10.1109/CMPCON.1997.584742},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/compcon/KennedyAFLKPPPC97.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/SanchezKOAGPA97,
  author    = {Hector Sanchez and
               Belli Kuttanna and
               Tim Olson and
               Mike Alexander and
               Gianfranco Gerosa and
               Ross Philip and
               Jose Alvarez},
  title     = {Thermal management system for high performance PowerPC{\texttrademark}
               microprocessors},
  booktitle = {Proceedings {IEEE} {COMPCON} 97, San Jose, California, USA, February
               23-26, 1997, Digest of Papers},
  pages     = {325--330},
  publisher = {{IEEE} Computer Society},
  year      = {1997},
  url       = {https://doi.org/10.1109/CMPCON.1997.584744},
  doi       = {10.1109/CMPCON.1997.584744},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/compcon/SanchezKOAGPA97.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/OgdenKLMP95,
  author    = {Deene Ogden and
               Belli Kuttanna and
               Albert J. Loper and
               Soummya Mallick and
               Michael Putrino},
  title     = {A New PowerPC Microprocessor for Low Power Computing Systems},
  booktitle = {{COMPCON} '95: Technologies for the Information Superhighway, Digest
               of Papers, San Francisco, California, USA, March 5-9, 1995},
  pages     = {281--284},
  publisher = {{IEEE} Computer Society},
  year      = {1995},
  url       = {https://doi.org/10.1109/CMPCON.1995.512397},
  doi       = {10.1109/CMPCON.1995.512397},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/compcon/OgdenKLMP95.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RajagopalKJMS93,
  author    = {Arjun Rajagopal and
               Belli Kuttanna and
               Balaji Janakiraman and
               Rajarshi Mukherjee and
               Joy Shetler},
  title     = {A Reconfigurable Arithmetic Processor},
  booktitle = {Proceedings of the Sixth International Conference on {VLSI} Design,
               {VLSI} Design 1993, Bombay, India, January 3-6, 1993},
  pages     = {172--175},
  publisher = {{IEEE} Computer Society},
  year      = {1993},
  url       = {https://doi.org/10.1109/ICVD.1993.669672},
  doi       = {10.1109/ICVD.1993.669672},
  timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl    = {https://dblp.org/rec/conf/vlsid/RajagopalKJMS93.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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