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BibTeX records: Manolis Katevenis
@inproceedings{DBLP:conf/hpcasia/GianioudisXLMMM24, author = {Michalis Gianioudis and Pantelis Xirouchakis and Charisios Loukas and Evangelos Mageiropoulos and Orestis Mousouros and Sokratis Mpartzis and Aggelos Ioannou and Vassilis Papaefstathiou and Manolis Katevenis and Nikolaos Chrysos}, title = {Low-latency Communication in {RISC-V} Clusters}, booktitle = {Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region, HPCAsia 2024, Nagoya, Japan, January 25-27, 2024}, pages = {73--83}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3635035.3635050}, doi = {10.1145/3635035.3635050}, timestamp = {Fri, 26 Jan 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hpcasia/GianioudisXLMMM24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-2307-09371, author = {Manolis Ploumidis and Fabien Chaix and Nikolaos Chrysos and Marios Asiminakis and Vassilis Flouris and Nikolaos D. Kallimanis and Nikolaos Kossifidis and Michael Nikoloudakis and Polydoros Petrakis and Nikolaos Dimou and Michalis Gianioudis and Georgios Ieronymakis and Aggelos Ioannou and George Kalokerinos and Pantelis Xirouchakis and Georgios Ailamakis and Astrinos Damianakis and Michael Ligerakis and Ioannis Makris and Theocharis Vavouris and Manolis Katevenis and Vassilis Papaefstathiou and Manolis Marazakis and Iakovos Mavroidis}, title = {The ExaNeSt Prototype: Evaluation of Efficient {HPC} Communication Hardware in an ARM-based Multi-FPGA Rack}, journal = {CoRR}, volume = {abs/2307.09371}, year = {2023}, url = {https://doi.org/10.48550/arXiv.2307.09371}, doi = {10.48550/ARXIV.2307.09371}, eprinttype = {arXiv}, eprint = {2307.09371}, timestamp = {Tue, 25 Jul 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-2307-09371.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tpds/PsistakisCCAGXP22, author = {Antonis Psistakis and Nikos Chrysos and Fabien Chaix and Marios Asiminakis and Michalis Gianioudis and Pantelis Xirouchakis and Vassilis Papaefstathiou and Manolis Katevenis}, title = {Optimized Page Fault Handling During {RDMA}}, journal = {{IEEE} Trans. Parallel Distributed Syst.}, volume = {33}, number = {10}, pages = {3990--4005}, year = {2022}, url = {https://doi.org/10.1109/TPDS.2022.3175666}, doi = {10.1109/TPDS.2022.3175666}, timestamp = {Thu, 27 Jul 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tpds/PsistakisCCAGXP22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/BiagioniCFCLMPP22, author = {Andrea Biagioni and Paolo Cretaro and Ottorino Frezza and Francesca Lo Cicero and Alessandro Lonardo and Michele Martinelli and Pier Stanislao Paolucci and Elena Pastorelli and Francesco Simula and Matteo Turisini and Piero Vicini and Roberto Ammendola and Pascale Bernier{-}Bruna and Claire Chen and Said Derradji and St{\'{e}}phane Guez and Pierre{-}Axel Lagadec and Gregoire Pichon and Etienne Walter and Gaetan De Gassowski and Matthieu Hautreaux and Stephane Mathieu and Gilles Moreau and Marc P{\'{e}}rache and Hugo Taboada and Torsten Hoefler and Timo Schneider and Matteo Barnaba and Giuseppe Piero Brandino and Francesco De Giorgi and Matteo Poggi and Iakovos Mavroidis and Yannis Papaefstathiou and Nikolaos Tampouratzis and Benjamin Kalisch and Ulrich Krackhardt and Mondrian Nuessle and Pantelis Xirouchakis and Vangelis Mageiropoulos and Michalis Gianioudis and Harisis Loukas and Aggelos Ioannou and Nikos Kallimanis and Nikos Chrysos and Manolis Katevenis and Wolfgang Frings and Dominik Gottwald and Felime Guimaraes and Max Holicki and Volker Marx and Yannik M{\"{u}}ller and Carsten Clauss and Hugo Falter and Xu Huang and Jennifer Lopez Barillao and Thomas Moschny and Simon Pickartz and Francisco J. Alfaro and Jes{\'{u}}s Escudero{-}Sahuquillo and Pedro Javier Garc{\'{\i}}a and Francisco J. Quiles and Jos{\'{e}} L. S{\'{a}}nchez and Adri{\'{a}}n Castell{\'{o}} and Jose Duro and Mar{\'{\i}}a Engracia G{\'{o}}mez and Enrique S. Quintana{-}Ort{\'{\i}} and Julio Sahuquillo and Eugenio Stabile}, title = {{RED-SEA:} Network Solution for Exascale Architectures}, booktitle = {25th Euromicro Conference on Digital System Design, {DSD} 2022, Maspalomas, Spain, August 31 - Sept. 2, 2022}, pages = {712--719}, publisher = {{IEEE}}, year = {2022}, url = {https://doi.org/10.1109/DSD57027.2022.00100}, doi = {10.1109/DSD57027.2022.00100}, timestamp = {Sun, 04 Aug 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/dsd/BiagioniCFCLMPP22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/MageiropoulosCD21, author = {Evangelos Mageiropoulos and Nikolaos Chrysos and Nikolaos Dimou and Manolis Katevenis}, title = {Using hls4ml to Map Convolutional Neural Networks on Interconnected {FPGA} Devices}, booktitle = {29th {IEEE} Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2021, Orlando, FL, USA, May 9-12, 2021}, pages = {277}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.1109/FCCM51124.2021.00062}, doi = {10.1109/FCCM51124.2021.00062}, timestamp = {Mon, 07 Jun 2021 17:13:01 +0200}, biburl = {https://dblp.org/rec/conf/fccm/MageiropoulosCD21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/nocs/PsistakisCCAGXP20, author = {Antonis Psistakis and Nikos Chrysos and Fabien Chaix and Marios Asiminakis and Michalis Giannioudis and Pantelis Xirouchakis and Vassilis Papaefstathiou and Manolis Katevenis}, title = {{PART:} Pinning Avoidance in {RDMA} Technologies}, booktitle = {14th {IEEE/ACM} International Symposium on Networks-on-Chip, {NOCS} 2020, Hamburg, Germany, September 24-25, 2020}, pages = {1--8}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/NOCS50636.2020.9241587}, doi = {10.1109/NOCS50636.2020.9241587}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/nocs/PsistakisCCAGXP20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/thipeac/KalokerinosPNKY19, author = {George Kalokerinos and Vassilis Papaefstathiou and George Nikiforos and Stamatis G. Kavadias and Xiaojun Yang and Dionisios N. Pnevmatikatos and Manolis Katevenis}, title = {Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level {RDMA} Capability}, journal = {Trans. High Perform. Embed. Archit. Compil.}, volume = {5}, pages = {100--120}, year = {2019}, url = {https://doi.org/10.1007/978-3-662-58834-5\_6}, doi = {10.1007/978-3-662-58834-5\_6}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/thipeac/KalokerinosPNKY19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/eScience/TaffoniKPPTGRBC19, author = {Giuliano Taffoni and Manolis Katevenis and Renato Panchieri and Gino Perna and Luca Tornatore and David Goz and Antonio Ragagnin and Sara Bertocco and Igor Coretti and Manolis Marazakis and Fabien Chaix and Manolis Ploumidis}, title = {Towards Exascale: Measuring the Energy Footprint of Astrophysics {HPC} Simulations}, booktitle = {15th International Conference on eScience, eScience 2019, San Diego, CA, USA, September 24-27, 2019}, pages = {403--412}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/eScience.2019.00052}, doi = {10.1109/ESCIENCE.2019.00052}, timestamp = {Tue, 16 Aug 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/eScience/TaffoniKPPTGRBC19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icassp/PitsisTKKIDKT19, author = {George Pitsis and Grigorios Tsagkatakis and Christos Kozanitis and Ioannis Kalomoiris and Aggelos Ioannou and Apostolos Dollas and Manolis G. H. Katevenis and Panagiotis Tsakalides}, title = {Efficient Convolutional Neural Network Weight Compression for Space Data Classification on Multi-fpga Platforms}, booktitle = {{IEEE} International Conference on Acoustics, Speech and Signal Processing, {ICASSP} 2019, Brighton, United Kingdom, May 12-17, 2019}, pages = {3917--3921}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/ICASSP.2019.8682732}, doi = {10.1109/ICASSP.2019.8682732}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/icassp/PitsisTKKIDKT19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sc/ChaixAVDKMIKDIM19, author = {Fabien Chaix and Georgios Ailamakis and Theocharis Vavouris and Astrinos Damianakis and Manolis Katevenis and Iakovos Mavroidis and Aggelos Ioannou and Nikolaos Kossifidis and Nikolaos Dimou and Giorgos Ieronymakis and Manolis Marazakis and Vassilis Papaefstathiou and Vassilis Flouris and Mihailis Ligerakis}, title = {Implementation and Impact of an Ultra-Compact Multi-FPGA Board for Large System Prototyping}, booktitle = {2019 {IEEE/ACM} International Workshop on Heterogeneous High-performance Reconfigurable Computing, H2RC@SC 2019, Denver, CO, USA, November 17, 2019}, pages = {34--41}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/H2RC49586.2019.00010}, doi = {10.1109/H2RC49586.2019.00010}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/sc/ChaixAVDKMIKDIM19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/supercomputer/PloumidisKACXGT19, author = {Manolis Ploumidis and Nikolaos D. Kallimanis and Marios Asiminakis and Nikos Chrysos and Pantelis Xirouchakis and Michalis Gianoudis and Leandros Tzanakis and Nikolaos Dimou and Antonis Psistakis and Panagiotis Peristerakis and Giorgos Kalokairinos and Vassilis Papaefstathiou and Manolis Katevenis}, editor = {Mich{\`{e}}le Weiland and Guido Juckeland and Sadaf R. Alam and Heike Jagode}, title = {Software and Hardware Co-design for Low-Power {HPC} Platforms}, booktitle = {High Performance Computing - {ISC} High Performance 2019 International Workshops, Frankfurt, Germany, June 16-20, 2019, Revised Selected Papers}, series = {Lecture Notes in Computer Science}, volume = {11887}, pages = {88--100}, publisher = {Springer}, year = {2019}, url = {https://doi.org/10.1007/978-3-030-34356-9\_9}, doi = {10.1007/978-3-030-34356-9\_9}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/supercomputer/PloumidisKACXGT19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-1904-11720, author = {Giuliano Taffoni and Giuseppe Murante and Luca Tornatore and David Goz and Stefano Borgani and Manolis Katevenis and Nikolaos Chrysos and Manolis Marazakis}, title = {Shall numerical astrophysics step into the era of Exascale computing?}, journal = {CoRR}, volume = {abs/1904.11720}, year = {2019}, url = {http://arxiv.org/abs/1904.11720}, eprinttype = {arXiv}, eprint = {1904.11720}, timestamp = {Fri, 09 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-1904-11720.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/KatevenisABCFCL18, author = {Manolis Katevenis and Roberto Ammendola and Andrea Biagioni and Paolo Cretaro and Ottorino Frezza and Francesca Lo Cicero and Alessandro Lonardo and Michele Martinelli and Pier Stanislao Paolucci and Elena Pastorelli and Francesco Simula and Piero Vicini and Giuliano Taffoni and Jose Antonio Pascual and Javier Navaridas and Mikel Luj{\'{a}}n and John Goodacre and Bernd Lietzow and Martin L. Kersten}, title = {Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development}, journal = {Microprocess. Microsystems}, volume = {61}, pages = {58--71}, year = {2018}, url = {https://doi.org/10.1016/j.micpro.2018.05.009}, doi = {10.1016/J.MICPRO.2018.05.009}, timestamp = {Wed, 16 Mar 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/KatevenisABCFCL18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/nocs/GiannopoulosCMV18, author = {Dimitris Giannopoulos and Nikos Chrysos and Evangelos Mageiropoulos and Giannis Vardas and Leandros Tzanakis and Manolis Katevenis}, editor = {Zhonghai Lu and Sriram R. Vangal and Jiang Xu and Paul Bogdan}, title = {Accurate Congestion Control for {RDMA} Transfers}, booktitle = {Twelfth {IEEE/ACM} International Symposium on Networks-on-Chip, {NOCS} 2018, Torino, Italy, October 4-5, 2018}, pages = {3:1--3:8}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.1109/NOCS.2018.8512155}, doi = {10.1109/NOCS.2018.8512155}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/nocs/GiannopoulosCMV18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/AmmendolaBCFCLM17, author = {Roberto Ammendola and Andrea Biagioni and Paolo Cretaro and Ottorino Frezza and Francesca Lo Cicero and Alessandro Lonardo and Michele Martinelli and Pier Stanislao Paolucci and Elena Pastorelli and Francesco Simula and Piero Vicini and Giuliano Taffoni and Jose Antonio Pascual and Javier Navaridas and Mikel Luj{\'{a}}n and John Goodacre and Nikolaos Chrysos and Manolis Katevenis}, editor = {Hana Kub{\'{a}}tov{\'{a}} and Martin Novotn{\'{y}} and Amund Skavhaug}, title = {The Next Generation of Exascale-Class Systems: The ExaNeSt Project}, booktitle = {Euromicro Conference on Digital System Design, {DSD} 2017, Vienna, Austria, August 30 - Sept. 1, 2017}, pages = {510--515}, publisher = {{IEEE} Computer Society}, year = {2017}, url = {https://doi.org/10.1109/DSD.2017.20}, doi = {10.1109/DSD.2017.20}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/AmmendolaBCFCLM17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/VasilakisSPPK17, author = {Evangelos Vasilakis and Ioannis Sourdis and Vassilis Papaefstathiou and Antonis Psathakis and Manolis G. H. Katevenis}, title = {Modeling energy-performance tradeoffs in {ARM} big.LITTLE architectures}, booktitle = {27th International Symposium on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2017, Thessaloniki, Greece, September 25-27, 2017}, pages = {1--8}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/PATMOS.2017.8106950}, doi = {10.1109/PATMOS.2017.8106950}, timestamp = {Wed, 16 Oct 2019 14:14:57 +0200}, biburl = {https://dblp.org/rec/conf/patmos/VasilakisSPPK17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ton/ChrysosCKK16, author = {Nikolaos Chrysos and Lydia Y. Chen and Christoforos Kachris and Manolis Katevenis}, title = {Discharging the Network From Its Flow Control Headaches: Packet Drops and {HOL} Blocking}, journal = {{IEEE/ACM} Trans. Netw.}, volume = {24}, number = {1}, pages = {15--28}, year = {2016}, url = {https://doi.org/10.1109/TNET.2014.2378012}, doi = {10.1109/TNET.2014.2378012}, timestamp = {Sat, 27 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ton/ChrysosCKK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/KatevenisCMMCKN16, author = {Manolis Katevenis and Nikolaos Chrysos and Manolis Marazakis and Iakovos Mavroidis and Fabien Chaix and Nikolaos D. Kallimanis and Javier Navaridas and John Goodacre and Piero Vicini and Andrea Biagioni and Pier Stanislao Paolucci and Alessandro Lonardo and Elena Pastorelli and Francesca Lo Cicero and Roberto Ammendola and P. Hopton and P. Coates and Giuliano Taffoni and Stefano Cozzini and Martin L. Kersten and Y. Zhang and Julio Sahuquillo and Sergio Lechago and C. Pinto and Bernd Lietzow and D. Everett and Gino Perna}, editor = {Paris Kitsos}, title = {The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems}, booktitle = {2016 Euromicro Conference on Digital System Design, {DSD} 2016, Limassol, Cyprus, August 31 - September 2, 2016}, pages = {60--67}, publisher = {{IEEE} Computer Society}, year = {2016}, url = {https://doi.org/10.1109/DSD.2016.106}, doi = {10.1109/DSD.2016.106}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/dsd/KatevenisCMMCKN16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/micro/PassasKP15, author = {Giorgos Passas and Manolis Katevenis and Dionisios N. Pnevmatikatos}, title = {The Combined Input-Output Queued Crossbar Architecture for High-Radix On-Chip Switches}, journal = {{IEEE} Micro}, volume = {35}, number = {6}, pages = {38--47}, year = {2015}, url = {https://doi.org/10.1109/MM.2014.56}, doi = {10.1109/MM.2014.56}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/micro/PassasKP15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ancs/PsathakisPCCVPK15, author = {Antonis Psathakis and Vassilis Papaefstathiou and Nikolaos Chrysos and Fabien Chaix and Evangelos Vasilakis and Dionisios N. Pnevmatikatos and Manolis Katevenis}, editor = {Gordon J. Brebner and Alex Bachmutsky and Chita R. Das}, title = {A Systematic Evaluation of Emerging Mesh-like {CMP} NoCs}, booktitle = {Proceedings of the Eleventh {ACM/IEEE} Symposium on Architectures for networking and communications systems, {ANCS} 2015, Oakland, CA, USA, May 7-8, 2015}, pages = {159--170}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/ANCS.2015.7110129}, doi = {10.1109/ANCS.2015.7110129}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ancs/PsathakisPCCVPK15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/LyberisKLPMKPN14, author = {Spyros Lyberis and George Kalokerinos and Michalis Lygerakis and Vassilis Papaefstathiou and Iakovos Mavroidis and Manolis Katevenis and Dionisios N. Pnevmatikatos and Dimitrios S. Nikolopoulos}, title = {{FPGA} prototyping of emerging manycore architectures for parallel programming research using Formic boards}, journal = {J. Syst. Archit.}, volume = {60}, number = {6}, pages = {481--493}, year = {2014}, url = {https://doi.org/10.1016/j.sysarc.2014.03.002}, doi = {10.1016/J.SYSARC.2014.03.002}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/LyberisKLPMKPN14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/DurandCABDFGGKMMMT14, author = {Yves Durand and Paul M. Carpenter and Stefano Adami and Angelos Bilas and Denis Dutoit and Alexis Farcy and Georgi Gaydadjiev and John Goodacre and Manolis Katevenis and Manolis Marazakis and Emil Mat{\'{u}}s and Iakovos Mavroidis and John Thomson}, title = {{EUROSERVER:} Energy Efficient Node for European Micro-Servers}, booktitle = {17th Euromicro Conference on Digital System Design, {DSD} 2014, Verona, Italy, August 27-29, 2014}, pages = {206--213}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/DSD.2014.15}, doi = {10.1109/DSD.2014.15}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/DurandCABDFGGKMMMT14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/nocs/PsathakisPKP14, author = {Antonis Psathakis and Vassilis Papaefstathiou and Manolis Katevenis and Dionisios N. Pnevmatikatos}, editor = {Davide Bertozzi and Luca Benini and Sudhakar Yalamanchili and J{\"{o}}rg Henkel}, title = {Design trade-offs in energy efficient NoC architectures}, booktitle = {Eighth {IEEE/ACM} International Symposium on Networks-on-Chip, NoCS 2014, Ferrara, Italy, September 17-19, 2014}, pages = {186--187}, publisher = {{IEEE}}, year = {2014}, url = {https://doi.org/10.1109/NOCS.2014.7008786}, doi = {10.1109/NOCS.2014.7008786}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/nocs/PsathakisPKP14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/PsathakisPKP14, author = {Antonis Psathakis and Vassilis Papaefstathiou and Manolis Katevenis and Dionisios N. Pnevmatikatos}, title = {Design space exploration for fair resource-allocated NoC architectures}, booktitle = {XIVth International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2014, Agios Konstantinos, Samos, Greece, July 14-17, 2014}, pages = {141--148}, publisher = {{IEEE}}, year = {2014}, url = {https://doi.org/10.1109/SAMOS.2014.6893205}, doi = {10.1109/SAMOS.2014.6893205}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/samos/PsathakisPKP14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/KachrisNPKK13, author = {Christoforos Kachris and George Nikiforos and Vassilis Papaefstathiou and Stamatis G. Kavadias and Manolis Katevenis}, title = {{NP-SARC:} Scalable network processing in the {SARC} multi-core {FPGA} platform}, journal = {J. Syst. Archit.}, volume = {59}, number = {1}, pages = {39--47}, year = {2013}, url = {https://doi.org/10.1016/j.sysarc.2012.11.001}, doi = {10.1016/J.SYSARC.2012.11.001}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/KachrisNPKK13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ics/PapaefstathiouKNP13, author = {Vassilis Papaefstathiou and Manolis Katevenis and Dimitrios S. Nikolopoulos and Dionisios N. Pnevmatikatos}, editor = {Allen D. Malony and Mario Nemirovsky and Samuel P. Midkiff}, title = {Prefetching and cache management using task lifetimes}, booktitle = {International Conference on Supercomputing, ICS'13, Eugene, OR, {USA} - June 10 - 14, 2013}, pages = {325--334}, publisher = {{ACM}}, year = {2013}, url = {https://doi.org/10.1145/2464996.2465443}, doi = {10.1145/2464996.2465443}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ics/PapaefstathiouKNP13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijpp/KavadiasKZN12, author = {Stamatis G. Kavadias and Manolis Katevenis and Michail Zampetakis and Dimitrios S. Nikolopoulos}, title = {Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs}, journal = {Int. J. Parallel Program.}, volume = {40}, number = {6}, pages = {583--604}, year = {2012}, url = {https://doi.org/10.1007/s10766-011-0173-6}, doi = {10.1007/S10766-011-0173-6}, timestamp = {Wed, 01 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijpp/KavadiasKZN12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/PassasKP12, author = {Giorgos Passas and Manolis Katevenis and Dionisios N. Pnevmatikatos}, title = {Crossbar NoCs Are Scalable Beyond 100 Nodes}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {31}, number = {4}, pages = {573--585}, year = {2012}, url = {https://doi.org/10.1109/TCAD.2011.2176730}, doi = {10.1109/TCAD.2011.2176730}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tcad/PassasKP12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/GraciaDAKY12, author = {Dar{\'{\i}}o Su{\'{a}}rez Gracia and Giorgos Dimitrakopoulos and Teresa Monreal Arnal and Manolis Katevenis and V{\'{\i}}ctor Vi{\~{n}}als Y{\'{u}}fera}, title = {{LP-NUCA:} Networks-in-Cache for High-Performance Low-Power Embedded Processors}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {20}, number = {8}, pages = {1510--1523}, year = {2012}, url = {https://doi.org/10.1109/TVLSI.2011.2158249}, doi = {10.1109/TVLSI.2011.2158249}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/GraciaDAKY12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/LyberisKLPTKPN12, author = {Spyros Lyberis and George Kalokerinos and Michalis Lygerakis and Vassilis Papaefstathiou and Dimitrios Tsaliagkos and Manolis Katevenis and Dionisios N. Pnevmatikatos and Dimitrios S. Nikolopoulos}, title = {Formic: Cost-efficient and Scalable Prototyping of Manycore Architectures}, booktitle = {2012 {IEEE} 20th Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2012, 29 April - 1 May 2012, Toronto, Ontario, Canada}, pages = {61--64}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/FCCM.2012.20}, doi = {10.1109/FCCM.2012.20}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/LyberisKLPTKPN12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/ics/2012, editor = {Utpal Banerjee and Kyle A. Gallivan and Gianfranco Bilardi and Manolis Katevenis}, title = {International Conference on Supercomputing, ICS'12, Venice, Italy, June 25-29, 2012}, publisher = {{ACM}}, year = {2012}, url = {http://dl.acm.org/citation.cfm?id=2304576}, isbn = {978-1-4503-1316-2}, timestamp = {Tue, 26 Jun 2012 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/ics/2012.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/cn/ChrysosK11, author = {Nikolaos Chrysos and Manolis Katevenis}, title = {Distributed {WFQ} scheduling converging to weighted max-min fairness}, journal = {Comput. Networks}, volume = {55}, number = {3}, pages = {792--806}, year = {2011}, url = {https://doi.org/10.1016/j.comnet.2010.10.011}, doi = {10.1016/J.COMNET.2010.10.011}, timestamp = {Wed, 19 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/cn/ChrysosK11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/TendulkarPNKNK11, author = {Pranav Tendulkar and Vassilis Papaefstathiou and George Nikiforos and Stamatis G. Kavadias and Dimitrios S. Nikolopoulos and Manolis Katevenis}, title = {Fine-grain OpenMP runtime support with explicit communication hardware primitives}, booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France, March 14-18, 2011}, pages = {891--894}, publisher = {{IEEE}}, year = {2011}, url = {https://doi.org/10.1109/DATE.2011.5763299}, doi = {10.1109/DATE.2011.5763299}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/TendulkarPNKNK11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscc/GaoKK11, author = {Yanping Gao and Christoforos Kachris and Manolis Katevenis}, title = {An efficient sequential iterative matching algorithm for {CIOQ} switches}, booktitle = {Proceedings of the 16th {IEEE} Symposium on Computers and Communications, {ISCC} 2011, Kerkyra, Corfu, Greece, June 28 - July 1, 2011}, pages = {558--563}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/ISCC.2011.5983896}, doi = {10.1109/ISCC.2011.5983896}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iscc/GaoKK11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/nocs/PassasKP11, author = {Giorgos Passas and Manolis Katevenis and Dionisios N. Pnevmatikatos}, editor = {Radu Marculescu and Michael Kishinevsky and Ran Ginosar and Karam S. Chatha}, title = {{VLSI} micro-architectures for high-radix crossbar schedulers}, booktitle = {{NOCS} 2011, Fifth {ACM/IEEE} International Symposium on Networks-on-Chip, Pittsburgh, Pennsylvania, USA, May 1-4, 2011}, pages = {217--224}, publisher = {{ACM/IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1145/1999946.1999981}, doi = {10.1145/1999946.1999981}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/nocs/PassasKP11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/hipeac/2011, editor = {Manolis Katevenis and Margaret Martonosi and Christos Kozyrakis and Olivier Temam}, title = {High Performance Embedded Architectures and Compilers, 6th International Conference, HiPEAC 2011, Heraklion, Crete, Greece, January 24-26, 2011. Proceedings}, publisher = {{ACM}}, year = {2011}, isbn = {978-1-4503-0241-8}, timestamp = {Tue, 09 Aug 2011 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hipeac/2011.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/micro/KatevenisPKPSN10, author = {Manolis Katevenis and Vassilis Papaefstathiou and Stamatis G. Kavadias and Dionisios N. Pnevmatikatos and Federico Silla and Dimitrios S. Nikolopoulos}, title = {Explicit Communication and Synchronization in {SARC}}, journal = {{IEEE} Micro}, volume = {30}, number = {5}, pages = {30--41}, year = {2010}, url = {https://doi.org/10.1109/MM.2010.77}, doi = {10.1109/MM.2010.77}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/micro/KatevenisPKPSN10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ancs/ChrysosCMKK10, author = {Nikolaos Chrysos and Lydia Y. Chen and Cyriel Minkenberg and Christoforos Kachris and Manolis Katevenis}, editor = {Bill Lin and Jeffrey C. Mogul and Ravishankar R. Iyer}, title = {End-to-end congestion management for non-blocking multi-stage switching fabrics}, booktitle = {Proceedings of the 2010 {ACM/IEEE} Symposium on Architecture for Networking and Communications Systems, {ANCS} 2010, San Diego, California, USA, October 25-26, 2010}, pages = {6}, publisher = {{ACM}}, year = {2010}, url = {https://doi.org/10.1145/1872007.1872016}, doi = {10.1145/1872007.1872016}, timestamp = {Mon, 15 May 2023 22:11:15 +0200}, biburl = {https://dblp.org/rec/conf/ancs/ChrysosCMKK10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cf/KavadiasKZN10, author = {Stamatis G. Kavadias and Manolis Katevenis and Michail Zampetakis and Dimitrios S. Nikolopoulos}, editor = {Nancy M. Amato and Hubertus Franke and Paul H. J. Kelly}, title = {On-chip communication and synchronization mechanisms with cache-integrated network interfaces}, booktitle = {Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010}, pages = {217--226}, publisher = {{ACM}}, year = {2010}, url = {https://doi.org/10.1145/1787275.1787328}, doi = {10.1145/1787275.1787328}, timestamp = {Wed, 25 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cf/KavadiasKZN10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpt/YangKK10, author = {Xiaojun Yang and Christoforos Kachris and Manolis Katevenis}, editor = {Jinian Bian and Qiang Zhou and Peter Athanas and Yajun Ha and Kang Zhao}, title = {Efficient implementation of {CIOQ} switches with sequential iterative matching algorithms}, booktitle = {Proceedings of the International Conference on Field-Programmable Technology, {FPT} 2010, 8-10 December 2010, Tsinghua University, Beijing, China}, pages = {433--436}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/FPT.2010.5681453}, doi = {10.1109/FPT.2010.5681453}, timestamp = {Thu, 01 Feb 2018 14:20:39 +0100}, biburl = {https://dblp.org/rec/conf/fpt/YangKK10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/nocs/PassasKP10, author = {Giorgos Passas and Manolis Katevenis and Dionisios N. Pnevmatikatos}, title = {A 128 x 128 x 24Gb/s Crossbar Interconnecting 128 Tiles in a Single Hop and Occupying 6{\%} of Their Area}, booktitle = {{NOCS} 2010, Fourth {ACM/IEEE} International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010}, pages = {87--95}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/NOCS.2010.37}, doi = {10.1109/NOCS.2010.37}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/nocs/PassasKP10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/reconfig/KachrisNKPK10, author = {Christoforos Kachris and George Nikiforos and Stamatis G. Kavadias and Vassilis Papaefstathiou and Manolis Katevenis}, editor = {Viktor K. Prasanna and J{\"{u}}rgen Becker and Ren{\'{e}} Cumplido}, title = {Network Processing in Multi-core FPGAs with Integrated Cache-Network Interface}, booktitle = {ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 13-15 December 2010, Proceedings}, pages = {328--333}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/ReConFig.2010.51}, doi = {10.1109/RECONFIG.2010.51}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/reconfig/KachrisNKPK10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/KalokerinosPNKKPY09, author = {George Kalokerinos and Vassilis Papaefstathiou and George Nikiforos and Stamatis G. Kavadias and Manolis Katevenis and Dionisios N. Pnevmatikatos and Xiaojun Yang}, editor = {Walid A. Najjar and Michael J. Schulte}, title = {{FPGA} implementation of a configurable cache/scratchpad memory with virtualized user-level {RDMA} capability}, booktitle = {Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2009), Samos, Greece, July 20-23, 2009}, pages = {149--156}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/ICSAMOS.2009.5289226}, doi = {10.1109/ICSAMOS.2009.5289226}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/samos/KalokerinosPNKKPY09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/dt/SimosPK08, author = {Dimitrios Simos and Ioannis Papaefstathiou and Manolis Katevenis}, title = {Building an FoC Using Large, Buffered Crossbar Cores}, journal = {{IEEE} Des. Test Comput.}, volume = {25}, number = {6}, pages = {538--548}, year = {2008}, url = {https://doi.org/10.1109/MDT.2008.159}, doi = {10.1109/MDT.2008.159}, timestamp = {Mon, 03 Jan 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/dt/SimosPK08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/Katevenis08, author = {Manolis Katevenis}, editor = {Walid A. Najjar and Holger Blume}, title = {Towards unified mechanisms for inter-processor communication}, booktitle = {Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2008), Samos, Greece, July 21-24, 2008}, publisher = {{IEEE}}, year = {2008}, url = {https://doi.org/10.1109/ICSAMOS.2008.4664839}, doi = {10.1109/ICSAMOS.2008.4664839}, timestamp = {Thu, 25 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/samos/Katevenis08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/hipeac/2008, editor = {Per Stenstr{\"{o}}m and Michel Dubois and Manolis Katevenis and Rajiv Gupta and Theo Ungerer}, title = {High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, G{\"{o}}teborg, Sweden, January 27-29, 2008, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {4917}, publisher = {Springer}, year = {2008}, url = {https://doi.org/10.1007/978-3-540-77560-7}, doi = {10.1007/978-3-540-77560-7}, isbn = {978-3-540-77559-1}, timestamp = {Mon, 06 Dec 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hipeac/2008.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ton/IoannouK07, author = {Aggelos Ioannou and Manolis Katevenis}, title = {Pipelined heap (priority queue) management for advanced scheduling in high-speed networks}, journal = {{IEEE/ACM} Trans. Netw.}, volume = {15}, number = {2}, pages = {450--461}, year = {2007}, url = {http://doi.acm.org/10.1145/1279660.1279676}, doi = {10.1145/1279660.1279676}, timestamp = {Tue, 23 Oct 2007 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ton/IoannouK07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/nocs/MichelogiannakisPK07, author = {George Michelogiannakis and Dionisios N. Pnevmatikatos and Manolis Katevenis}, title = {Approaching Ideal NoC Latency with Pre-Configured Routes}, booktitle = {First International Symposium on Networks-on-Chips, {NOCS} 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings}, pages = {153--162}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/NOCS.2007.10}, doi = {10.1109/NOCS.2007.10}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/nocs/MichelogiannakisPK07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/PapaefstathiouPMKIPKMK07, author = {Vassilis Papaefstathiou and Dionisios N. Pnevmatikatos and Manolis Marazakis and Giorgos Kalokairinos and Aggelos Ioannou and Michael Papamichael and Stamatis G. Kavadias and Giorgos Mihelogiannakis and Manolis Katevenis}, editor = {Holger Blume and Georgi Gaydadjiev and C. John Glossner and Peter M. W. Knijnenburg}, title = {Prototyping Efficient Interprocessor Communication Mechanisms}, booktitle = {Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2007), Samos, Greece, July 16-19, 2007}, pages = {26--33}, publisher = {{IEEE}}, year = {2007}, url = {https://doi.org/10.1109/ICSAMOS.2007.4285730}, doi = {10.1109/ICSAMOS.2007.4285730}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/samos/PapaefstathiouPMKIPKMK07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/infocom/ChrysosK06, author = {Nikolaos Chrysos and Manolis Katevenis}, title = {Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics}, booktitle = {{INFOCOM} 2006. 25th {IEEE} International Conference on Computer Communications, Joint Conference of the {IEEE} Computer and Communications Societies, 23-29 April 2006, Barcelona, Catalunya, Spain}, publisher = {{IEEE}}, year = {2006}, url = {https://doi.org/10.1109/INFOCOM.2006.134}, doi = {10.1109/INFOCOM.2006.134}, timestamp = {Wed, 16 Oct 2019 14:14:51 +0200}, biburl = {https://dblp.org/rec/conf/infocom/ChrysosK06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/cm/SapountzisK05, author = {Georgios Sapountzis and Manolis Katevenis}, title = {Benes switching fabrics with O(N)-complexity internal backpressure}, journal = {{IEEE} Commun. Mag.}, volume = {43}, number = {1}, pages = {88--94}, year = {2005}, url = {https://doi.org/10.1109/MCOM.2005.1381880}, doi = {10.1109/MCOM.2005.1381880}, timestamp = {Tue, 25 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/cm/SapountzisK05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/globecom/ChrysosK05, author = {Nikolaos Chrysos and Manolis Katevenis}, title = {Scheduling in switches with small internal buffers}, booktitle = {Proceedings of the Global Telecommunications Conference, 2005. {GLOBECOM} '05, St. Louis, Missouri, USA, 28 November - 2 December 2005}, pages = {6}, publisher = {{IEEE}}, year = {2005}, url = {https://doi.org/10.1109/GLOCOM.2005.1577697}, doi = {10.1109/GLOCOM.2005.1577697}, timestamp = {Wed, 16 Oct 2019 14:14:51 +0200}, biburl = {https://dblp.org/rec/conf/globecom/ChrysosK05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icc/KatevenisP05, author = {Manolis Katevenis and Giorgos Passas}, title = {Variable-size multipacket segments in buffered crossbar {(CICQ)} architectures}, booktitle = {Proceedings of {IEEE} International Conference on Communications, {ICC} 2005, Seoul, Korea, 16-20 May 2005}, pages = {999--1004}, publisher = {{IEEE}}, year = {2005}, url = {https://doi.org/10.1109/ICC.2005.1494499}, doi = {10.1109/ICC.2005.1494499}, timestamp = {Wed, 16 Oct 2019 14:14:50 +0200}, biburl = {https://dblp.org/rec/conf/icc/KatevenisP05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/globecom/ChrysosK04, author = {Nikolaos Chrysos and Manolis Katevenis}, title = {Multiple priorities in a two-lane buffered crossbar}, booktitle = {Proceedings of the Global Telecommunications Conference, 2004. {GLOBECOM} '04, Dallas, Texas, USA, 29 November - 3 December 2004}, pages = {1180--1186}, publisher = {{IEEE}}, year = {2004}, url = {https://doi.org/10.1109/GLOCOM.2004.1378142}, doi = {10.1109/GLOCOM.2004.1378142}, timestamp = {Wed, 16 Oct 2019 14:14:51 +0200}, biburl = {https://dblp.org/rec/conf/globecom/ChrysosK04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icc/KatevenisPSPC04, author = {Manolis Katevenis and Giorgos Passas and Dimitrios Simos and Ioannis Papaefstathiou and Nikolaos Chrysos}, title = {Variable packet size buffered crossbar {(CICQ)} switches}, booktitle = {Proceedings of {IEEE} International Conference on Communications, {ICC} 2004, Paris, France, 20-24 June 2004}, pages = {1090--1096}, publisher = {{IEEE}}, year = {2004}, url = {https://doi.org/10.1109/ICC.2004.1312669}, doi = {10.1109/ICC.2004.1312669}, timestamp = {Mon, 03 Jan 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/icc/KatevenisPSPC04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ton/MarkatosPFK02, author = {Evangelos P. Markatos and Dionisios N. Pnevmatikatos and Michail Flouris and Manolis Katevenis}, title = {Web-conscious storage management for web proxies}, journal = {{IEEE/ACM} Trans. Netw.}, volume = {10}, number = {6}, pages = {735--748}, year = {2002}, url = {https://doi.org/10.1109/TNET.2002.804836}, doi = {10.1109/TNET.2002.804836}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ton/MarkatosPFK02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ton/KatevenisMSKMG01, author = {Manolis Katevenis and Iakovos Mavroidis and Georgios Sapountzis and Evangelia Kalyvianaki and Ioannis Mavroidis and Georgios Glykopoulos}, title = {Wormhole {IP} over (connectionless) {ATM}}, journal = {{IEEE/ACM} Trans. Netw.}, volume = {9}, number = {5}, pages = {650--661}, year = {2001}, url = {https://doi.org/10.1109/90.958332}, doi = {10.1109/90.958332}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ton/KatevenisMSKMG01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icc/IoannouK01, author = {Aggelos Ioannou and Manolis Katevenis}, title = {Pipelined heap (priority queue) management for advanced scheduling in high-speed networks}, booktitle = {{IEEE} International Conference on Communications, {ICC} 2001, June 11-14, Helsinki, Finland}, pages = {2043--2047}, publisher = {{IEEE}}, year = {2001}, url = {https://doi.org/10.1109/ICC.2001.936948}, doi = {10.1109/ICC.2001.936948}, timestamp = {Wed, 16 Oct 2019 14:14:50 +0200}, biburl = {https://dblp.org/rec/conf/icc/IoannouK01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icc/NikologiannisK01, author = {Aggelos Nikologiannis and Manolis Katevenis}, title = {Efficient per-flow queueing in {DRAM} at {OC-192} line rate using out-of-order execution techniques}, booktitle = {{IEEE} International Conference on Communications, {ICC} 2001, June 11-14, Helsinki, Finland}, pages = {2048--2052}, publisher = {{IEEE}}, year = {2001}, url = {https://doi.org/10.1109/ICC.2001.937019}, doi = {10.1109/ICC.2001.937019}, timestamp = {Thu, 25 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/icc/NikologiannisK01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/informaticaSI/KatevenisMVX99, author = {Manolis Katevenis and Evangelos P. Markatos and Penny Vatsolaki and Chara Xanthaki}, title = {The Remote Enqueue Operation on Networks of Workstations}, journal = {Informatica (Slovenia)}, volume = {23}, number = {1}, year = {1999}, timestamp = {Mon, 15 Feb 2016 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/informaticaSI/KatevenisMVX99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/micro/KornarosPVKXMSK99, author = {George Kornaros and Dionisios N. Pnevmatikatos and Panagiota Vatsolaki and George Kalokerinos and Chara Xanthaki and Dimitrios Mavroidis and Dimitrios N. Serpanos and Manolis Katevenis}, title = {{ATLAS} {I:} implementing a single-chip {ATM} switch with backpressure}, journal = {{IEEE} Micro}, volume = {19}, number = {1}, pages = {30--41}, year = {1999}, url = {https://doi.org/10.1109/40.748794}, doi = {10.1109/40.748794}, timestamp = {Sun, 02 Jun 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/micro/KornarosPVKXMSK99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/usits/MarkatosKPF99, author = {Evangelos P. Markatos and Manolis Katevenis and Dionisios N. Pnevmatikatos and Michail Flouris}, title = {Secondary Storage Management for Web Proxies}, booktitle = {2nd {USENIX} Symposium on Internet Technologies and Systems, USITS'99, Boulder, Colorado, USA, October 11-14, 1999}, publisher = {{USENIX}}, year = {1999}, url = {http://www.usenix.org/publications/library/proceedings/usits99/markatos.html}, timestamp = {Tue, 02 Feb 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/usits/MarkatosKPF99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/KatevenisSD98, author = {Manolis Katevenis and Dimitrios N. Serpanos and George Dimitriadis}, title = {{ATLAS} {I:} a single-chip, gigabit {ATM} switch with {HIC/HS} links arid multi-lane back-pressure}, journal = {Microprocess. Microsystems}, volume = {21}, number = {7-8}, pages = {481--490}, year = {1998}, url = {https://doi.org/10.1016/S0141-9331(98)00041-6}, doi = {10.1016/S0141-9331(98)00041-6}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/KatevenisSD98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/canpc/MarkatosKV98, author = {Evangelos P. Markatos and Manolis Katevenis and Penny Vatsolaki}, editor = {Dhabaleswar K. Panda and Craig B. Stunkel}, title = {The Remote Enqueue Operation on Networks of Workstations}, booktitle = {Network-Based Parallel Computing: Communication, Architecture, and Applications, Second International Workshop, {CANPC} '98, Las Vegas, Nevada, USA, January 31 - February 1, 1998, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {1362}, pages = {1--14}, publisher = {Springer}, year = {1998}, url = {https://doi.org/10.1007/BFb0052203}, doi = {10.1007/BFB0052203}, timestamp = {Thu, 10 Jun 2021 11:42:12 +0200}, biburl = {https://dblp.org/rec/conf/canpc/MarkatosKV98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpca/KatevenisSS98, author = {Manolis Katevenis and Dimitrios N. Serpanos and Emmanuel Spyridakis}, title = {Credit-Flow-Controlled {ATM} for {MP} Interconnection: The {ATLAS} {I} Single-Chip {ATM} Switch}, booktitle = {Proceedings of the Fourth International Symposium on High-Performance Computer Architecture, Las Vegas, Nevada, USA, January 31 - February 4, 1998}, pages = {47--56}, publisher = {{IEEE} Computer Society}, year = {1998}, url = {https://doi.org/10.1109/HPCA.1998.650545}, doi = {10.1109/HPCA.1998.650545}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hpca/KatevenisSS98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jpdc/KatevenisMKD97, author = {Manolis Katevenis and Evangelos P. Markatos and George Kalokerinos and Apostolos Dollas}, title = {Telegraphos: {A} Substrate for High-Performance Computing on Workstation Clusters}, journal = {J. Parallel Distributed Comput.}, volume = {43}, number = {2}, pages = {94--108}, year = {1997}, url = {https://doi.org/10.1006/jpdc.1997.1334}, doi = {10.1006/JPDC.1997.1334}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jpdc/KatevenisMKD97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/arvlsi/KornarosKVK97, author = {George Kornaros and Christoforos E. Kozyrakis and Panagiota Vatsolaki and Manolis Katevenis}, title = {Pipelined Multi-Queue Management in a {VLSI} {ATM} Switch Chip with Credit-Based Flow-Control}, booktitle = {17th Conference on Advanced Research in {VLSI} {(ARVLSI} '97), September 15-16, 1997, Ann Arbor, MI, {USA}}, pages = {127--144}, publisher = {{IEEE} Computer Society}, year = {1997}, url = {https://doi.org/10.1109/ARVLSI.1997.634851}, doi = {10.1109/ARVLSI.1997.634851}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/arvlsi/KornarosKVK97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/canpc/KatevenisVSM97, author = {Manolis Katevenis and Panagiota Vatsolaki and Dimitrios N. Serpanos and Evangelos P. Markatos}, editor = {Dhabaleswar K. Panda and Craig B. Stunkel}, title = {{ATLAS:} {A} Single-Chip {ATM} Switch for NOWs}, booktitle = {Communication and Architectural Support for Network-Based Parallel Computing, First International Workshop, {CANPC} '97, San Antonio, Texas, USA, February 1-2, 1997, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {1199}, pages = {88--101}, publisher = {Springer}, year = {1997}, url = {https://doi.org/10.1007/3-540-62573-9\_7}, doi = {10.1007/3-540-62573-9\_7}, timestamp = {Thu, 10 Jun 2021 11:42:12 +0200}, biburl = {https://dblp.org/rec/conf/canpc/KatevenisVSM97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpca/MarkatosK97, author = {Evangelos P. Markatos and Manolis Katevenis}, title = {User-Level {DMA} without Operating System Kernel Modification}, booktitle = {Proceedings of the 3rd {IEEE} Symposium on High-Performance Computer Architecture {(HPCA} '97), San Antonio, Texas, USA, February 1-5, 1997}, pages = {322--331}, publisher = {{IEEE} Computer Society}, year = {1997}, url = {https://doi.org/10.1109/HPCA.1997.569696}, doi = {10.1109/HPCA.1997.569696}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hpca/MarkatosK97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpca/MarkatosK96, author = {Evangelos P. Markatos and Manolis Katevenis}, title = {Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters}, booktitle = {Proceedings of the Second International Symposium on High-Performance Computer Architecture, San Jose, CA, USA, February 3-7, 1996}, pages = {144--153}, publisher = {{IEEE} Computer Society}, year = {1996}, url = {https://doi.org/10.1109/HPCA.1996.501181}, doi = {10.1109/HPCA.1996.501181}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hpca/MarkatosK96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sigcomm/KatevenisVE95, author = {Manolis Katevenis and Panagiota Vatsolaki and Aristides Efthymiou}, editor = {Stuart Wecker and David Oran}, title = {Pipelined Memory Shared Buffer for {VLSI} Switches}, booktitle = {Proceedings of the {ACM} {SIGCOMM} 1995 Conference on Applications, Technologies, Architectures, and Protocols for Computer Communication, Cambridge, MA, USA, August 28 - September 1, 1995}, pages = {39--48}, publisher = {{ACM}}, year = {1995}, url = {https://doi.org/10.1145/217382.217406}, doi = {10.1145/217382.217406}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/sigcomm/KatevenisVE95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsac/KatevenisSC91, author = {Manolis Katevenis and Stefanos Sidiropoulos and Costas Courcoubetis}, title = {Weighted Round-Robin Cell Multiplexing in a General-Purpose {ATM} Switch Chip}, journal = {{IEEE} J. Sel. Areas Commun.}, volume = {9}, number = {8}, pages = {1265--1279}, year = {1991}, url = {https://doi.org/10.1109/49.105173}, doi = {10.1109/49.105173}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jsac/KatevenisSC91.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/asplos/KatevenisT91, author = {Manolis Katevenis and Nestoras Tzartzanis}, editor = {David A. Patterson and Bob Rau}, title = {Reducing the Branch Penalty by Rearranging Instructions in Double-Width Memory}, booktitle = {{ASPLOS-IV} Proceedings - Forth International Conference on Architectural Support for Programming Languages and Operating Systems, Santa Clara, California, USA, April 8-11, 1991}, pages = {15--27}, publisher = {{ACM} Press}, year = {1991}, url = {https://doi.org/10.1145/106972.106977}, doi = {10.1145/106972.106977}, timestamp = {Thu, 13 Apr 2023 19:55:42 +0200}, biburl = {https://dblp.org/rec/conf/asplos/KatevenisT91.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsac/Katevenis87, author = {Manolis Katevenis}, title = {Fast switching and fair control of congested flow in broadband networks}, journal = {{IEEE} J. Sel. Areas Commun.}, volume = {5}, number = {8}, pages = {1315--1326}, year = {1987}, url = {https://doi.org/10.1109/JSAC.1987.1146657}, doi = {10.1109/JSAC.1987.1146657}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jsac/Katevenis87.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/VladimirescuWKBKDNJL87, author = {Andrei Vladimirescu and David Weiss and Manolis Katevenis and Zvika Bronstein and Alon Kifir and Karja Danuwidjaja and K. C. Ng and Niraj Jain and Steven Lass}, editor = {A. O'Neill and D. Thomas}, title = {A Vector Hardware Accelerator with Circuit Simulation Emphasis}, booktitle = {Proceedings of the 24th {ACM/IEEE} Design Automation Conference. Miami Beach, FL, USA, June 28 - July 1, 1987}, pages = {89--94}, publisher = {{IEEE} Computer Society Press / {ACM}}, year = {1987}, url = {https://doi.org/10.1145/37888.37901}, doi = {10.1145/37888.37901}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/VladimirescuWKBKDNJL87.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/sigarch/FitzpatrickFKLP82, author = {Daniel T. Fitzpatrick and John K. Foderaro and Manolis G. H. Katevenis and Howard A. Landman and David A. Patterson and James B. Peek and Zvi Peshkess and Carlo H. S{\'{e}}quin and Robert W. Sherburne and Korbin S. Van Dyke}, title = {A RISCy approach to {VLSI}}, journal = {{SIGARCH} Comput. Archit. News}, volume = {10}, number = {1}, pages = {28--32}, year = {1982}, url = {https://doi.org/10.1145/859520.859524}, doi = {10.1145/859520.859524}, timestamp = {Thu, 13 Apr 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/sigarch/FitzpatrickFKLP82.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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