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ORCIDBibTeX records: Warren A. Hunt Jr.
@inproceedings{DBLP:journals/corr/abs-2205-11698,
author = {Warren A. Hunt Jr. and
Vivek Ramanathan and
J Strother Moore},
editor = {Rob Sumners and
Cuong Chau},
title = {{VWSIM:} {A} Circuit Simulator},
booktitle = {Proceedings Seventeenth International Workshop on the {ACL2} Theorem
Prover and its Applications, Austin, Texas, USA, 26th-27th May 2022},
series = {{EPTCS}},
volume = {359},
pages = {61--75},
year = {2022},
url = {https://doi.org/10.4204/EPTCS.359.7},
doi = {10.4204/EPTCS.359.7},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2205-11698.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/ChauHKRS19,
author = {Cuong K. Chau and
Warren A. Hunt Jr. and
Matt Kaufmann and
Marly Roncken and
Ivan E. Sutherland},
title = {A Hierarchical Approach to Self-Timed Circuit Verification},
booktitle = {25th {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2019, Hirosaki, Japan, May 12-15, 2019},
pages = {105--113},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASYNC.2019.00022},
doi = {10.1109/ASYNC.2019.00022},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/async/ChauHKRS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/ChauHKRS18,
author = {Cuong K. Chau and
Warren A. Hunt Jr. and
Matt Kaufmann and
Marly Roncken and
Ivan E. Sutherland},
title = {Data-Loop-Free Self-Timed Circuit Verification},
booktitle = {24th {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2018, Vienna, Austria, May 13-16, 2018},
pages = {51--58},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASYNC.2018.00023},
doi = {10.1109/ASYNC.2018.00023},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/async/ChauHKRS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acssc/RonckenSCHHCGPS17,
author = {Marly Roncken and
Ivan E. Sutherland and
Chris Chen and
Yong Hei and
Warren A. Hunt Jr. and
Cuong K. Chau and
Swetha Mettala Gilla and
Hoon Park and
Xiaoyu Song and
Anping He and
Hong Chen},
editor = {Michael B. Matthews},
title = {How to think about self-timed systems},
booktitle = {51st Asilomar Conference on Signals, Systems, and Computers, {ACSSC}
2017, Pacific Grove, CA, USA, October 29 - November 1, 2017},
pages = {1597--1604},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ACSSC.2017.8335628},
doi = {10.1109/ACSSC.2017.8335628},
timestamp = {Wed, 27 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/acssc/RonckenSCHHCGPS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cade/Cruz-FilipeHHKS17,
author = {Lu{\'{\i}}s Cruz{-}Filipe and
Marijn J. H. Heule and
Warren A. Hunt Jr. and
Matt Kaufmann and
Peter Schneider{-}Kamp},
editor = {Leonardo de Moura},
title = {Efficient Certified {RAT} Verification},
booktitle = {Automated Deduction - {CADE} 26 - 26th International Conference on
Automated Deduction, Gothenburg, Sweden, August 6-11, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10395},
pages = {220--236},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-63046-5\_14},
doi = {10.1007/978-3-319-63046-5\_14},
timestamp = {Thu, 29 Sep 2022 08:36:56 +0200},
biburl = {https://dblp.org/rec/conf/cade/Cruz-FilipeHHKS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hvc/ChauHRS17,
author = {Cuong K. Chau and
Warren A. Hunt Jr. and
Marly Roncken and
Ivan E. Sutherland},
editor = {Ofer Strichman and
Rachel Tzoref{-}Brill},
title = {A Framework for Asynchronous Circuit Modeling and Verification in
{ACL2}},
booktitle = {Hardware and Software: Verification and Testing - 13th International
Haifa Verification Conference, {HVC} 2017, Haifa, Israel, November
13-15, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10629},
pages = {3--18},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-70389-3\_1},
doi = {10.1007/978-3-319-70389-3\_1},
timestamp = {Sat, 19 Oct 2019 20:27:11 +0200},
biburl = {https://dblp.org/rec/conf/hvc/ChauHRS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itp/HeuleHKW17,
author = {Marijn Heule and
Warren A. Hunt Jr. and
Matt Kaufmann and
Nathan Wetzler},
editor = {Mauricio Ayala{-}Rinc{\'{o}}n and
C{\'{e}}sar A. Mu{\~{n}}oz},
title = {Efficient, Verified Checking of Propositional Proofs},
booktitle = {Interactive Theorem Proving - 8th International Conference, {ITP}
2017, Bras{\'{\i}}lia, Brazil, September 26-29, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10499},
pages = {269--284},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-66107-0\_18},
doi = {10.1007/978-3-319-66107-0\_18},
timestamp = {Tue, 14 May 2019 10:00:37 +0200},
biburl = {https://dblp.org/rec/conf/itp/HeuleHKW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/17/GoelHK17,
author = {Shilpi Goel and
Warren A. Hunt Jr. and
Matt Kaufmann},
editor = {Michael G. Hinchey and
Jonathan P. Bowen and
Ernst{-}R{\"{u}}diger Olderog},
title = {Engineering a Formal, Executable x86 {ISA} Simulator for Software
Verification},
booktitle = {Provably Correct Systems},
series = {{NASA} Monographs in Systems and Software Engineering},
pages = {173--209},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-48628-4\_8},
doi = {10.1007/978-3-319-48628-4\_8},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/sp/17/GoelHK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:journals/corr/SlobodovaJ17,
editor = {Anna Slobodov{\'{a}} and
Warren A. Hunt Jr.},
title = {Proceedings 14th International Workshop on the {ACL2} Theorem Prover
and its Applications, Austin, Texas, USA, May 22-23, 2017},
series = {{EPTCS}},
volume = {249},
year = {2017},
url = {http://arxiv.org/abs/1705.00766},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/SlobodovaJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/Cruz-FilipeHHKS16,
author = {Lu{\'{\i}}s Cruz{-}Filipe and
Marijn Heule and
Warren A. Hunt Jr. and
Matt Kaufmann and
Peter Schneider{-}Kamp},
title = {Efficient Certified {RAT} Verification},
journal = {CoRR},
volume = {abs/1612.02353},
year = {2016},
url = {http://arxiv.org/abs/1612.02353},
eprinttype = {arXiv},
eprint = {1612.02353},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/Cruz-FilipeHHKS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cade/HeuleHW15,
author = {Marijn Heule and
Warren A. Hunt Jr. and
Nathan Wetzler},
editor = {Amy P. Felty and
Aart Middeldorp},
title = {Expressing Symmetry Breaking in {DRAT} Proofs},
booktitle = {Automated Deduction - {CADE-25} - 25th International Conference on
Automated Deduction, Berlin, Germany, August 1-7, 2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9195},
pages = {591--606},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-21401-6\_40},
doi = {10.1007/978-3-319-21401-6\_40},
timestamp = {Tue, 14 May 2019 10:00:39 +0200},
biburl = {https://dblp.org/rec/conf/cade/HeuleHW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:journals/corr/ChauKH15,
author = {Cuong K. Chau and
Matt Kaufmann and
Warren A. Hunt Jr.},
editor = {Matt Kaufmann and
David L. Rager},
title = {Fourier Series Formalization in ACL2(r)},
booktitle = {Proceedings Thirteenth International Workshop on the {ACL2} Theorem
Prover and Its Applications, Austin, Texas, USA, 1-2 October 2015},
series = {{EPTCS}},
volume = {192},
pages = {35--51},
year = {2015},
url = {https://doi.org/10.4204/EPTCS.192.4},
doi = {10.4204/EPTCS.192.4},
timestamp = {Wed, 12 Sep 2018 01:05:14 +0200},
biburl = {https://dblp.org/rec/journals/corr/ChauKH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/stvr/HeuleHW14,
author = {Marijn Heule and
Warren A. Hunt Jr. and
Nathan Wetzler},
title = {Bridging the gap between easy generation and efficient verification
of unsatisfiability proofs},
journal = {Softw. Test. Verification Reliab.},
volume = {24},
number = {8},
pages = {593--607},
year = {2014},
url = {https://doi.org/10.1002/stvr.1549},
doi = {10.1002/STVR.1549},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/stvr/HeuleHW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmcad/GoelHKG14,
author = {Shilpi Goel and
Warren A. Hunt Jr. and
Matt Kaufmann and
Soumava Ghosh},
title = {Simulation and formal verification of x86 machine-code programs that
make system calls},
booktitle = {Formal Methods in Computer-Aided Design, {FMCAD} 2014, Lausanne, Switzerland,
October 21-24, 2014},
pages = {91--98},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FMCAD.2014.6987600},
doi = {10.1109/FMCAD.2014.6987600},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fmcad/GoelHKG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sat/WetzlerHH14,
author = {Nathan Wetzler and
Marijn Heule and
Warren A. Hunt Jr.},
editor = {Carsten Sinz and
Uwe Egly},
title = {DRAT-trim: Efficient Checking and Trimming Using Expressive Clausal
Proofs},
booktitle = {Theory and Applications of Satisfiability Testing - {SAT} 2014 - 17th
International Conference, Held as Part of the Vienna Summer of Logic,
{VSL} 2014, Vienna, Austria, July 14-17, 2014. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {8561},
pages = {422--429},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-09284-3\_31},
doi = {10.1007/978-3-319-09284-3\_31},
timestamp = {Tue, 14 May 2019 10:00:41 +0200},
biburl = {https://dblp.org/rec/conf/sat/WetzlerHH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cade/HeuleHW13,
author = {Marijn Heule and
Warren A. Hunt Jr. and
Nathan Wetzler},
editor = {Maria Paola Bonacina},
title = {Verifying Refutations with Extended Resolution},
booktitle = {Automated Deduction - {CADE-24} - 24th International Conference on
Automated Deduction, Lake Placid, NY, USA, June 9-14, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7898},
pages = {345--359},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-38574-2\_24},
doi = {10.1007/978-3-642-38574-2\_24},
timestamp = {Tue, 14 May 2019 10:00:39 +0200},
biburl = {https://dblp.org/rec/conf/cade/HeuleHW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmcad/HeuleHW13,
author = {Marijn Heule and
Warren A. Hunt Jr. and
Nathan Wetzler},
title = {Trimming while checking clausal proofs},
booktitle = {Formal Methods in Computer-Aided Design, {FMCAD} 2013, Portland, OR,
USA, October 20-23, 2013},
pages = {181--188},
publisher = {{IEEE}},
year = {2013},
url = {https://ieeexplore.ieee.org/document/6679408/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fmcad/HeuleHW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itp/WetzlerHH13,
author = {Nathan Wetzler and
Marijn Heule and
Warren A. Hunt Jr.},
editor = {Sandrine Blazy and
Christine Paulin{-}Mohring and
David Pichardie},
title = {Mechanical Verification of {SAT} Refutations with Extended Resolution},
booktitle = {Interactive Theorem Proving - 4th International Conference, {ITP}
2013, Rennes, France, July 22-26, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7998},
pages = {229--244},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-39634-2\_18},
doi = {10.1007/978-3-642-39634-2\_18},
timestamp = {Wed, 25 Sep 2019 18:17:56 +0200},
biburl = {https://dblp.org/rec/conf/itp/WetzlerHH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itp/RagerHK13,
author = {David L. Rager and
Warren A. Hunt Jr. and
Matt Kaufmann},
editor = {Sandrine Blazy and
Christine Paulin{-}Mohring and
David Pichardie},
title = {A Parallelized Theorem Prover for a Logic with Parallel Execution},
booktitle = {Interactive Theorem Proving - 4th International Conference, {ITP}
2013, Rennes, France, July 22-26, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7998},
pages = {435--450},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-39634-2\_31},
doi = {10.1007/978-3-642-39634-2\_31},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itp/RagerHK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vstte/GoelH13,
author = {Shilpi Goel and
Warren A. Hunt Jr.},
editor = {Ernie Cohen and
Andrey Rybalchenko},
title = {Automated Code Proofs on a Formal Model of the {X86}},
booktitle = {Verified Software: Theories, Tools, Experiments - 5th International
Conference, {VSTTE} 2013, Menlo Park, CA, USA, May 17-19, 2013, Revised
Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {8164},
pages = {222--241},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-54108-7\_12},
doi = {10.1007/978-3-642-54108-7\_12},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/vstte/GoelH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:journals/corr/abs-1304-7858,
author = {Shilpi Goel and
Warren A. Hunt Jr. and
Matt Kaufmann},
editor = {Ruben Gamboa and
Jared Davis},
title = {Abstract Stobjs and Their Application to {ISA} Modeling},
booktitle = {Proceedings International Workshop on the {ACL2} Theorem Prover and
its Applications, {ACL2} 2013, Laramie, Wyoming, USA, May 30-31, 2013},
series = {{EPTCS}},
volume = {114},
pages = {54--69},
year = {2013},
url = {https://doi.org/10.4204/EPTCS.114.5},
doi = {10.4204/EPTCS.114.5},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1304-7858.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmcad/HuntK12,
author = {Warren A. Hunt Jr. and
Matt Kaufmann},
editor = {Gianpiero Cabodi and
Satnam Singh},
title = {A formal model of a large memory that supports efficient execution},
booktitle = {Formal Methods in Computer-Aided Design, {FMCAD} 2012, Cambridge,
UK, October 22-25, 2012},
pages = {60--67},
publisher = {{IEEE}},
year = {2012},
url = {https://ieeexplore.ieee.org/document/6462556/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fmcad/HuntK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/els/RagerHK11,
author = {David L. Rager and
Warren A. Hunt Jr. and
Matt Kaufmann},
editor = {Didier Verna},
title = {A Futures Library and Parallelism Abstractions for a Functional Subset
of Lisp},
booktitle = {Proceedings of {ELS} 2011 - 4th European Lisp Symposium, Hamburg,
Germany, March 31 - April 1, 2011},
pages = {13--16},
publisher = {{ELSAA}},
year = {2011},
url = {https://european-lisp-symposium.org/static/proceedings/2011.pdf\#page=21},
timestamp = {Thu, 14 Nov 2019 17:08:10 +0100},
biburl = {https://dblp.org/rec/conf/els/RagerHK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memocode/SlobodovaDSH11,
author = {Anna Slobodov{\'{a}} and
Jared Davis and
Sol Swords and
Warren A. Hunt Jr.},
editor = {Satnam Singh and
Barbara Jobstmann and
Michael Kishinevsky and
Jens Brandt},
title = {A flexible formal verification framework for industrial scale validation},
booktitle = {9th {IEEE/ACM} International Conference on Formal Methods and Models
for Codesign, {MEMOCODE} 2011, Cambridge, UK, 11-13 July, 2011},
pages = {89--97},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/MEMCOD.2011.5970515},
doi = {10.1109/MEMCOD.2011.5970515},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memocode/SlobodovaDSH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmcad/Hunt10,
author = {Warren A. Hunt Jr.},
editor = {Roderick Bloem and
Natasha Sharygina},
title = {Verifying {VIA} Nano microprocessor components},
booktitle = {Proceedings of 10th International Conference on Formal Methods in
Computer-Aided Design, {FMCAD} 2010, Lugano, Switzerland, October
20-23},
pages = {3--10},
publisher = {{IEEE}},
year = {2010},
url = {https://ieeexplore.ieee.org/document/5770925/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fmcad/Hunt10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isaim/Hunt10,
author = {Warren A. Hunt Jr.},
title = {Using mathematics on an industrial scale},
booktitle = {International Symposium on Artificial Intelligence and Mathematics,
{ISAIM} 2010, Fort Lauderdale, Florida, USA, January 6-8, 2010},
year = {2010},
url = {http://gauss.ececs.uc.edu/Workshops/isaim2010/papers/check.html},
timestamp = {Wed, 20 Mar 2024 17:48:50 +0100},
biburl = {https://dblp.org/rec/conf/isaim/Hunt10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itp/SwordsH10,
author = {Sol Swords and
Warren A. Hunt Jr.},
editor = {Matt Kaufmann and
Lawrence C. Paulson},
title = {A Mechanically Verified AIG-to-BDD Conversion Algorithm},
booktitle = {Interactive Theorem Proving, First International Conference, {ITP}
2010, Edinburgh, UK, July 11-14, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6172},
pages = {435--449},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-14052-5\_30},
doi = {10.1007/978-3-642-14052-5\_30},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itp/SwordsH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/10/HuntSDS10,
author = {Warren A. Hunt Jr. and
Sol Swords and
Jared Davis and
Anna Slobodov{\'{a}}},
editor = {David S. Hardin},
title = {Use of Formal Verification at Centaur Technology},
booktitle = {Design and Verification of Microprocessor Systems for High-Assurance
Applications},
pages = {65--88},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-1-4419-1539-9\_3},
doi = {10.1007/978-1-4419-1539-9\_3},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/sp/10/HuntSDS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/HuntS09,
author = {Warren A. Hunt Jr. and
Sol Swords},
editor = {Ahmed Bouajjani and
Oded Maler},
title = {Centaur Technology Media Unit Verification},
booktitle = {Computer Aided Verification, 21st International Conference, {CAV}
2009, Grenoble, France, June 26 - July 2, 2009. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5643},
pages = {353--367},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-02658-4\_28},
doi = {10.1007/978-3-642-02658-4\_28},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cav/HuntS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmcad/RayH09,
author = {Sandip Ray and
Warren A. Hunt Jr.},
title = {Connecting pre-silicon and post-silicon verification},
booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided
Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}},
pages = {160--163},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FMCAD.2009.5351128},
doi = {10.1109/FMCAD.2009.5351128},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/fmcad/RayH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jar/RayHMM08,
author = {Sandip Ray and
Warren A. Hunt Jr. and
John Matthews and
J Strother Moore},
title = {A Mechanical Analysis of Program Verification Strategies},
journal = {J. Autom. Reason.},
volume = {40},
number = {4},
pages = {245--269},
year = {2008},
url = {https://doi.org/10.1007/s10817-008-9098-1},
doi = {10.1007/S10817-008-9098-1},
timestamp = {Wed, 02 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jar/RayHMM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmcad/HuntKRY08,
author = {Warren A. Hunt Jr. and
Robert Bellarmine Krug and
Sandip Ray and
William D. Young},
editor = {Alessandro Cimatti and
Robert B. Jones},
title = {Mechanized Information Flow Analysis through Inductive Assertions},
booktitle = {Formal Methods in Computer-Aided Design, {FMCAD} 2008, Portland, Oregon,
USA, 17-20 November 2008},
pages = {1--4},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FMCAD.2008.ECP.33},
doi = {10.1109/FMCAD.2008.ECP.33},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/fmcad/HuntKRY08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtv/RayH07,
author = {Sandip Ray and
Warren A. Hunt Jr.},
editor = {Magdy S. Abadir and
Li{-}C. Wang and
Jayanta Bhadra},
title = {Mechanized Certification of Secure Hardware Designs},
booktitle = {Eighth International Workshop on Microprocessor Test and Verification
{(MTV} 2007), Common Challenges and Solutions, 5-6 December 2007,
Austin, Texas, {USA}},
pages = {25--32},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/MTV.2007.16},
doi = {10.1109/MTV.2007.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mtv/RayH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acl2/GordonHKR06,
author = {Michael J. C. Gordon and
Warren A. Hunt Jr. and
Matt Kaufmann and
James Reynolds},
editor = {Panagiotis Manolios and
Matthew Wilding},
title = {An embedding of the {ACL2} logic in {HOL}},
booktitle = {Proceedings of the Sixth International Workshop on the {ACL2} Theorem
Prover and its Applications, {ACL2} 2006, Seattle, Washington, USA,
August 15-16, 2006},
pages = {40--46},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1217975.1217984},
doi = {10.1145/1217975.1217984},
timestamp = {Tue, 23 Jun 2020 17:42:40 +0200},
biburl = {https://dblp.org/rec/conf/acl2/GordonHKR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acl2/BoyerHH06,
author = {Robert S. Boyer and
Warren A. Hunt Jr.},
editor = {Panagiotis Manolios and
Matthew Wilding},
title = {Function memoization and unique object representation for {ACL2} functions},
booktitle = {Proceedings of the Sixth International Workshop on the {ACL2} Theorem
Prover and its Applications, {ACL2} 2006, Seattle, Washington, USA,
August 15-16, 2006},
pages = {81--89},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1217975.1217992},
doi = {10.1145/1217975.1217992},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/acl2/BoyerHH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acl2/HuntN06,
author = {Warren A. Hunt Jr. and
Serita M. Nelesen},
editor = {Panagiotis Manolios and
Matthew Wilding},
title = {Phylogenetic trees in {ACL2}},
booktitle = {Proceedings of the Sixth International Workshop on the {ACL2} Theorem
Prover and its Applications, {ACL2} 2006, Seattle, Washington, USA,
August 15-16, 2006},
pages = {99--102},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1217975.1217996},
doi = {10.1145/1217975.1217996},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/acl2/HuntN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acl2/HuntR06,
author = {Warren A. Hunt Jr. and
Erik Reeber},
editor = {Panagiotis Manolios and
Matthew Wilding},
title = {A SAT-based procedure for verifying finite state machines in {ACL2}},
booktitle = {Proceedings of the Sixth International Workshop on the {ACL2} Theorem
Prover and its Applications, {ACL2} 2006, Seattle, Washington, USA,
August 15-16, 2006},
pages = {127--135},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1217975.1218001},
doi = {10.1145/1217975.1218001},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/acl2/HuntR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cade/ReeberH06,
author = {Erik Reeber and
Warren A. Hunt Jr.},
editor = {Ulrich Furbach and
Natarajan Shankar},
title = {A SAT-Based Decision Procedure for the Subclass of Unrollable List
Formulas in {ACL2} {(SULFA)}},
booktitle = {Automated Reasoning, Third International Joint Conference, {IJCAR}
2006, Seattle, WA, USA, August 17-20, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4130},
pages = {453--467},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11814771\_38},
doi = {10.1007/11814771\_38},
timestamp = {Tue, 14 May 2019 10:00:39 +0200},
biburl = {https://dblp.org/rec/conf/cade/ReeberH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ViswanathAJ06,
author = {Vinod Viswanath and
Jacob A. Abraham and
Warren A. Hunt Jr.},
editor = {Georges G. E. Gielen},
title = {Automatic insertion of low power annotations in {RTL} for pipelined
microprocessors},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {496--501},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.243858},
doi = {10.1109/DATE.2006.243858},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ViswanathAJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmcad/GordonRHK06,
author = {Michael J. C. Gordon and
James Reynolds and
Warren A. Hunt Jr. and
Matt Kaufmann},
title = {An Integration of {HOL} and {ACL2}},
booktitle = {Formal Methods in Computer-Aided Design, 6th International Conference,
{FMCAD} 2006, San Jose, California, USA, November 12-16, 2006, Proceedings},
pages = {153--160},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/FMCAD.2006.6},
doi = {10.1109/FMCAD.2006.6},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fmcad/GordonRHK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/HuntR05,
author = {Warren A. Hunt Jr. and
Erik Reeber},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Formalization of the {DE2} Language},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {20--34},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_5},
doi = {10.1007/11560548\_5},
timestamp = {Tue, 14 May 2019 10:00:39 +0200},
biburl = {https://dblp.org/rec/conf/charme/HuntR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/tphol/HuntKKMS05,
author = {Warren A. Hunt Jr. and
Matt Kaufmann and
Robert Bellarmine Krug and
J Strother Moore and
Eric Whitman Smith},
editor = {Joe Hurd and
Thomas F. Melham},
title = {Meta Reasoning in {ACL2}},
booktitle = {Theorem Proving in Higher Order Logics, 18th International Conference,
TPHOLs 2005, Oxford, UK, August 22-25, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3603},
pages = {163--178},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11541868\_11},
doi = {10.1007/11541868\_11},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/tphol/HuntKKMS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wabi/BoyerHN05,
author = {Robert S. Boyer and
Warren A. Hunt Jr. and
Serita M. Nelesen},
editor = {Rita Casadio and
Gene Myers},
title = {A Compressed Format for Collections of Phylogenetic Trees and Improved
Consensus Performance},
booktitle = {Algorithms in Bioinformatics, 5th International Workshop, {WABI} 2005,
Mallorca, Spain, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3692},
pages = {353--364},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11557067\_29},
doi = {10.1007/11557067\_29},
timestamp = {Tue, 14 May 2019 10:00:40 +0200},
biburl = {https://dblp.org/rec/conf/wabi/BoyerHN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/RayH04,
author = {Sandip Ray and
Warren A. Hunt Jr.},
editor = {Rajeev Alur and
Doron A. Peled},
title = {Deductive Verification of Pipelined Machines Using First-Order Quantification},
booktitle = {Computer Aided Verification, 16th International Conference, {CAV}
2004, Boston, MA, USA, July 13-17, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3114},
pages = {31--43},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-27813-9\_3},
doi = {10.1007/978-3-540-27813-9\_3},
timestamp = {Tue, 14 May 2019 10:00:43 +0200},
biburl = {https://dblp.org/rec/conf/cav/RayH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/Hunt04,
author = {Warren A. Hunt Jr.},
editor = {Rajeev Alur and
Doron A. Peled},
title = {Mechanical Mathematical Methods for Microprocessor Verification},
booktitle = {Computer Aided Verification, 16th International Conference, {CAV}
2004, Boston, MA, USA, July 13-17, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3114},
pages = {523--533},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-27813-9\_51},
doi = {10.1007/978-3-540-27813-9\_51},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cav/Hunt04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fmsd/GopalakrishnanH03,
author = {Ganesh Gopalakrishnan and
Warren A. Hunt Jr.},
title = {Industrial Practice of Formal Hardware Verification: {A} Sampling},
journal = {Formal Methods Syst. Des.},
volume = {22},
number = {2},
pages = {95--99},
year = {2003},
url = {https://doi.org/10.1023/A:1022912616963},
doi = {10.1023/A:1022912616963},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fmsd/GopalakrishnanH03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fmsd/AdamsHJ03,
author = {William Adams and
Warren A. Hunt Jr. and
Damir Jamsek},
title = {Verisym: Verifying Circuits by Symbolic Simulation},
journal = {Formal Methods Syst. Des.},
volume = {22},
number = {2},
pages = {163--173},
year = {2003},
url = {https://doi.org/10.1023/A:1022977607142},
doi = {10.1023/A:1022977607142},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fmsd/AdamsHJ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/HuntKM03,
author = {Warren A. Hunt Jr. and
Robert Bellarmine Krug and
J Strother Moore},
editor = {Daniel Geist and
Enrico Tronci},
title = {Linear and Nonlinear Arithmetic in {ACL2}},
booktitle = {Correct Hardware Design and Verification Methods, 12th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2003, L'Aquila,
Italy, October 21-24, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2860},
pages = {319--333},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-39724-3\_29},
doi = {10.1007/978-3-540-39724-3\_29},
timestamp = {Tue, 14 May 2019 10:00:39 +0200},
biburl = {https://dblp.org/rec/conf/charme/HuntKM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cav/2003,
editor = {Warren A. Hunt Jr. and
Fabio Somenzi},
title = {Computer Aided Verification, 15th International Conference, {CAV}
2003, Boulder, CO, USA, July 8-12, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2725},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/b11831},
doi = {10.1007/B11831},
isbn = {3-540-40524-0},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cav/2003.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fmsd/Hunt02,
author = {Warren A. Hunt Jr.},
title = {Introduction: Special Issue on Microprocessor Verifications},
journal = {Formal Methods Syst. Des.},
volume = {20},
number = {2},
pages = {135--137},
year = {2002},
url = {https://doi.org/10.1023/A:1014175712530},
doi = {10.1023/A:1014175712530},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fmsd/Hunt02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fmsd/SawadaH02,
author = {Jun Sawada and
Warren A. Hunt Jr.},
title = {Verification of {FM9801:} An Out-of-Order Microprocessor Model with
Speculative Execution, Exceptions, and Program-Modifying Capability},
journal = {Formal Methods Syst. Des.},
volume = {20},
number = {2},
pages = {187--222},
year = {2002},
url = {https://doi.org/10.1023/A:1014122630277},
doi = {10.1023/A:1014122630277},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fmsd/SawadaH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmcad/SawadaH00,
author = {Jun Sawada and
Warren A. Hunt Jr.},
editor = {Warren A. Hunt Jr. and
Steven D. Johnson},
title = {Hardware Modeling Using Function Encapsulation},
booktitle = {Formal Methods in Computer-Aided Design, Third International Conference,
{FMCAD} 2000, Austin, Texas, USA, November 1-3, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1954},
pages = {234--245},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-40922-X\_15},
doi = {10.1007/3-540-40922-X\_15},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/fmcad/SawadaH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fmcad/2000,
editor = {Warren A. Hunt Jr. and
Steven D. Johnson},
title = {Formal Methods in Computer-Aided Design, Third International Conference,
{FMCAD} 2000, Austin, Texas, USA, November 1-3, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1954},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-40922-X},
doi = {10.1007/3-540-40922-X},
isbn = {3-540-41219-0},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fmcad/2000.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/HuntS99,
author = {Warren A. Hunt Jr. and
Jun Sawada},
title = {Verifying the {FM9801} microarchitecture},
journal = {{IEEE} Micro},
volume = {19},
number = {3},
pages = {47--55},
year = {1999},
url = {https://doi.org/10.1109/40.768503},
doi = {10.1109/40.768503},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/HuntS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/SawadaJ99,
author = {Jun Sawada and
Warren A. Hunt Jr.},
editor = {Laurence Pierre and
Thomas Kropf},
title = {Results of the Verification of a Complex Pipelined Machine Model},
booktitle = {Correct Hardware Design and Verification Methods, 10th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} '99, Bad Herrenalb,
Germany, September 27-29, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1703},
pages = {313--316},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/3-540-48153-2\_23},
doi = {10.1007/3-540-48153-2\_23},
timestamp = {Tue, 14 May 2019 10:00:39 +0200},
biburl = {https://dblp.org/rec/conf/charme/SawadaJ99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/SawadaH98,
author = {Jun Sawada and
Warren A. Hunt Jr.},
editor = {Alan J. Hu and
Moshe Y. Vardi},
title = {Processor Verification with Precise Exeptions and Speculative Execution},
booktitle = {Computer Aided Verification, 10th International Conference, {CAV}
'98, Vancouver, BC, Canada, June 28 - July 2, 1998, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1427},
pages = {135--146},
publisher = {Springer},
year = {1998},
url = {https://doi.org/10.1007/BFb0028740},
doi = {10.1007/BFB0028740},
timestamp = {Tue, 14 May 2019 10:00:43 +0200},
biburl = {https://dblp.org/rec/conf/cav/SawadaH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fmsd/BrockH97,
author = {Bishop Brock and
Warren A. Hunt Jr.},
title = {The {DUAL-EVAL} Hardware Description Language and Its Use in the Formal
Specification and Verification of the {FM9001} Microprocessor},
journal = {Formal Methods Syst. Des.},
volume = {11},
number = {1},
pages = {71--104},
year = {1997},
url = {https://doi.org/10.1023/A:1008685826293},
doi = {10.1023/A:1008685826293},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fmsd/BrockH97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/SawadaH97,
author = {Jun Sawada and
Warren A. Hunt Jr.},
editor = {Orna Grumberg},
title = {Trace Table Based Approach for Pipeline Microprocessor Verification},
booktitle = {Computer Aided Verification, 9th International Conference, {CAV} '97,
Haifa, Israel, June 22-25, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1254},
pages = {364--375},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/3-540-63166-6\_36},
doi = {10.1007/3-540-63166-6\_36},
timestamp = {Tue, 14 May 2019 10:00:43 +0200},
biburl = {https://dblp.org/rec/conf/cav/SawadaH97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BrockHH97,
author = {Bishop Brock and
Warren A. Hunt Jr.},
title = {Formally Specifying and Mechanically Verifying Programs for the Motorola
Complex Arithmetic Processor {DSP}},
booktitle = {Proceedings 1997 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '97, Austin, Texas, USA,
October 12-15, 1997},
pages = {31--36},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICCD.1997.628846},
doi = {10.1109/ICCD.1997.628846},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BrockHH97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/sp/Hunt94,
author = {Warren A. Hunt Jr.},
title = {{FM8501:} {A} Verified Microprocessor},
series = {Lecture Notes in Computer Science},
volume = {795},
publisher = {Springer},
year = {1994},
url = {https://doi.org/10.1007/3-540-57960-5},
doi = {10.1007/3-540-57960-5},
isbn = {3-540-57960-5},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/sp/Hunt94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/tpcd/BrockHY92,
author = {Bishop Brock and
Warren A. Hunt Jr. and
William D. Young},
editor = {Victoria Stavridou and
Thomas F. Melham and
Raymond T. Boute},
title = {Introduction to a Formally Defined Hardware Description Language},
booktitle = {Theorem Provers in Circuit Design, Proceedings of the {IFIP} {TC10/WG}
10.2 International Conference on Theorem Provers in Circuit Design:
Theory, Practice and Experience, Nijmegen, The Netherlands, 22-24
June 1992, Proceedings},
series = {{IFIP} Transactions},
volume = {{A-10}},
pages = {3--35},
publisher = {North-Holland},
year = {1992},
timestamp = {Mon, 25 Feb 2002 11:36:44 +0100},
biburl = {https://dblp.org/rec/conf/tpcd/BrockHY92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jar/BevierHMY89,
author = {William R. Bevier and
Warren A. Hunt Jr. and
J Strother Moore and
William D. Young},
title = {An Approach to Systems Verification},
journal = {J. Autom. Reason.},
volume = {5},
number = {4},
pages = {411--428},
year = {1989},
url = {https://doi.org/10.1007/BF00243131},
doi = {10.1007/BF00243131},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jar/BevierHMY89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jar/Hunt89,
author = {Warren A. Hunt Jr.},
title = {Microprocessor Design Verification},
journal = {J. Autom. Reason.},
volume = {5},
number = {4},
pages = {429--460},
year = {1989},
url = {https://doi.org/10.1007/BF00243132},
doi = {10.1007/BF00243132},
timestamp = {Wed, 02 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jar/Hunt89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/msiw/HuntB89,
author = {Warren A. Hunt Jr. and
Bishop Brock},
editor = {Miriam Leeser and
Geoffrey Brown},
title = {The Verification of a Bit-slice {ALU}},
booktitle = {Hardware Specification, Verification and Synthesis: Mathematical Aspects,
Mathematical Science Institute Workshop, Cornall University, Ithaca,
New York, USA, July 5-7, 1989, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {408},
pages = {282--306},
publisher = {Springer},
year = {1989},
url = {https://doi.org/10.1007/0-387-97226-9\_34},
doi = {10.1007/0-387-97226-9\_34},
timestamp = {Tue, 14 May 2019 10:00:53 +0200},
biburl = {https://dblp.org/rec/conf/msiw/HuntB89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sp/BevierHY87,
author = {William R. Bevier and
Warren A. Hunt Jr. and
William D. Young},
title = {Toward Verified Execution Environments},
booktitle = {Proceedings of the 1987 {IEEE} Symposium on Security and Privacy,
Oakland, California, USA, April 27-29, 1987},
pages = {106--115},
publisher = {{IEEE} Computer Society},
year = {1987},
url = {https://doi.org/10.1109/SP.1987.10018},
doi = {10.1109/SP.1987.10018},
timestamp = {Thu, 21 Sep 2023 15:57:33 +0200},
biburl = {https://dblp.org/rec/conf/sp/BevierHY87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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