BibTeX records: Hubert Harrer

download as .bib file

@article{DBLP:journals/ibmrd/BeckerHHBKCKES15,
  author    = {Wiren D. Becker and
               Hubert Harrer and
               Andreas Huber and
               W. L. Brodsky and
               R. Krabbenhoft and
               M. A. Cracraft and
               Dierk Kaller and
               Gregory R. Edlund and
               Thomas Strach},
  title     = {Electronic packaging of the {IBM} z13 processor drawer},
  journal   = {{IBM} Journal of Research and Development},
  volume    = {59},
  number    = {4/5},
  year      = {2015},
  url       = {https://doi.org/10.1147/JRD.2015.2445031},
  doi       = {10.1147/JRD.2015.2445031},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ibmrd/BeckerHHBKCKES15},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/WarnockCHCSMPZJSDGBMCMRSSSWMSPW14,
  author    = {James D. Warnock and
               Yuen H. Chan and
               Hubert Harrer and
               Sean M. Carey and
               Gerard Salem and
               Doug Malone and
               Ruchir Puri and
               Jeffrey A. Zitz and
               Adam Jatkowski and
               Gerald Strevig and
               Ayan Datta and
               Anne Gattiker and
               Aditya Bansal and
               Guenter Mayer and
               Yiu{-}Hing Chan and
               Mark D. Mayo and
               David L. Rude and
               Leon J. Sigal and
               Thomas Strach and
               Howard H. Smith and
               Huajun Wen and
               Pak{-}kin Mak and
               Chung{-}Lung Kevin Shum and
               Donald W. Plass and
               Charles F. Webb},
  title     = {Circuit and Physical Design of the zEnterprise{\texttrademark} {EC12}
               Microprocessor Chips and Multi-Chip Module},
  journal   = {J. Solid-State Circuits},
  volume    = {49},
  number    = {1},
  pages     = {9--18},
  year      = {2014},
  url       = {https://doi.org/10.1109/JSSC.2013.2284647},
  doi       = {10.1109/JSSC.2013.2284647},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/jssc/WarnockCHCSMPZJSDGBMCMRSSSWMSPW14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WarnockCHRPCSMCMJSSDGBMSWMSPW13,
  author    = {James D. Warnock and
               Yuen H. Chan and
               Hubert Harrer and
               David L. Rude and
               Ruchir Puri and
               Sean M. Carey and
               Gerard Salem and
               Guenter Mayer and
               Yiu{-}Hing Chan and
               Mark D. Mayo and
               Adam Jatkowski and
               Gerald Strevig and
               Leon J. Sigal and
               Ayan Datta and
               Anne Gattiker and
               Aditya Bansal and
               Doug Malone and
               Thomas Strach and
               Huajun Wen and
               Pak{-}kin Mak and
               Chung{-}Lung Kevin Shum and
               Donald W. Plass and
               Charles F. Webb},
  title     = {5.5GHz system z microprocessor and multi-chip module},
  booktitle = {2013 {IEEE} International Solid-State Circuits Conference - Digest
               of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
               17-21, 2013},
  pages     = {46--47},
  year      = {2013},
  crossref  = {DBLP:conf/isscc/2013},
  url       = {https://doi.org/10.1109/ISSCC.2013.6487630},
  doi       = {10.1109/ISSCC.2013.6487630},
  timestamp = {Wed, 17 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isscc/WarnockCHRPCSMCMJSSDGBMSWMSPW13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/StrachBCCEEFHHKKMPSSTW12,
  author    = {Thomas Strach and
               Frank E. Bosco and
               Kenneth L. Christian and
               Kevin R. Covi and
               Martin Eckert and
               Gregory R. Edlund and
               Roland Frech and
               Hubert Harrer and
               Andreas Huber and
               Dierk Kaller and
               Martin Kindscher and
               A. Z. Muszynski and
               G. A. Peterson and
               Claudio Siviero and
               Jochen Supper and
               Otto A. Torreiter and
               Thomas{-}Michael Winkel},
  title     = {Electronic packaging of the {IBM} System z196 enterprise-class server
               processor cage},
  journal   = {{IBM} Journal of Research and Development},
  volume    = {56},
  number    = {1},
  pages     = {2},
  year      = {2012},
  url       = {https://doi.org/10.1147/JRD.2011.2177107},
  doi       = {10.1147/JRD.2011.2177107},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ibmrd/StrachBCCEEFHHKKMPSSTW12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/WinkelHKSDCCZSLE09,
  author    = {Thomas{-}Michael Winkel and
               Hubert Harrer and
               Dierk Kaller and
               Jochen Supper and
               Daniel M. Dreps and
               Kenneth L. Christian and
               D. Cosmadelis and
               Tingdong Zhou and
               Thomas Strach and
               J. Ludwig and
               David L. Edwards},
  title     = {Packaging design challenges of the {IBM} System z10 Enterprise Class
               server},
  journal   = {{IBM} Journal of Research and Development},
  volume    = {53},
  number    = {1},
  pages     = {10},
  year      = {2009},
  url       = {https://doi.org/10.1147/JRD.2009.5388589},
  doi       = {10.1147/JRD.2009.5388589},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ibmrd/WinkelHKSDCCZSLE09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/HarrerDWSTHZCG07,
  author    = {Hubert Harrer and
               Daniel M. Dreps and
               Thomas{-}Michael Winkel and
               Wolfgang Scholz and
               Bao G. Truong and
               Andreas Huber and
               Tingdong Zhou and
               Kenneth L. Christian and
               Gary F. Goth},
  title     = {High-speed interconnect and packaging design of the {IBM} System z9
               processor cage},
  journal   = {{IBM} Journal of Research and Development},
  volume    = {51},
  number    = {1/2},
  pages     = {37--52},
  year      = {2007},
  url       = {https://doi.org/10.1147/rd.511.0037},
  doi       = {10.1147/rd.511.0037},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ibmrd/HarrerDWSTHZCG07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/WinkelBHPKGCK04,
  author    = {Thomas{-}Michael Winkel and
               Wiren D. Becker and
               Hubert Harrer and
               Harald Pross and
               Dierk Kaller and
               Bernd Garben and
               Bruce J. Chamberlin and
               Scott A. Kuppinger},
  title     = {First- and second-level packaging of the z990 processor cage},
  journal   = {{IBM} Journal of Research and Development},
  volume    = {48},
  number    = {3-4},
  pages     = {379--394},
  year      = {2004},
  url       = {https://doi.org/10.1147/rd.483.0379},
  doi       = {10.1147/rd.483.0379},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ibmrd/WinkelBHPKGCK04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/HarrerPWBSYACK02,
  author    = {Hubert Harrer and
               Harald Pross and
               Thomas{-}Michael Winkel and
               Wiren D. Becker and
               Herb I. Stoller and
               Masakazu Yamamoto and
               Shinji Abe and
               Bruce J. Chamberlin and
               George A. Katopis},
  title     = {First- and second-level packaging for the {IBM} eServer z900},
  journal   = {{IBM} Journal of Research and Development},
  volume    = {46},
  number    = {4-5},
  pages     = {397--420},
  year      = {2002},
  url       = {https://doi.org/10.1147/rd.464.0397},
  doi       = {10.1147/rd.464.0397},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ibmrd/HarrerPWBSYACK02},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HarrerNRC94,
  author    = {Hubert Harrer and
               Josef A. Nossek and
               Tam{\'{a}}s Roska and
               Leon O. Chua},
  title     = {A Current-Mode {DTCNN} Universal Chip},
  booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
               1994, London, England, UK, May 30 - June 2, 1994},
  pages     = {135--138},
  year      = {1994},
  crossref  = {DBLP:conf/iscas/1994},
  url       = {https://doi.org/10.1109/ISCAS.1994.409215},
  doi       = {10.1109/ISCAS.1994.409215},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/HarrerNRC94},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijcta/HarrerGN93,
  author    = {Hubert Harrer and
               Zbigniew Galias and
               Josef A. Nossek},
  title     = {On the convergence of discrete-time neural networks},
  journal   = {I. J. Circuit Theory and Applications},
  volume    = {21},
  number    = {2},
  pages     = {191--195},
  year      = {1993},
  url       = {https://doi.org/10.1002/cta.4490210208},
  doi       = {10.1002/cta.4490210208},
  timestamp = {Fri, 30 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/ijcta/HarrerGN93},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/dnb/Harrer92,
  author    = {Hubert Harrer},
  title     = {Discrete time cellular neural networks},
  school    = {Technical University Munich, Germany},
  year      = {1992},
  url       = {http://d-nb.info/930038851},
  isbn      = {978-3-86111-286-0},
  timestamp = {Mon, 09 Jan 2017 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/phd/dnb/Harrer92},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijcta/HarrerN92,
  author    = {Hubert Harrer and
               Josef A. Nossek},
  title     = {Discrete-time cellular neural networks},
  journal   = {I. J. Circuit Theory and Applications},
  volume    = {20},
  number    = {5},
  pages     = {453--467},
  year      = {1992},
  url       = {https://doi.org/10.1002/cta.4490200503},
  doi       = {10.1002/cta.4490200503},
  timestamp = {Wed, 18 Apr 2018 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ijcta/HarrerN92},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tnn/HarrerNS92,
  author    = {Hubert Harrer and
               Josef A. Nossek and
               Rudolf Stelzl},
  title     = {An analog implementation of discrete-time cellular neural networks},
  journal   = {{IEEE} Trans. Neural Networks},
  volume    = {3},
  number    = {3},
  pages     = {466--476},
  year      = {1992},
  url       = {https://doi.org/10.1109/72.129419},
  doi       = {10.1109/72.129419},
  timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/tnn/HarrerNS92},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isscc/2013,
  title     = {2013 {IEEE} International Solid-State Circuits Conference - Digest
               of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
               17-21, 2013},
  publisher = {{IEEE}},
  year      = {2013},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6480926},
  isbn      = {978-1-4673-4515-6},
  timestamp = {Mon, 08 Apr 2013 19:17:54 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isscc/2013},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iscas/1994,
  title     = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
               1994, London, England, UK, May 30 - June 2, 1994},
  publisher = {{IEEE}},
  year      = {1994},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=3224},
  isbn      = {0-7803-1916-8},
  timestamp = {Fri, 20 May 2016 10:24:51 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/1994},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
maintained by Schloss Dagstuhl LZI, founded at University of Trier