BibTeX records: Vijay P. Gadde

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@article{DBLP:journals/jssc/HekmatAWGN15,
  author       = {Mohammad Hekmat and
                  Farshid Aryanfar and
                  Jason Wei and
                  Vijay P. Gadde and
                  Reza Navid},
  title        = {A 25 GHz Fast-Lock Digital {LC} {PLL} With Multiphase Output Using
                  a Magnetically-Coupled Loop of Oscillators},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {50},
  number       = {2},
  pages        = {490--502},
  year         = {2015},
  url          = {https://doi.org/10.1109/JSSC.2014.2361351},
  doi          = {10.1109/JSSC.2014.2361351},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/HekmatAWGN15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/AmirkhanyWMSBCCDHGHKLLMMMRSSSSFSWTVVYJCY12,
  author       = {Amir Amirkhany and
                  Jason Wei and
                  Navin K. Mishra and
                  Jie Shen and
                  Wendemagegnehu T. Beyene and
                  Catherine Chen and
                  T. J. Chin and
                  Deborah Dressler and
                  Charlie Huang and
                  Vijay P. Gadde and
                  Mohammad Hekmat and
                  Kambiz Kaviani and
                  Hai Lan and
                  Phuong Le and
                  Mahabaleshwara and
                  Chris J. Madden and
                  Sanku Mukherjee and
                  Leneesh Raghavan and
                  Keisuke Saito and
                  Dave Secker and
                  Arul Sendhil and
                  Ralf Schmitt and
                  H. Md. Shuaeb Fazeel and
                  Gundlapalli Shanmukha Srinivas and
                  Ting Wu and
                  Chanh Tran and
                  Arun Vaidyanath and
                  Kapil Vyas and
                  Ling Yang and
                  Manish Jain and
                  Kun{-}Yung Ken Chang and
                  Xingchao Yuan},
  title        = {A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {47},
  number       = {4},
  pages        = {911--925},
  year         = {2012},
  url          = {https://doi.org/10.1109/JSSC.2012.2185369},
  doi          = {10.1109/JSSC.2012.2185369},
  timestamp    = {Wed, 20 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/AmirkhanyWMSBCCDHGHKLLMMMRSSSSFSWTVVYJCY12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/KavianiWWASCTBCCCDGHHHLMMMRSSSSFSZTVVJCY12,
  author       = {Kambiz Kaviani and
                  Ting Wu and
                  Jason Wei and
                  Amir Amirkhany and
                  Jie Shen and
                  T. J. Chin and
                  Chintan Thakkar and
                  Wendemagegnehu T. Beyene and
                  Norman Chan and
                  Catherine Chen and
                  Bing Ren Chuang and
                  Deborah Dressler and
                  Vijay P. Gadde and
                  Mohammad Hekmat and
                  Eugene Ho and
                  Charlie Huang and
                  Phuong Le and
                  Mahabaleshwara and
                  Chris J. Madden and
                  Navin K. Mishra and
                  Leneesh Raghavan and
                  Keisuke Saito and
                  Ralf Schmitt and
                  Dave Secker and
                  Xudong Shi and
                  H. Md. Shuaeb Fazeel and
                  Gundlapalli Shanmukha Srinivas and
                  Steve Zhang and
                  Chanh Tran and
                  Arun Vaidyanath and
                  Kapil Vyas and
                  Manish Jain and
                  Kun{-}Yung Ken Chang and
                  Xingchao Yuan},
  title        = {A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {47},
  number       = {4},
  pages        = {926--937},
  year         = {2012},
  url          = {https://doi.org/10.1109/JSSC.2012.2185370},
  doi          = {10.1109/JSSC.2012.2185370},
  timestamp    = {Mon, 27 Mar 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/KavianiWWASCTBCCCDGHHHLMMMRSSSSFSZTVVJCY12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}