BibTeX records: Shinobu Fujita

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@inproceedings{DBLP:conf/vlsic/FujitaTTI19,
  author       = {Shinobu Fujita and
                  Satoshi Takaya and
                  Susumu Takeda and
                  Kazutaka Ikegami},
  title        = {Circuit And Systems Based on Advanced {MRAM} for Near Future Computing
                  Applications},
  booktitle    = {2019 Symposium on {VLSI} Circuits, Kyoto, Japan, June 9-14, 2019},
  pages        = {278},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.23919/VLSIC.2019.8778045},
  doi          = {10.23919/VLSIC.2019.8778045},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/FujitaTTI19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/TanamotoYTF17,
  author       = {Tetsufumi Tanamoto and
                  Shinichi Yasuda and
                  Satoshi Takaya and
                  Shinobu Fujita},
  title        = {Physically Unclonable Function Using an Initial Waveform of Ring Oscillators},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {64-II},
  number       = {7},
  pages        = {827--831},
  year         = {2017},
  url          = {https://doi.org/10.1109/TCSII.2016.2602828},
  doi          = {10.1109/TCSII.2016.2602828},
  timestamp    = {Wed, 27 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/TanamotoYTF17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi-dat/FujitaNITNA17,
  author       = {Shinobu Fujita and
                  Hiroki Noguchi and
                  Kazutaka Ikegami and
                  Susumu Takeda and
                  Kumiko Nomura and
                  Keiko Abe},
  title        = {Novel memory hierarchy with e-STT-MRAM for near-future applications},
  booktitle    = {2017 International Symposium on {VLSI} Design, Automation and Test,
                  {VLSI-DAT} 2017, Hsinchu, Taiwan, April 24-27, 2017},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/VLSI-DAT.2017.7939700},
  doi          = {10.1109/VLSI-DAT.2017.7939700},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi-dat/FujitaNITNA17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/TanamotoTSKYMFM17,
  author       = {Tetsufumi Tanamoto and
                  Satoshi Takaya and
                  Nobuaki Sakamoto and
                  Hirotsugu Kasho and
                  Shinichi Yasuda and
                  Takao Marukame and
                  Shinobu Fujita and
                  Yuichiro Mitani},
  title        = {Physically unclonable function using initial waveform of ring oscillators
                  on 65 nm {CMOS} technology},
  journal      = {CoRR},
  volume       = {abs/1703.00073},
  year         = {2017},
  url          = {http://arxiv.org/abs/1703.00073},
  eprinttype    = {arXiv},
  eprint       = {1703.00073},
  timestamp    = {Mon, 13 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/TanamotoTSKYMFM17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/NoguchiITAKKHAS16,
  author       = {Hiroki Noguchi and
                  Kazutaka Ikegami and
                  Satoshi Takaya and
                  Eishi Arima and
                  Keiichi Kushida and
                  Atsushi Kawasumi and
                  Hiroyuki Hara and
                  Keiko Abe and
                  Naoharu Shimomura and
                  Junichi Ito and
                  Shinobu Fujita and
                  Takashi Nakada and
                  Hiroshi Nakamura},
  title        = {7.2 4Mb STT-MRAM-based cache with memory-access-aware power optimization
                  and write-verify-write / read-modify-write scheme},
  booktitle    = {2016 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2016, San Francisco, CA, USA, January 31 - February 4, 2016},
  pages        = {132--133},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ISSCC.2016.7417942},
  doi          = {10.1109/ISSCC.2016.7417942},
  timestamp    = {Fri, 22 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/NoguchiITAKKHAS16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/TanamotoYTF16,
  author       = {Tetsufumi Tanamoto and
                  Shinichi Yasuda and
                  Satoshi Takaya and
                  Shinobu Fujita},
  title        = {Physically Unclonable Function using Initial Waveform of Ring Oscillators},
  journal      = {CoRR},
  volume       = {abs/1605.03290},
  year         = {2016},
  url          = {http://arxiv.org/abs/1605.03290},
  eprinttype    = {arXiv},
  eprint       = {1605.03290},
  timestamp    = {Mon, 13 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/TanamotoYTF16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/TanamotoSIMFY16,
  author       = {Tetsufumi Tanamoto and
                  Naoharu Shimomura and
                  Sumio Ikegawa and
                  Mari Matsumoto and
                  Shinobu Fujita and
                  Hiroaki Yoda},
  title        = {High-Speed Magnetoresistive Random-Access Memory Random Number Generator
                  Using Error-Correcting Code},
  journal      = {CoRR},
  volume       = {abs/1606.03147},
  year         = {2016},
  url          = {http://arxiv.org/abs/1606.03147},
  eprinttype    = {arXiv},
  eprint       = {1606.03147},
  timestamp    = {Mon, 13 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/TanamotoSIMFY16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/ArimaNNMTFN15,
  author       = {Eishi Arima and
                  Hiroki Noguchi and
                  Takashi Nakada and
                  Shinobu Miwa and
                  Susumu Takeda and
                  Shinobu Fujita and
                  Hiroshi Nakamura},
  title        = {Immediate sleep: Reducing energy impact of peripheral circuits in
                  {STT-MRAM} caches},
  booktitle    = {33rd {IEEE} International Conference on Computer Design, {ICCD} 2015,
                  New York City, NY, USA, October 18-21, 2015},
  pages        = {149--156},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/ICCD.2015.7357096},
  doi          = {10.1109/ICCD.2015.7357096},
  timestamp    = {Thu, 21 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/ArimaNNMTFN15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/NoguchiIKAITSIK15,
  author       = {Hiroki Noguchi and
                  Kazutaka Ikegami and
                  Keiichi Kushida and
                  Keiko Abe and
                  Shogo Itai and
                  Satoshi Takaya and
                  Naoharu Shimomura and
                  Junichi Ito and
                  Atsushi Kawasumi and
                  Hiroyuki Hara and
                  Shinobu Fujita},
  title        = {7.5 {A} 3.3ns-access-time 71.2{\(\mu\)}W/MHz 1Mb embedded {STT-MRAM}
                  using physically eliminated read-disturb scheme and normally-off memory
                  architecture},
  booktitle    = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2015, Digest of Technical Papers, San Francisco, CA, USA, February
                  22-26, 2015},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISSCC.2015.7062963},
  doi          = {10.1109/ISSCC.2015.7062963},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/NoguchiIKAITSIK15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/FujitaNNTA14,
  author       = {Shinobu Fujita and
                  Kumiko Nomura and
                  Hiroki Noguchi and
                  Susumu Takeda and
                  Keiko Abe},
  title        = {Novel nonvolatile memory hierarchies to realize "normally-off
                  mobile processors"},
  booktitle    = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2014, Singapore, January 20-23, 2014},
  pages        = {6--11},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ASPDAC.2014.6742851},
  doi          = {10.1109/ASPDAC.2014.6742851},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/FujitaNNTA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isicir/FujitaNITNA14,
  author       = {Shinobu Fujita and
                  Hiroki Noguchi and
                  Kazutaka Ikegami and
                  Susumu Takeda and
                  Kumiko Nomura and
                  Keiko Abe},
  title        = {Novel STT-MRAM-based last level caches for high performance processors
                  using normally-off architectures},
  booktitle    = {2014 International Symposium on Integrated Circuits (ISIC), Singapore,
                  December 10-12, 2014},
  pages        = {316--319},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISICIR.2014.7029504},
  doi          = {10.1109/ISICIR.2014.7029504},
  timestamp    = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl       = {https://dblp.org/rec/conf/isicir/FujitaNITNA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsic/NoguchiISTIF14,
  author       = {Hiroki Noguchi and
                  Kazutaka Ikegami and
                  Naoharu Shimomura and
                  Tetsufumi Tanamoto and
                  Junichi Ito and
                  Shinobu Fujita},
  title        = {Highly reliable and low-power nonvolatile cache memory with advanced
                  perpendicular {STT-MRAM} for high-performance {CPU}},
  booktitle    = {Symposium on {VLSI} Circuits, {VLSIC} 2014, Digest of Technical Papers,
                  Honolulu, HI, USA, June 10-13, 2014},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/VLSIC.2014.6858403},
  doi          = {10.1109/VLSIC.2014.6858403},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/NoguchiISTIF14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/NoguchiNAFAKNMN13,
  author       = {Hiroki Noguchi and
                  Kumiko Nomura and
                  Keiko Abe and
                  Shinobu Fujita and
                  Eishi Arima and
                  Kyundong Kim and
                  Takashi Nakada and
                  Shinobu Miwa and
                  Hiroshi Nakamura},
  editor       = {Enrico Macii},
  title        = {{D-MRAM} cache: enhancing energy efficiency with 3T-1MTJ {DRAM/MRAM}
                  hybrid memory},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
                  March 18-22, 2013},
  pages        = {1813--1818},
  publisher    = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
  year         = {2013},
  url          = {https://doi.org/10.7873/DATE.2013.363},
  doi          = {10.7873/DATE.2013.363},
  timestamp    = {Fri, 22 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/NoguchiNAFAKNMN13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icserv/FujitaH13,
  author       = {Shinobu Fujita and
                  Kazuyoshi Hidaka},
  editor       = {Masaaki Mochimaru and
                  Kanji Ueda and
                  Takeshi Takenaka},
  title        = {Patient Context: {A} New Concept for Gap Model to Understand Patient
                  Satisfaction},
  booktitle    = {Serviceology for Services, Selected papers of the 1st International
                  Conference of Serviceology, ICServ 2013, Tokyo, Japan, 16-18 October
                  2013},
  pages        = {151--158},
  publisher    = {Springer},
  year         = {2013},
  url          = {https://doi.org/10.1007/978-4-431-54816-4\_17},
  doi          = {10.1007/978-4-431-54816-4\_17},
  timestamp    = {Wed, 11 Mar 2020 13:12:39 +0100},
  biburl       = {https://dblp.org/rec/conf/icserv/FujitaH13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ipps/IkegamiANYOF12,
  author       = {Kazutaka Ikegami and
                  Keiko Abe and
                  Kumiko Nomura and
                  Shinichi Yasuda and
                  Masato Oda and
                  Shinobu Fujita},
  title        = {Designing Nonvolatile Reconfigurable Switch-based {FPGA} through Overall
                  Circuit Performance Evaluation},
  booktitle    = {26th {IEEE} International Parallel and Distributed Processing Symposium
                  Workshops {\&} PhD Forum, {IPDPS} 2012, Shanghai, China, May 21-25,
                  2012},
  pages        = {213--220},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/IPDPSW.2012.22},
  doi          = {10.1109/IPDPSW.2012.22},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ipps/IkegamiANYOF12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/LoiAFMB11,
  author       = {Igor Loi and
                  Federico Angiolini and
                  Shinobu Fujita and
                  Subhasish Mitra and
                  Luca Benini},
  title        = {Characterization and Implementation of Fault-Tolerant Vertical Links
                  for 3-D Networks-on-Chip},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {30},
  number       = {1},
  pages        = {124--134},
  year         = {2011},
  url          = {https://doi.org/10.1109/TCAD.2010.2065990},
  doi          = {10.1109/TCAD.2010.2065990},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/LoiAFMB11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/FujitaYLCAW10,
  author       = {Shinobu Fujita and
                  Shinichi Yasuda and
                  Daesung Lee and
                  Xiangyu Chen and
                  Deji Akinwande and
                  H.{-}S. Philip Wong},
  editor       = {Sachin S. Sapatnekar},
  title        = {Detachable nano-carbon chip with ultra low power},
  booktitle    = {Proceedings of the 47th Design Automation Conference, {DAC} 2010,
                  Anaheim, California, USA, July 13-18, 2010},
  pages        = {631--632},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1837274.1837434},
  doi          = {10.1145/1837274.1837434},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/FujitaYLCAW10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/YasudaTIKANF10,
  author       = {Shinichi Yasuda and
                  Tetsufumi Tanamoto and
                  Kazutaka Ikegami and
                  Atsuhiro Kinoshita and
                  Keiko Abe and
                  Hirotaka Nishino and
                  Shinobu Fujita},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {High-performance {FPGA} based on novel {DSS-MOSFET} and non-volatile
                  configuration memory (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {291},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723187},
  doi          = {10.1145/1723112.1723187},
  timestamp    = {Tue, 06 Nov 2018 16:58:23 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/YasudaTIKANF10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/NomuraAFKK10,
  author       = {Kumiko Nomura and
                  Keiko Abe and
                  Shinobu Fujita and
                  Yasuhiko Kurosawa and
                  Atsushi Kageshima},
  title        = {Performance analysis of 3D-IC for multi-core processors in sub-65nm
                  {CMOS} technologies},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
                  30 - June 2, 2010, Paris, France},
  pages        = {2876--2879},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISCAS.2010.5536963},
  doi          = {10.1109/ISCAS.2010.5536963},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/NomuraAFKK10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/PaulFO09,
  author       = {Bipul C. Paul and
                  Shinobu Fujita and
                  Masaki Okajima},
  title        = {ROM-Based Logic {(RBL)} Design: {A} Low-Power 16 Bit Multiplier},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {44},
  number       = {11},
  pages        = {2935--2942},
  year         = {2009},
  url          = {https://doi.org/10.1109/JSSC.2009.2028928},
  doi          = {10.1109/JSSC.2009.2028928},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/PaulFO09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/Fujita09,
  author       = {Shinobu Fujita},
  editor       = {Luca Benini and
                  Giovanni De Micheli and
                  Bashir M. Al{-}Hashimi and
                  Wolfgang M{\"{u}}ller},
  title        = {Nano-electronics challenge chip designers meet real nano-electronics
                  in 2010s?},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
                  April 20-24, 2009},
  pages        = {431--432},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/DATE.2009.5090703},
  doi          = {10.1109/DATE.2009.5090703},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/date/Fujita09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/ChenTCTFDC09,
  author       = {Deming Chen and
                  Russell Tessier and
                  Kaustav Banerjee and
                  Mojy C. Chian and
                  Andr{\'{e}} DeHon and
                  Shinobu Fujita and
                  James Hutchby and
                  Steve Trimberger},
  editor       = {Paul Chow and
                  Peter Y. K. Cheung},
  title        = {{CMOS} vs Nano: comrades or rivals?},
  booktitle    = {Proceedings of the {ACM/SIGDA} 17th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2009, Monterey, California, USA,
                  February 22-24, 2009},
  pages        = {121--122},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1508128.1508147},
  doi          = {10.1145/1508128.1508147},
  timestamp    = {Tue, 06 Nov 2018 16:58:23 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ChenTCTFDC09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/FujitaANYT09,
  author       = {Shinobu Fujita and
                  Keiko Abe and
                  Kumiko Nomura and
                  Shinichi Yasuda and
                  Tetsufumi Tanamoto},
  title        = {Perspectives and Issues in 3D-IC from Designers' Point of View},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
                  May 2009, Taipei, Taiwan},
  pages        = {73--76},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ISCAS.2009.5117688},
  doi          = {10.1109/ISCAS.2009.5117688},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/FujitaANYT09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/LoiMLFB08,
  author       = {Igor Loi and
                  Subhasish Mitra and
                  Thomas H. Lee and
                  Shinobu Fujita and
                  Luca Benini},
  editor       = {Sani R. Nassif and
                  Jaijeet S. Roychowdhury},
  title        = {A low-overhead fault tolerance scheme for TSV-based 3D network on
                  chip links},
  booktitle    = {2008 International Conference on Computer-Aided Design, {ICCAD} 2008,
                  San Jose, CA, USA, November 10-13, 2008},
  pages        = {598--602},
  publisher    = {{IEEE} Computer Society},
  year         = {2008},
  url          = {https://doi.org/10.1109/ICCAD.2008.4681638},
  doi          = {10.1109/ICCAD.2008.4681638},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/LoiMLFB08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/PaulFO08,
  author       = {Bipul Chandra Paul and
                  Shinobu Fujita and
                  Masaki Okajima},
  title        = {{ROM} based logic {(RBL)} design: High-performance and low-power adders},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
                  May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
  pages        = {796--799},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ISCAS.2008.4541538},
  doi          = {10.1109/ISCAS.2008.4541538},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/PaulFO08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/MatsumotoYOITF08,
  author       = {Mari Matsumoto and
                  Shinichi Yasuda and
                  Ryuji Ohba and
                  Kazutaka Ikegami and
                  Tetsufumi Tanamoto and
                  Shinobu Fujita},
  title        = {1200{\(\mu\)}m\({}^{\mbox{2}}\) Physical Random-Number Generators
                  Based on SiN {MOSFET} for Secure Smart-Card Application},
  booktitle    = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2008, Digest of Technical Papers, San Francisco, CA, USA, February
                  3-7, 2008},
  pages        = {414--415},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ISSCC.2008.4523233},
  doi          = {10.1109/ISSCC.2008.4523233},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/MatsumotoYOITF08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jetc/PaulFOL07,
  author       = {Bipul C. Paul and
                  Shinobu Fujita and
                  Masaki Okajima and
                  Thomas Lee},
  title        = {Prospect of ballistic {CNFET} in high performance applications: Modeling
                  and analysis},
  journal      = {{ACM} J. Emerg. Technol. Comput. Syst.},
  volume       = {3},
  number       = {3},
  pages        = {12},
  year         = {2007},
  url          = {https://doi.org/10.1145/1295231.1295233},
  doi          = {10.1145/1295231.1295233},
  timestamp    = {Mon, 08 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jetc/PaulFOL07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/FujitaNAL07,
  author       = {Shinobu Fujita and
                  Kumiko Nomura and
                  Keiko Abe and
                  Thomas H. Lee},
  title        = {3-D Nanoarchitectures With Carbon Nanotube Mechanical Switches for
                  Future On-Chip Network Beyond {CMOS} Architecture},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {54-I},
  number       = {11},
  pages        = {2472--2479},
  year         = {2007},
  url          = {https://doi.org/10.1109/TCSI.2007.907882},
  doi          = {10.1109/TCSI.2007.907882},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/FujitaNAL07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cicc/YasudaF07,
  author       = {Shinichi Yasuda and
                  Shinobu Fujita},
  title        = {Compact Fault Recovering Flip-Flop with Adjusting Clock Timing Triggered
                  by Error Detection},
  booktitle    = {Proceedings of the {IEEE} 2007 Custom Integrated Circuits Conference,
                  {CICC} 2007, DoubleTree Hotel, San Jose, California, USA, September
                  16-19, 2007},
  pages        = {721--724},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/CICC.2007.4405832},
  doi          = {10.1109/CICC.2007.4405832},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/YasudaF07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cscl/MochizukiKYNNF07,
  author       = {Toshio Mochizuki and
                  Hiroshi Kato and
                  Kazaru Yaegashi and
                  Toshihisa Nishimori and
                  Yusuke Nagamori and
                  Shinobu Fujita},
  editor       = {Clark A. Chinn and
                  Gijsbert Erkens and
                  Sadhana Puntambekar},
  title        = {ProBoPortable: does the cellular phone software promote emergent division
                  of labor in project-based learning?},
  booktitle    = {Proceedings of the 7th Iternational Conference on Computer Supported
                  Collaborative Learning, CSCL'07, New Brunswick, NJ, USA, July 16-21,
                  2007},
  pages        = {516--518},
  publisher    = {International Society of the Learning Sciences / {ACM} {DL}},
  year         = {2007},
  url          = {https://repository.isls.org/handle/1/3393},
  timestamp    = {Wed, 28 Apr 2021 17:11:51 +0200},
  biburl       = {https://dblp.org/rec/conf/cscl/MochizukiKYNNF07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/PaulFOL06,
  author       = {Bipul C. Paul and
                  Shinobu Fujita and
                  Masaki Okajima and
                  Thomas Lee},
  editor       = {Ellen Sentovich},
  title        = {Modeling and analysis of circuit performance of ballistic {CNFET}},
  booktitle    = {Proceedings of the 43rd Design Automation Conference, {DAC} 2006,
                  San Francisco, CA, USA, July 24-28, 2006},
  pages        = {717--722},
  publisher    = {{ACM}},
  year         = {2006},
  url          = {https://doi.org/10.1145/1146909.1147092},
  doi          = {10.1145/1146909.1147092},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/PaulFOL06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isvlsi/OhbaMMYTUF06,
  author       = {Ryuji Ohba and
                  Daisuke Matsushita and
                  Koichi Muraoka and
                  Shinichi Yasuda and
                  Tetsufumi Tanamoto and
                  Ken Uchida and
                  Shinobu Fujita},
  title        = {Si Nanocrystal {MOSFET} with Silicon Nitride Tunnel Insulator for
                  High-rate Random Number Generation},
  booktitle    = {2006 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
                  2006), 2-3 March 2006, Karlsruhe, Germany},
  pages        = {231--236},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISVLSI.2006.83},
  doi          = {10.1109/ISVLSI.2006.83},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/OhbaMMYTUF06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/nanonet/FujitaNAL06,
  author       = {Shinobu Fujita and
                  Kumiko Nomura and
                  Keiko Abe and
                  Thomas H. Lee},
  editor       = {Gian Mario Maggio and
                  Chris Dwyer},
  title        = {3D on-chip networking technology based on post-silicon devices for
                  future networks-on-chip},
  booktitle    = {1st International {ICST} Conference on Nano-Networks, Nano-Net 2006,
                  Lausanne, Switzerland, September 14-16, 2006},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/NANONET.2006.346233},
  doi          = {10.1109/NANONET.2006.346233},
  timestamp    = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl       = {https://dblp.org/rec/conf/nanonet/FujitaNAL06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/nanonet/NomuraAFD06,
  author       = {Kumiko Nomura and
                  Keiko Abe and
                  Shinobu Fujita and
                  Andr{\'{e}} DeHon},
  editor       = {Gian Mario Maggio and
                  Chris Dwyer},
  title        = {Novel Design of Three-Dimensional Crossbar for Future Network on Chip
                  based on Post-Silicon Devices},
  booktitle    = {1st International {ICST} Conference on Nano-Networks, Nano-Net 2006,
                  Lausanne, Switzerland, September 14-16, 2006},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/NANONET.2006.346226},
  doi          = {10.1109/NANONET.2006.346226},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/nanonet/NomuraAFD06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/esscirc/YasudaTOANF05,
  author       = {Shinichi Yasuda and
                  Tetsufumi Tanamoto and
                  Ryuji Ohba and
                  Keiko Abe and
                  Hanae Nozaki and
                  Shinobu Fujita},
  editor       = {Laurent Fesquet and
                  Andreas Kaiser and
                  Sorin Cristoloveanu and
                  Michel Brillou{\"{e}}t},
  title        = {Physical random number generators for cryptographic application in
                  mobile devices},
  booktitle    = {Proceedings of the 31st European Solid-State Circuits Conference,
                  {ESSCIRC} 2005, Grenoble, France, 12-16 September 2005},
  pages        = {399--402},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ESSCIR.2005.1541644},
  doi          = {10.1109/ESSCIR.2005.1541644},
  timestamp    = {Mon, 01 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/YasudaTOANF05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/YasudaSTOUF04,
  author       = {Shinichi Yasuda and
                  Hideki Satake and
                  Tetsufumi Tanamoto and
                  Ryuji Ohba and
                  Ken Uchida and
                  Shinobu Fujita},
  title        = {Physical random number generator based on {MOS} structure after soft
                  breakdown},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {39},
  number       = {8},
  pages        = {1375--1377},
  year         = {2004},
  url          = {https://doi.org/10.1109/JSSC.2004.831480},
  doi          = {10.1109/JSSC.2004.831480},
  timestamp    = {Fri, 22 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/YasudaSTOUF04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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