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@article{DBLP:journals/tbcas/ZeinolabedinSGK22,
author = {Seyed Mohammad Ali Zeinolabedin and
Franz Marcus Sch{\"{u}}ffny and
Richard George and
Florian Kelber and
Heiner Bauer and
Stefan Scholze and
Stefan H{\"{a}}nzsche and
Marco Stolba and
Andreas Dixius and
Georg Ellguth and
Dennis Walter and
Sebastian H{\"{o}}ppner and
Christian Mayr},
title = {A 16-Channel Fully Configurable Neural SoC With 1.52 {\textdollar}{\textbackslash}mu{\textdollar}W/Ch
Signal Acquisition, 2.79 {\textdollar}{\textbackslash}mu{\textdollar}W/Ch
Real-Time Spike Classifier, and 1.79 {TOPS/W} Deep Neural Network
Accelerator in 22 nm {FDSOI}},
journal = {{IEEE} Trans. Biomed. Circuits Syst.},
volume = {16},
number = {1},
pages = {94--107},
year = {2022},
url = {https://doi.org/10.1109/TBCAS.2022.3142987},
doi = {10.1109/TBCAS.2022.3142987},
timestamp = {Thu, 02 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tbcas/ZeinolabedinSGK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/BauerHICHRDEWUN21,
author = {Heiner Bauer and
Sebastian H{\"{o}}ppner and
Chris Paul Iatrou and
Zohra Charania and
Stephan Hartmann and
Saif{-}Ur Rehman and
Andreas Dixius and
Georg Ellguth and
Dennis Walter and
Johannes Uhlig and
Felix Neum{\"{a}}rker and
Marc Berthel and
Marco Stolba and
Florian Kelber and
Leon Urbas and
Christian Mayr},
title = {Hardware Implementation of an {OPC} {UA} Server for Industrial Field
Devices},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {29},
number = {11},
pages = {1998--2002},
year = {2021},
url = {https://doi.org/10.1109/TVLSI.2021.3117401},
doi = {10.1109/TVLSI.2021.3117401},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/BauerHICHRDEWUN21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2103-08392,
author = {Sebastian H{\"{o}}ppner and
Yexin Yan and
Andreas Dixius and
Stefan Scholze and
Johannes Partzsch and
Marco Stolba and
Florian Kelber and
Bernhard Vogginger and
Felix Neum{\"{a}}rker and
Georg Ellguth and
Stephan Hartmann and
Stefan Schiefer and
Thomas Hocker and
Dennis Walter and
Gengting Liu and
Jim D. Garside and
Steve B. Furber and
Christian Mayr},
title = {The SpiNNaker 2 Processing Element Architecture for Hybrid Digital
Neuromorphic Computing},
journal = {CoRR},
volume = {abs/2103.08392},
year = {2021},
url = {https://arxiv.org/abs/2103.08392},
eprinttype = {arXiv},
eprint = {2103.08392},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2103-08392.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2105-00789,
author = {Heiner Bauer and
Sebastian H{\"{o}}ppner and
Chris Paul Iatrou and
Zohra Charania and
Stephan Hartmann and
Saif{-}Ur Rehman and
Andreas Dixius and
Georg Ellguth and
Dennis Walter and
Johannes Uhlig and
Felix Neum{\"{a}}rker and
Marc Berthel and
Marco Stolba and
Florian Kelber and
Leon Urbas and
Christian Mayr},
title = {Hardware Implementation of an {OPC} {UA} Server for Industrial Field
Devices},
journal = {CoRR},
volume = {abs/2105.00789},
year = {2021},
url = {https://arxiv.org/abs/2105.00789},
eprinttype = {arXiv},
eprint = {2105.00789},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2105-00789.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/HoppnerVYDSPNHS19,
author = {Sebastian H{\"{o}}ppner and
Bernhard Vogginger and
Yexin Yan and
Andreas Dixius and
Stefan Scholze and
Johannes Partzsch and
Felix Neum{\"{a}}rker and
Stephan Hartmann and
Stefan Schiefer and
Georg Ellguth and
Love Cederstroem and
Luis A. Plana and
Jim D. Garside and
Steve B. Furber and
Christian Mayr},
title = {Dynamic Power Management for Neuromorphic Many-Core Systems},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {66-I},
number = {8},
pages = {2973--2986},
year = {2019},
url = {https://doi.org/10.1109/TCSI.2019.2911898},
doi = {10.1109/TCSI.2019.2911898},
timestamp = {Thu, 13 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/HoppnerVYDSPNHS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ProtzeKEH0HSEM19,
author = {Florian Protze and
Martin Krei{\ss}ig and
Frank Ellinger and
Sebastian H{\"{o}}ppner and
Stephan Hartmann and
Stefan H{\"{a}}nzsche and
Stefan Scholze and
Georg Ellguth and
Christian Mayr},
title = {Performance Analysis of a Comparator Based Mixed-Signal Control Loop
in 28 nm {CMOS}},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {155--158},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920295},
doi = {10.1109/VLSI-SOC.2019.8920295},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/ProtzeKEH0HSEM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1903-08941,
author = {Sebastian H{\"{o}}ppner and
Bernhard Vogginger and
Yexin Yan and
Andreas Dixius and
Stefan Scholze and
Johannes Partzsch and
Felix Neumaerker and
Stephan Hartmann and
Stefan Schiefer and
Georg Ellguth and
Love Cederstroem and
Luis A. Plana and
Jim D. Garside and
Steve B. Furber and
Christian Mayr},
title = {Dynamic Power Management for Neuromorphic Many-Core Systems},
journal = {CoRR},
volume = {abs/1903.08941},
year = {2019},
url = {http://arxiv.org/abs/1903.08941},
eprinttype = {arXiv},
eprint = {1903.08941},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1903-08941.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HaasSNSHDAAPMHF17,
author = {Sebastian Haas and
Tobias Seifert and
Benedikt N{\"{o}}then and
Stefan Scholze and
Sebastian H{\"{o}}ppner and
Andreas Dixius and
Esther P{\'{e}}rez Adeva and
Thomas R. Augustin and
Friedrich Pauls and
Sadia Moriam and
Mattis Hasler and
Erik Fischer and
Yong Chen and
Emil Mat{\'{u}}s and
Georg Ellguth and
Stephan Hartmann and
Stefan Schiefer and
Love Cederstr{\"{o}}m and
Dennis Walter and
Stephan Henker and
Stefan H{\"{a}}nzsche and
Johannes Uhlig and
Holger Eisenreich and
Stefan Weithoffer and
Norbert Wehn and
Ren{\'{e}} Sch{\"{u}}ffny and
Christian Mayr and
Gerhard P. Fettweis},
title = {A Heterogeneous {SDR} MPSoC in 28 nm {CMOS} for Low-Latency Wireless
Applications},
booktitle = {Proceedings of the 54th Annual Design Automation Conference, {DAC}
2017, Austin, TX, USA, June 18-22, 2017},
pages = {47:1--47:6},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3061639.3062188},
doi = {10.1145/3061639.3062188},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HaasSNSHDAAPMHF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HoppnerYVDPJNHS17,
author = {Sebastian H{\"{o}}ppner and
Yexin Yan and
Bernhard Vogginger and
Andreas Dixius and
Johannes Partzsch and
Prateek Joshi and
Felix Neum{\"{a}}rker and
Stephan Hartmann and
Stefan Schiefer and
Stefan Scholze and
Georg Ellguth and
Love Cederstroem and
Matthias Eberlein and
Christian Mayr and
Steve Temple and
Luis A. Plana and
Jim D. Garside and
Simon Davidson and
David R. Lester and
Steve B. Furber},
title = {Live demonstration: Dynamic voltage and frequency scaling for neuromorphic
many-core systems},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2017,
Baltimore, MD, USA, May 28-31, 2017},
pages = {1},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISCAS.2017.8050396},
doi = {10.1109/ISCAS.2017.8050396},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/HoppnerYVDPJNHS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HoppnerYVDPNHSS17,
author = {Sebastian H{\"{o}}ppner and
Yexin Yan and
Bernhard Vogginger and
Andreas Dixius and
Johannes Partzsch and
Felix Neum{\"{a}}rker and
Stephan Hartmann and
Stefan Schiefer and
Stefan Scholze and
Georg Ellguth and
Love Cederstroem and
Matthias Eberlein and
Christian Mayr and
Steve Temple and
Luis A. Plana and
Jim D. Garside and
Simon Davidson and
David R. Lester and
Steve B. Furber},
title = {Dynamic voltage and frequency scaling for neuromorphic many-core systems},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2017,
Baltimore, MD, USA, May 28-31, 2017},
pages = {1--4},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISCAS.2017.8050656},
doi = {10.1109/ISCAS.2017.8050656},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/HoppnerYVDPNHSS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tbcas/MayrPNHSHES16,
author = {Christian Mayr and
Johannes Partzsch and
Marko Noack and
Stefan H{\"{a}}nzsche and
Stefan Scholze and
Sebastian H{\"{o}}ppner and
Georg Ellguth and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {A Biological-Realtime Neuromorphic System in 28 nm {CMOS} Using Low-Leakage
Switched Capacitor Circuits},
journal = {{IEEE} Trans. Biomed. Circuits Syst.},
volume = {10},
number = {1},
pages = {243--254},
year = {2016},
url = {https://doi.org/10.1109/TBCAS.2014.2379294},
doi = {10.1109/TBCAS.2014.2379294},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tbcas/MayrPNHSHES16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HaasANSEDHSHHHS16,
author = {Sebastian Haas and
Oliver Arnold and
Benedikt N{\"{o}}then and
Stefan Scholze and
Georg Ellguth and
Andreas Dixius and
Sebastian H{\"{o}}ppner and
Stefan Schiefer and
Stephan Hartmann and
Stephan Henker and
Thomas Hocker and
J{\"{o}}rg Schreiter and
Holger Eisenreich and
Jens{-}Uwe Schl{\"{u}}{\ss}ler and
Dennis Walter and
Tobias Seifert and
Friedrich Pauls and
Mattis Hasler and
Yong Chen and
Hermann Hensel and
Sadia Moriam and
Emil Mat{\'{u}}s and
Christian Mayr and
Ren{\'{e}} Sch{\"{u}}ffny and
Gerhard P. Fettweis},
title = {An MPSoC for energy-efficient database query processing},
booktitle = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
2016, Austin, TX, USA, June 5-9, 2016},
pages = {112:1--112:6},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2897937.2897986},
doi = {10.1145/2897937.2897986},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HaasANSEDHSHHHS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/norchip/HaasASHEDUMNMSC16,
author = {Sebastian Haas and
Oliver Arnold and
Stefan Scholze and
Sebastian H{\"{o}}ppner and
Georg Ellguth and
Andreas Dixius and
Annett Ungeth{\"{u}}m and
Eric Mier and
Benedikt Noethen and
Emil Mat{\'{u}}s and
Stefan Schiefer and
Love Cederstroem and
Fabian Pilz and
Christian Mayr and
Ren{\'{e}} Sch{\"{u}}ffny and
Wolfgang Lehner and
Gerhard P. Fettweis},
title = {A database accelerator for energy-efficient query processing and optimization},
booktitle = {{IEEE} Nordic Circuits and Systems Conference, {NORCAS} 2016, Copenhagen,
Denmark, November 1-2, 2016},
pages = {1--5},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/NORCHIP.2016.7792904},
doi = {10.1109/NORCHIP.2016.7792904},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/norchip/HaasASHEDUMNMSC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HoppnerWHHHSESE15,
author = {Sebastian H{\"{o}}ppner and
Dennis Walter and
Thomas Hocker and
Stephan Henker and
Stefan H{\"{a}}nzsche and
Daniel Sausner and
Georg Ellguth and
Jens{-}Uwe Schluessler and
Holger Eisenreich and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {An Energy Efficient Multi-Gbit/s NoC Transceiver Architecture With
Combined {AC/DC} Drivers and Stoppable Clocking in 65 nm and 28 nm
{CMOS}},
journal = {{IEEE} J. Solid State Circuits},
volume = {50},
number = {3},
pages = {749--762},
year = {2015},
url = {https://doi.org/10.1109/JSSC.2014.2381637},
doi = {10.1109/JSSC.2014.2381637},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/HoppnerWHHHSESE15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/HanzscheHES14,
author = {Stefan H{\"{a}}nzsche and
Sebastian H{\"{o}}ppner and
Georg Ellguth and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {A 12-b 4-MS/s {SAR} {ADC} With Configurable Redundancy in 28-nm {CMOS}
Technology},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {61-II},
number = {11},
pages = {835--839},
year = {2014},
url = {https://doi.org/10.1109/TCSII.2014.2345301},
doi = {10.1109/TCSII.2014.2345301},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/HanzscheHES14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DietelHEEHHSBF14,
author = {Sebastian Dietel and
Sebastian H{\"{o}}ppner and
Holger Eisenreich and
Georg Ellguth and
Stefan H{\"{a}}nzsche and
Stephan Henker and
Ren{\'{e}} Sch{\"{u}}ffny and
Tim Brauninger and
Ulrich Fiedler},
title = {A compact on-chip IR-drop measurement system in 28 nm {CMOS} technology},
booktitle = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
Melbourne, Victoria, Australia, June 1-5, 2014},
pages = {1219--1222},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISCAS.2014.6865361},
doi = {10.1109/ISCAS.2014.6865361},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DietelHEEHHSBF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/NoethenAASFKMFE14,
author = {Benedikt Noethen and
Oliver Arnold and
Esther P. Adeva and
Tobias Seifert and
Erik Fischer and
Steffen Kunze and
Emil Mat{\'{u}}s and
Gerhard P. Fettweis and
Holger Eisenreich and
Georg Ellguth and
Stephan Hartmann and
Sebastian H{\"{o}}ppner and
Stefan Schiefer and
J.{-}U. Schlusler and
Stefan Scholze and
Dennis Walter and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {10.7 {A} 105GOPS 36mm\({}^{\mbox{2}}\) heterogeneous {SDR} MPSoC with
energy-aware dynamic scheduling and iterative detection-decoding for
4G in 65nm {CMOS}},
booktitle = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
{ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
February 9-13, 2014},
pages = {188--189},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISSCC.2014.6757394},
doi = {10.1109/ISSCC.2014.6757394},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/isscc/NoethenAASFKMFE14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/MayrPNHSHES14,
author = {Christian Mayr and
Johannes Partzsch and
Marko Noack and
Stefan H{\"{a}}nzsche and
Stefan Scholze and
Sebastian H{\"{o}}ppner and
Georg Ellguth and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {A Biological-Realtime Neuromorphic System in 28 nm {CMOS} using Low-Leakage
Switched Capacitor Circuits},
journal = {CoRR},
volume = {abs/1412.3233},
year = {2014},
url = {http://arxiv.org/abs/1412.3233},
eprinttype = {arXiv},
eprint = {1412.3233},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/MayrPNHSHES14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/NoackPMHSHES14,
author = {Marko Noack and
Johannes Partzsch and
Christian Mayr and
Stefan H{\"{a}}nzsche and
Stefan Scholze and
Sebastian H{\"{o}}ppner and
Georg Ellguth and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {Switched-Capacitor Realization of Presynaptic Short-Term-Plasticity
and Stop-Learning Synapses in 28 nm {CMOS}},
journal = {CoRR},
volume = {abs/1412.3243},
year = {2014},
url = {http://arxiv.org/abs/1412.3243},
eprinttype = {arXiv},
eprint = {1412.3243},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/NoackPMHSHES14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/HoppnerHEWES13,
author = {Sebastian H{\"{o}}ppner and
Stefan H{\"{a}}nzsche and
Georg Ellguth and
Dennis Walter and
Holger Eisenreich and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {A Fast-Locking {ADPLL} With Instantaneous Restart Capability in 28-nm
{CMOS} Technology},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {60-II},
number = {11},
pages = {741--745},
year = {2013},
url = {https://doi.org/10.1109/TCSII.2013.2278123},
doi = {10.1109/TCSII.2013.2278123},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/HoppnerHEWES13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/HoppnerEHWES13,
author = {Sebastian H{\"{o}}ppner and
Holger Eisenreich and
Stephan Henker and
Dennis Walter and
Georg Ellguth and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {A Compact Clock Generator for Heterogeneous {GALS} MPSoCs in 65-nm
{CMOS} Technology},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {3},
pages = {566--570},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2187224},
doi = {10.1109/TVLSI.2012.2187224},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/HoppnerEHWES13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijertcs/HoppnerWES12,
author = {Sebastian H{\"{o}}ppner and
Dennis Walter and
Georg Ellguth and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {On-Chip Measurement and Compensation of Timing Imbalances in High-Speed
Serial NoC Links},
journal = {Int. J. Embed. Real Time Commun. Syst.},
volume = {3},
number = {4},
pages = {42--56},
year = {2012},
url = {https://doi.org/10.4018/jertcs.2012100103},
doi = {10.4018/JERTCS.2012100103},
timestamp = {Sun, 06 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijertcs/HoppnerWES12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ScholzeEHEHAHPMS12,
author = {Stefan Scholze and
Holger Eisenreich and
Sebastian H{\"{o}}ppner and
Georg Ellguth and
Stephan Henker and
Mario Ander and
Stefan H{\"{a}}nzsche and
Johannes Partzsch and
Christian Mayr and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {A 32 GBit/s communication SoC for a waferscale neuromorphic system},
journal = {Integr.},
volume = {45},
number = {1},
pages = {61--75},
year = {2012},
url = {https://doi.org/10.1016/j.vlsi.2011.05.003},
doi = {10.1016/J.VLSI.2011.05.003},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/ScholzeEHEHAHPMS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HoppnerSEEAS12,
author = {Sebastian H{\"{o}}ppner and
Chenming Shao and
Holger Eisenreich and
Georg Ellguth and
Mario Ander and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {A power management architecture for fast per-core {DVFS} in heterogeneous
MPSoCs},
booktitle = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2012, Seoul, Korea (South), May 20-23, 2012},
pages = {261--264},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISCAS.2012.6271840},
doi = {10.1109/ISCAS.2012.6271840},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HoppnerSEEAS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WalterHEEHHSWF12,
author = {Dennis Walter and
Sebastian H{\"{o}}ppner and
Holger Eisenreich and
Georg Ellguth and
Stephan Henker and
Stefan H{\"{a}}nzsche and
Ren{\'{e}} Sch{\"{u}}ffny and
Markus Winter and
Gerhard P. Fettweis},
title = {A source-synchronous 90Gb/s capacitively driven serial on-chip link
over 6mm in 65nm {CMOS}},
booktitle = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2012, San Francisco, CA, USA, February 19-23, 2012},
pages = {180--182},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISSCC.2012.6176902},
doi = {10.1109/ISSCC.2012.6176902},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/WalterHEEHHSWF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WinterKAMMFEEHSSK12,
author = {Markus Winter and
Steffen Kunze and
Esther P. Adeva and
Bj{\"{o}}rn Mennenga and
Emil Mat{\'{u}}s and
Gerhard P. Fettweis and
Holger Eisenreich and
Georg Ellguth and
Sebastian H{\"{o}}ppner and
Stefan Scholze and
Ren{\'{e}} Sch{\"{u}}ffny and
Tomoyoshi Kobori},
title = {A 335Mb/s 3.9mm\({}^{\mbox{2}}\) 65nm {CMOS} flexible {MIMO} detection-decoding
engine achieving 4G wireless data rates},
booktitle = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2012, San Francisco, CA, USA, February 19-23, 2012},
pages = {216--218},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISSCC.2012.6176981},
doi = {10.1109/ISSCC.2012.6176981},
timestamp = {Wed, 15 Nov 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/WinterKAMMFEEHSSK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/HoppnerWES11,
author = {Sebastian H{\"{o}}ppner and
Dennis Walter and
Georg Ellguth and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {Mismatch characterization of high-speed NoC links using asynchronous
sub-sampling},
booktitle = {2011 International Symposium on System on Chip, SoC 2011, Tampere,
Finland, October 31 - November 2, 2011},
pages = {112--115},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISSOC.2011.6089695},
doi = {10.1109/ISSOC.2011.6089695},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/issoc/HoppnerWES11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RaabBHLSESE10,
author = {Wolfgang Raab and
J{\"{o}}rg Berthold and
J. A. Ulrich Hachmann and
Dominik Langen and
Michael Schreiner and
Holger Eisenreich and
Jens{-}Uwe Schluessler and
Georg Ellguth},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {Low power design of the X-GOLD\({}^{\mbox{{\textregistered}}}\) {SDR}
20 baseband processor},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {792--793},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5456945},
doi = {10.1109/DATE.2010.5456945},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/RaabBHLSESE10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/UhligHES10,
author = {Johannes Uhlig and
Sebastian H{\"{o}}ppner and
Georg Ellguth and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {A low-power cell-based-design multi-port register file in 65nm {CMOS}
technology},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
30 - June 2, 2010, Paris, France},
pages = {313--316},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISCAS.2010.5537838},
doi = {10.1109/ISCAS.2010.5537838},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/UhligHES10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/EllguthHMS09,
author = {Georg Ellguth and
Stephan Henker and
Christian Mayr and
Ren{\'{e}} Sch{\"{u}}ffny},
title = {Current conveyor based amplifier and adaptive buffer for use in an
analog frontend},
booktitle = {16th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2009, Yasmine Hammamet, Tunisia, 13-19 December,
2009},
pages = {9--12},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ICECS.2009.5410940},
doi = {10.1109/ICECS.2009.5410940},
timestamp = {Fri, 07 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/EllguthHMS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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