BibTeX records: Eugene Earlie

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@article{DBLP:journals/tcad/ParkSDDNPE08,
  author       = {Sanghyun Park and
                  Aviral Shrivastava and
                  Nikil D. Dutt and
                  Alexandru Nicolau and
                  Yunheung Paek and
                  Eugene Earlie},
  title        = {Register File Power Reduction Using Bypass Sensitive Compiler},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {27},
  number       = {6},
  pages        = {1155--1159},
  year         = {2008},
  url          = {https://doi.org/10.1109/TCAD.2008.923254},
  doi          = {10.1109/TCAD.2008.923254},
  timestamp    = {Sun, 22 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/ParkSDDNPE08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShrivastavaPEDNP07,
  author       = {Aviral Shrivastava and
                  Sanghyun Park and
                  Eugene Earlie and
                  Nikil D. Dutt and
                  Alexandru Nicolau and
                  Yunheung Paek},
  title        = {Automatic Design Space Exploration of Register Bypasses in Embedded
                  Processors},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {26},
  number       = {12},
  pages        = {2102--2115},
  year         = {2007},
  url          = {https://doi.org/10.1109/TCAD.2007.907066},
  doi          = {10.1109/TCAD.2007.907066},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tcad/ShrivastavaPEDNP07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ShrivastavaEDN06,
  author       = {Aviral Shrivastava and
                  Eugene Earlie and
                  Nikil D. Dutt and
                  Alexandru Nicolau},
  title        = {Retargetable pipeline hazard detection for partially bypassed processors},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {14},
  number       = {8},
  pages        = {791--801},
  year         = {2006},
  url          = {https://doi.org/10.1109/TVLSI.2006.878468},
  doi          = {10.1109/TVLSI.2006.878468},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/ShrivastavaEDN06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ParkESNDP06,
  author       = {Sanghyun Park and
                  Eugene Earlie and
                  Aviral Shrivastava and
                  Alex Nicolau and
                  Nikil D. Dutt and
                  Yunheung Paek},
  editor       = {Georges G. E. Gielen},
  title        = {Automatic generation of operation tables for fast exploration of bypasses
                  in embedded processors},
  booktitle    = {Proceedings of the Conference on Design, Automation and Test in Europe,
                  {DATE} 2006, Munich, Germany, March 6-10, 2006},
  pages        = {1197--1202},
  publisher    = {European Design and Automation Association, Leuven, Belgium},
  year         = {2006},
  url          = {https://doi.org/10.1109/DATE.2006.244047},
  doi          = {10.1109/DATE.2006.244047},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/ParkESNDP06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/ParkSDNPE06,
  author       = {Sanghyun Park and
                  Aviral Shrivastava and
                  Nikil D. Dutt and
                  Alexandru Nicolau and
                  Yunheung Paek and
                  Eugene Earlie},
  editor       = {Mary Jane Irwin and
                  Koen De Bosschere},
  title        = {Bypass aware instruction scheduling for register file power reduction},
  booktitle    = {Proceedings of the 2006 {ACM} {SIGPLAN/SIGBED} Conference on Languages,
                  Compilers, and Tools for Embedded Systems (LCTES'06), Ottawa, Ontario,
                  Canada, June 14-16, 2006},
  pages        = {173--181},
  publisher    = {{ACM}},
  year         = {2006},
  url          = {https://doi.org/10.1145/1134650.1134675},
  doi          = {10.1145/1134650.1134675},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/lctrts/ParkSDNPE06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/ShrivastavaEDN05,
  author       = {Aviral Shrivastava and
                  Eugene Earlie and
                  Nikil D. Dutt and
                  Alexandru Nicolau},
  editor       = {Petru Eles and
                  Axel Jantsch and
                  Reinaldo A. Bergamaschi},
  title        = {Aggregating processor free time for energy reduction},
  booktitle    = {Proceedings of the 3rd {IEEE/ACM/IFIP} International Conference on
                  Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2005,
                  Jersey City, NJ, USA, September 19-21, 2005},
  pages        = {154--159},
  publisher    = {{ACM}},
  year         = {2005},
  url          = {https://doi.org/10.1145/1084834.1084876},
  doi          = {10.1145/1084834.1084876},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/codes/ShrivastavaEDN05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ShrivastavaDNE05,
  author       = {Aviral Shrivastava and
                  Nikil D. Dutt and
                  Alexandru Nicolau and
                  Eugene Earlie},
  title        = {PBExplore: {A} Framework for Compiler-in-the-Loop Exploration of Partial
                  Bypassing in Embedded Processors},
  booktitle    = {2005 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2005), 7-11 March 2005, Munich, Germany},
  pages        = {1264--1269},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/DATE.2005.236},
  doi          = {10.1109/DATE.2005.236},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/ShrivastavaDNE05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/ShrivastavaEDN04,
  author       = {Aviral Shrivastava and
                  Eugene Earlie and
                  Nikil D. Dutt and
                  Alexandru Nicolau},
  editor       = {Alex Orailoglu and
                  Pai H. Chou and
                  Petru Eles and
                  Axel Jantsch},
  title        = {Operation tables for scheduling in the presence of incomplete bypassing},
  booktitle    = {Proceedings of the 2nd {IEEE/ACM/IFIP} International Conference on
                  Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2004,
                  Stockholm, Sweden, September 8-10, 2004},
  pages        = {194--199},
  publisher    = {{ACM}},
  year         = {2004},
  url          = {https://doi.org/10.1145/1016720.1016768},
  doi          = {10.1145/1016720.1016768},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/codes/ShrivastavaEDN04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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