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BibTeX records: Manh Anh Do

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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@article{DBLP:journals/tvlsi/ChenYSDBL13,
  author       = {Dandan Chen and
                  Kiat Seng Yeo and
                  Xiaomeng Shi and
                  Manh Anh Do and
                  Chirn Chye Boon and
                  Wei Meng Lim},
  title        = {Cross-Coupled Current Conveyor Based {CMOS} Transimpedance Amplifier
                  for Broadband Data Transmission},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {21},
  number       = {8},
  pages        = {1516--1525},
  year         = {2013},
  url          = {https://doi.org/10.1109/TVLSI.2012.2211086},
  doi          = {10.1109/TVLSI.2012.2211086},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/ChenYSDBL13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/XieKDBY12,
  author       = {Juan Xie and
                  Manthena Vamshi Krishna and
                  Manh Anh Do and
                  Chirn Chye Boon and
                  Kiat Seng Yeo},
  title        = {A low power low phase noise dual-band multiphase {VCO}},
  journal      = {Microelectron. J.},
  volume       = {43},
  number       = {12},
  pages        = {1016--1022},
  year         = {2012},
  url          = {https://doi.org/10.1016/j.mejo.2012.07.019},
  doi          = {10.1016/J.MEJO.2012.07.019},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/mj/XieKDBY12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/TanYBD12,
  author       = {Yung Sern Tan and
                  Kiat Seng Yeo and
                  Chirn Chye Boon and
                  Manh Anh Do},
  title        = {A Dual-Loop Clock and Data Recovery Circuit With Compact Quarter-Rate
                  {CMOS} Linear Phase Detector},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {59-I},
  number       = {6},
  pages        = {1156--1167},
  year         = {2012},
  url          = {https://doi.org/10.1109/TCSI.2011.2173387},
  doi          = {10.1109/TCSI.2011.2173387},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/TanYBD12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/ManthenaDBY12,
  author       = {Manthena Vamshi Krishna and
                  Manh Anh Do and
                  Chirn Chye Boon and
                  Kiat Seng Yeo},
  title        = {A Low-Power Single-Phase Clock Multiband Flexible Divider},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {376--380},
  year         = {2012},
  url          = {https://doi.org/10.1109/TVLSI.2010.2100052},
  doi          = {10.1109/TVLSI.2010.2100052},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/ManthenaDBY12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/apccas/MengMXYBLD12,
  author       = {Fanyi Meng and
                  Kaixue Ma and
                  Shanshan Xu and
                  Kiat Seng Yeo and
                  Chirn Chye Boon and
                  Wei Meng Lim and
                  Manh Anh Do},
  title        = {Design of quarter-wavelength resonator filters with coupling controllable
                  paths},
  booktitle    = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2012,
                  Kaohsiung, Taiwan, December 2-5, 2012},
  pages        = {248--251},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/APCCAS.2012.6419018},
  doi          = {10.1109/APCCAS.2012.6419018},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/apccas/MengMXYBLD12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/MeaamarBSLYD11,
  author       = {Ali Meaamar and
                  Chirn Chye Boon and
                  Xiaomeng Shi and
                  Wei Meng Lim and
                  Kiat Seng Yeo and
                  Manh Anh Do},
  title        = {A 3.1-8 GHz {CMOS} {UWB} front-end receiver},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
                  15-19 2011, Rio de Janeiro, Brazil},
  pages        = {1556--1559},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ISCAS.2011.5937873},
  doi          = {10.1109/ISCAS.2011.5937873},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/MeaamarBSLYD11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/KrishnaDYBL10,
  author       = {Manthena Vamshi Krishna and
                  Manh Anh Do and
                  Kiat Seng Yeo and
                  Chirn Chye Boon and
                  Wei Meng Lim},
  title        = {Design and Analysis of Ultra Low Power True Single Phase Clock {CMOS}
                  2/3 Prescaler},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {57-I},
  number       = {1},
  pages        = {72--82},
  year         = {2010},
  url          = {https://doi.org/10.1109/TCSI.2009.2016183},
  doi          = {10.1109/TCSI.2009.2016183},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/KrishnaDYBL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/MeaamarBYD10,
  author       = {Ali Meaamar and
                  Chirn Chye Boon and
                  Kiat Seng Yeo and
                  Manh Anh Do},
  title        = {A Wideband Low Power Low-Noise Amplifier in {CMOS} Technology},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {57-I},
  number       = {4},
  pages        = {773--782},
  year         = {2010},
  url          = {https://doi.org/10.1109/TCSI.2009.2028592},
  doi          = {10.1109/TCSI.2009.2028592},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/MeaamarBYD10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/DoBDYC10,
  author       = {Aaron V. T. Do and
                  Chirn Chye Boon and
                  Manh Anh Do and
                  Kiat Seng Yeo and
                  Alper Cabuk},
  title        = {An Energy-Aware {CMOS} Receiver Front End for Low-Power 2.4-GHz Applications},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {57-I},
  number       = {10},
  pages        = {2675--2684},
  year         = {2010},
  url          = {https://doi.org/10.1109/TCSI.2010.2047750},
  doi          = {10.1109/TCSI.2010.2047750},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/DoBDYC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/LuYLDB10,
  author       = {Zhenghao Lu and
                  Kiat Seng Yeo and
                  Wei Meng Lim and
                  Manh Anh Do and
                  Chirn Chye Boon},
  title        = {Design of a {CMOS} Broadband Transimpedance Amplifier With Active
                  Feedback},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {18},
  number       = {3},
  pages        = {461--472},
  year         = {2010},
  url          = {https://doi.org/10.1109/TVLSI.2008.2012262},
  doi          = {10.1109/TVLSI.2008.2012262},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/LuYLDB10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/DoBKDY10,
  author       = {Aaron V. T. Do and
                  Chirn Chye Boon and
                  Manthena Vamshi Krishna and
                  Manh Anh Do and
                  Kiat Seng Yeo},
  editor       = {Jos{\'{e}} L. Ayala and
                  David Atienza Alonso and
                  Ricardo Reis},
  title        = {A 1-V {CMOS} Ultralow-Power Receiver Front End for the {IEEE} 802.15.4
                  Standard Using Tuned Passive Mixer Output Pole},
  booktitle    = {VLSI-SoC: Forward-Looking Trends in {IC} and Systems Design - 18th
                  {IFIP} {WG} 10.5/IEEE International Conference on Very Large Scale
                  Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010,
                  Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {373},
  pages        = {1--21},
  publisher    = {Springer},
  year         = {2010},
  url          = {https://doi.org/10.1007/978-3-642-28566-0\_1},
  doi          = {10.1007/978-3-642-28566-0\_1},
  timestamp    = {Tue, 22 Oct 2019 15:21:19 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/DoBKDY10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/KrishnaJDBYD10,
  author       = {Manthena Vamshi Krishna and
                  Xuan Jie and
                  Manh Anh Do and
                  Chirn Chye Boon and
                  Kiat Seng Yeo and
                  Aaron V. T. Do},
  editor       = {Jos{\'{e}} L. Ayala and
                  David Atienza Alonso and
                  Ricardo Reis},
  title        = {A 1.8-V 3.6-mW 2.4-GHz Fully Integrated {CMOS} Frequency Synthesizer
                  for the {IEEE} 802.15.4},
  booktitle    = {VLSI-SoC: Forward-Looking Trends in {IC} and Systems Design - 18th
                  {IFIP} {WG} 10.5/IEEE International Conference on Very Large Scale
                  Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010,
                  Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {373},
  pages        = {69--99},
  publisher    = {Springer},
  year         = {2010},
  url          = {https://doi.org/10.1007/978-3-642-28566-0\_4},
  doi          = {10.1007/978-3-642-28566-0\_4},
  timestamp    = {Tue, 26 Jun 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/KrishnaJDBYD10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/DoBDYC10,
  author       = {Aaron V. T. Do and
                  Chirn Chye Boon and
                  Manh Anh Do and
                  Kiat Seng Yeo and
                  Alper Cabuk},
  title        = {A 1-V {CMOS} ultralow-power receiver front end for the {IEEE} 802.15.4
                  standard using tuned passive mixer output pole},
  booktitle    = {18th {IEEE/IFIP} VLSI-SoC 2010, {IEEE/IFIP} {WG} 10.5 International
                  Conference on Very Large Scale Integration of System-on-Chip, Madrid,
                  Spain, 27-29 September 2010},
  pages        = {381--386},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/VLSISOC.2010.5642691},
  doi          = {10.1109/VLSISOC.2010.5642691},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/DoBDYC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/KrishnaXDBYD10,
  author       = {Manthena Vamshi Krishna and
                  Juan Xie and
                  Manh Anh Do and
                  Chirn Chye Boon and
                  Kiat Seng Yeo and
                  Aaron V. T. Do},
  title        = {A 1.8-V 3.6-mW 2.4-GHz fully integrated {CMOS} frequency synthesizer
                  for {IEEE} 802.15.4},
  booktitle    = {18th {IEEE/IFIP} VLSI-SoC 2010, {IEEE/IFIP} {WG} 10.5 International
                  Conference on Very Large Scale Integration of System-on-Chip, Madrid,
                  Spain, 27-29 September 2010},
  pages        = {387--391},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/VLSISOC.2010.5642692},
  doi          = {10.1109/VLSISOC.2010.5642692},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/KrishnaXDBYD10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/JiangDYL08,
  author       = {Shan Jiang and
                  Manh Anh Do and
                  Kiat Seng Yeo and
                  Wei Meng Lim},
  title        = {An 8-bit 200-MSample/s Pipelined {ADC} With Mixed-Mode Front-End {S/H}
                  Circuit},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {55-I},
  number       = {6},
  pages        = {1430--1440},
  year         = {2008},
  url          = {https://doi.org/10.1109/TCSI.2008.916613},
  doi          = {10.1109/TCSI.2008.916613},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/JiangDYL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/ShiYMDL08,
  author       = {Xiaomeng Shi and
                  Kiat Seng Yeo and
                  Jianguo Ma and
                  Manh Anh Do and
                  Erping Li},
  title        = {Complex Shaped On-Wafer Interconnects Modeling for {CMOS} RFICs},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {16},
  number       = {7},
  pages        = {922--926},
  year         = {2008},
  url          = {https://doi.org/10.1109/TVLSI.2008.2000445},
  doi          = {10.1109/TVLSI.2008.2000445},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/ShiYMDL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/ShiYMD07,
  author       = {Xiaomeng Shi and
                  Kiat Seng Yeo and
                  Jianguo Ma and
                  Manh Anh Do},
  title        = {Distortion of pulsed signals in carbon nanotube interconnects},
  journal      = {Microelectron. J.},
  volume       = {38},
  number       = {3},
  pages        = {365--370},
  year         = {2007},
  url          = {https://doi.org/10.1016/j.mejo.2007.01.005},
  doi          = {10.1016/J.MEJO.2007.01.005},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/mj/ShiYMD07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/LuYMDLC07,
  author       = {Zhenghao Lu and
                  Kiat Seng Yeo and
                  Jianguo Ma and
                  Manh Anh Do and
                  Wei Meng Lim and
                  Xueying Chen},
  title        = {Broad-Band Design Techniques for Transimpedance Amplifiers},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {54-I},
  number       = {3},
  pages        = {590--600},
  year         = {2007},
  url          = {https://doi.org/10.1109/TCSI.2006.887610},
  doi          = {10.1109/TCSI.2006.887610},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/LuYMDLC07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jcsc/LiuDYYJM06,
  author       = {J. J. Liu and
                  Manh Anh Do and
                  Xiaopeng Yu and
                  Kiat Seng Yeo and
                  Shan Jiang and
                  Jianguo Ma},
  title        = {Cmos Even Harmonic Switching mixer for Direct Conversion Receivers},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {15},
  number       = {2},
  pages        = {183--196},
  year         = {2006},
  url          = {https://doi.org/10.1142/S0218126606003131},
  doi          = {10.1142/S0218126606003131},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/LiuDYYJM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/LuYCMDL06,
  author       = {Yang Lu and
                  Kiat Seng Yeo and
                  Alper Cabuk and
                  Jianguo Ma and
                  Manh Anh Do and
                  Zhenghao Lu},
  title        = {A novel {CMOS} low-noise amplifier design for 3.1- to 10.6-GHz ultra-wide-band
                  wireless receivers},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {53-I},
  number       = {8},
  pages        = {1683--1692},
  year         = {2006},
  url          = {https://doi.org/10.1109/TCSI.2006.879059},
  doi          = {10.1109/TCSI.2006.879059},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/LuYCMDL06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/JiangDY06a,
  author       = {Shan Jiang and
                  Manh Anh Do and
                  Kiat Seng Yeo},
  editor       = {Giovanni De Micheli and
                  Salvador Mir and
                  Ricardo Reis},
  title        = {A {CMOS} Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs},
  booktitle    = {VLSI-SoC: Research Trends in {VLSI} and Systems on Chip - Fourteenth
                  International Conference on Very Large Scale Integration of System
                  on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France},
  series       = {{IFIP}},
  volume       = {249},
  pages        = {81--99},
  publisher    = {Springer},
  year         = {2006},
  url          = {https://doi.org/10.1007/978-0-387-74909-9\_6},
  doi          = {10.1007/978-0-387-74909-9\_6},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/JiangDY06a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/YuDMY06,
  author       = {Xiaopeng Yu and
                  Manh Anh Do and
                  Jianguo Ma and
                  Kiat Seng Yeo},
  title        = {A New Phase Noise Model for {TSPC} based divider},
  booktitle    = {{IFIP} VLSI-SoC 2006, {IFIP} {WG} 10.5 International Conference on
                  Very Large Scale Integration of System-on-Chip, Nice, France, 16-18
                  October 2006},
  pages        = {348--351},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/VLSISOC.2006.313259},
  doi          = {10.1109/VLSISOC.2006.313259},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/YuDMY06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/JiangDY06,
  author       = {Shan Jiang and
                  Manh Anh Do and
                  Kiat Seng Yeo},
  title        = {A 200-MHz {CMOS} Mixed-Mode Sample-and-Hold Circuit for Pipelined
                  ADCs},
  booktitle    = {{IFIP} VLSI-SoC 2006, {IFIP} {WG} 10.5 International Conference on
                  Very Large Scale Integration of System-on-Chip, Nice, France, 16-18
                  October 2006},
  pages        = {352--356},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/VLSISOC.2006.313260},
  doi          = {10.1109/VLSISOC.2006.313260},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/JiangDY06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/BoonDYM05,
  author       = {Chirn Chye Boon and
                  Manh Anh Do and
                  Kiat Seng Yeo and
                  Jianguo Ma},
  title        = {Fully integrated {CMOS} fractional-N frequency divider for wide-band
                  mobile applications with spurs reduction},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {52-I},
  number       = {6},
  pages        = {1042--1048},
  year         = {2005},
  url          = {https://doi.org/10.1109/TCSI.2005.849124},
  doi          = {10.1109/TCSI.2005.849124},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/BoonDYM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/MouMYD05,
  author       = {Shouxian Mou and
                  Jianguo Ma and
                  Kiat Seng Yeo and
                  Manh Anh Do},
  title        = {A modified architecture used for input matching in {CMOS} low-noise
                  amplifiers},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {52-II},
  number       = {11},
  pages        = {784--788},
  year         = {2005},
  url          = {https://doi.org/10.1109/TCSII.2005.852930},
  doi          = {10.1109/TCSII.2005.852930},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/MouMYD05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/ShiMYDL05,
  author       = {Xiaomeng Shi and
                  Jianguo Ma and
                  Kiat Seng Yeo and
                  Manh Anh Do and
                  Erping Li},
  title        = {Equivalent circuit model of on-wafer {CMOS} interconnects for RFICs},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {13},
  number       = {9},
  pages        = {1060--1071},
  year         = {2005},
  url          = {https://doi.org/10.1109/TVLSI.2005.857177},
  doi          = {10.1109/TVLSI.2005.857177},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/ShiMYDL05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/YuDJMY05,
  author       = {Xiaopeng Yu and
                  Manh Anh Do and
                  Lin Jia and
                  Jianguo Ma and
                  Kiat Seng Yeo},
  title        = {Design of a low power wide-band high resolution programmable frequency
                  divider},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {13},
  number       = {9},
  pages        = {1098--1103},
  year         = {2005},
  url          = {https://doi.org/10.1109/TVLSI.2005.857153},
  doi          = {10.1109/TVLSI.2005.857153},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/YuDJMY05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/JiaMYD05,
  author       = {Lin Jia and
                  Jianguo Ma and
                  Kiat Seng Yeo and
                  Manh Anh Do},
  title        = {A novel methodology for the design of {LC} tank {VCO} with low phase
                  noise},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {376--379},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1464603},
  doi          = {10.1109/ISCAS.2005.1464603},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JiaMYD05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LimMDY05,
  author       = {Wei Meng Lim and
                  Han Guo Ma and
                  Manh Anh Do and
                  Kiat Seng Yeo},
  title        = {A 5GHz to 6GHz integrated differential {LNA}},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {4815--4818},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1465710},
  doi          = {10.1109/ISCAS.2005.1465710},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LimMDY05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/YuDMY05,
  author       = {Xiaopeng Yu and
                  Manh Anh Do and
                  Jianguo Ma and
                  Kiat Seng Yeo},
  title        = {A new 5 GHz {CMOS} dual-modulus prescaler},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {5027--5030},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1465763},
  doi          = {10.1109/ISCAS.2005.1465763},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/YuDMY05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/BoonDYM004,
  author       = {Chirn Chye Boon and
                  Manh Anh Do and
                  Kiat Seng Yeo and
                  Jianguo Ma and
                  Xiaoling Zhang},
  title        = {{RF} {CMOS} low-phase-noise {LC} oscillator through memory reduction
                  tail transistor},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {51-II},
  number       = {2},
  pages        = {85--90},
  year         = {2004},
  url          = {https://doi.org/10.1109/TCSII.2003.821519},
  doi          = {10.1109/TCSII.2003.821519},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/BoonDYM004.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/slip/OngSYMDL04,
  author       = {Beng Hwee Ong and
                  Choon Beng Sia and
                  Kiat Seng Yeo and
                  Jianguo Ma and
                  Manh Anh Do and
                  Erping Li},
  editor       = {Louis Scheffer and
                  Igor L. Markov},
  title        = {Investigating the frequency dependence elements of {CMOS} {RFIC} interconnects
                  for physical modeling},
  booktitle    = {The Sixth International Workshop on System-Level Interconnect Prediction
                  {(SLIP} 2004), Paris, France, February 14-15, 2004, Proceedings},
  pages        = {31--38},
  publisher    = {{ACM}},
  year         = {2004},
  url          = {https://doi.org/10.1145/966747.966754},
  doi          = {10.1145/966747.966754},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/slip/OngSYMDL04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/wpc/ChenD01,
  author       = {Wanshi Chen and
                  Manh Anh Do},
  title        = {A New Improved First-Order Approximate Decorrelating Detector for
                  {DS-CDMA} Communication Systems},
  journal      = {Wirel. Pers. Commun.},
  volume       = {16},
  number       = {3},
  pages        = {221--228},
  year         = {2001},
  url          = {https://doi.org/10.1023/A:1008964430310},
  doi          = {10.1023/A:1008964430310},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/wpc/ChenD01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvt/ChenD00,
  author       = {Wanshi Chen and
                  Manh Anh Do},
  title        = {Performance analysis of adaptive {MMSE} reception for {DS-CDMA} in
                  flat Nakagami fading channels},
  journal      = {{IEEE} Trans. Veh. Technol.},
  volume       = {49},
  number       = {2},
  pages        = {561--564},
  year         = {2000},
  url          = {https://doi.org/10.1109/25.832987},
  doi          = {10.1109/25.832987},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvt/ChenD00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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