BibTeX records: Partha De

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@article{DBLP:journals/tcas/DeP020,
  author       = {Partha De and
                  Udaya Parampalli and
                  Chittaranjan Mandal},
  title        = {Secure Path Balanced BDD-Based Pre-Charge Logic for Masking},
  journal      = {{IEEE} Trans. Circuits Syst.},
  volume       = {67-I},
  number       = {12},
  pages        = {4747--4760},
  year         = {2020},
  url          = {https://doi.org/10.1109/TCSI.2020.3019921},
  doi          = {10.1109/TCSI.2020.3019921},
  timestamp    = {Wed, 16 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tcas/DeP020.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/DeMP19,
  author       = {Partha De and
                  Chittaranjan Mandal and
                  Udaya Parampalli},
  title        = {Path-Balanced Logic Design to Realize Block Ciphers Resistant to Power
                  and Timing Attacks},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {27},
  number       = {5},
  pages        = {1080--1092},
  year         = {2019},
  url          = {https://doi.org/10.1109/TVLSI.2019.2896377},
  doi          = {10.1109/TVLSI.2019.2896377},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/DeMP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/wiopt/DeSC16,
  author       = {Partha De and
                  Kamil Sara{\c{c}} and
                  Ramaswamy Chandrasekaran},
  title        = {Heuristics for 2-coverage multi point relay problem in wireless ad
                  hoc and sensor networks},
  booktitle    = {14th International Symposium on Modeling and Optimization in Mobile,
                  Ad Hoc, and Wireless Networks, WiOpt 2016, Tempe, AZ, USA, May 9-13,
                  2016},
  pages        = {45--52},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/WIOPT.2016.7492902},
  doi          = {10.1109/WIOPT.2016.7492902},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/wiopt/DeSC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dsd/DeBMM14,
  author       = {Partha De and
                  Kunal Banerjee and
                  Chittaranjan A. Mandal and
                  Debdeep Mukhopadhyay},
  title        = {Circuits and Synthesis Mechanism for Hardware Design to Counter Power
                  Analysis Attacks},
  booktitle    = {17th Euromicro Conference on Digital System Design, {DSD} 2014, Verona,
                  Italy, August 27-29, 2014},
  pages        = {520--527},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/DSD.2014.61},
  doi          = {10.1109/DSD.2014.61},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/DeBMM14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vdat/DeBM14,
  author       = {Partha De and
                  Kunal Banerjee and
                  Chittaranjan A. Mandal},
  title        = {A {BDD} based secure hardware design method to guard against power
                  analysis attacks},
  booktitle    = {18th International Symposium on {VLSI} Design and Test, {VDAT} 2014,
                  Coimbatore, India, July 16-18, 2014},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISVDAT.2014.6881088},
  doi          = {10.1109/ISVDAT.2014.6881088},
  timestamp    = {Sat, 04 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vdat/DeBM14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dsd/DeBMM13,
  author       = {Partha De and
                  Kunal Banerjee and
                  Chittaranjan A. Mandal and
                  Debdeep Mukhopadhyay},
  title        = {Designing {DPA} Resistant Circuits Using {BDD} Architecture and Bottom
                  Pre-charge Logic},
  booktitle    = {2013 Euromicro Conference on Digital System Design, {DSD} 2013, Los
                  Alamitos, CA, USA, September 4-6, 2013},
  pages        = {641--644},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/DSD.2013.128},
  doi          = {10.1109/DSD.2013.128},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/DeBMM13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}