BibTeX records: Chia-Chen Chou

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@inproceedings{DBLP:conf/isca/YoungCJQ18,
  author       = {Vinson Young and
                  Chia{-}Chen Chou and
                  Aamer Jaleel and
                  Moinuddin K. Qureshi},
  editor       = {Murali Annavaram and
                  Timothy Mark Pinkston and
                  Babak Falsafi},
  title        = {{ACCORD:} Enabling Associativity for Gigascale {DRAM} Caches by Coordinating
                  Way-Install and Way-Prediction},
  booktitle    = {45th {ACM/IEEE} Annual International Symposium on Computer Architecture,
                  {ISCA} 2018, Los Angeles, CA, USA, June 1-6, 2018},
  pages        = {328--339},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISCA.2018.00036},
  doi          = {10.1109/ISCA.2018.00036},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/YoungCJQ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/ChouJQ17,
  author       = {Chia{-}Chen Chou and
                  Aamer Jaleel and
                  Moinuddin K. Qureshi},
  title        = {{BATMAN:} techniques for maximizing system bandwidth of memory systems
                  with stacked-DRAM},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2017, Alexandria, VA, USA, October 02 - 05, 2017},
  pages        = {268--280},
  publisher    = {{ACM}},
  year         = {2017},
  url          = {https://doi.org/10.1145/3132402.3132404},
  doi          = {10.1145/3132402.3132404},
  timestamp    = {Fri, 13 Nov 2020 09:24:44 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/ChouJQ17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/ChouJQ16,
  author       = {Chia{-}Chen Chou and
                  Aamer Jaleel and
                  Moinuddin K. Qureshi},
  title        = {{CANDY:} Enabling coherent {DRAM} caches for multi-node systems},
  booktitle    = {49th Annual {IEEE/ACM} International Symposium on Microarchitecture,
                  {MICRO} 2016, Taipei, Taiwan, October 15-19, 2016},
  pages        = {35:1--35:13},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MICRO.2016.7783738},
  doi          = {10.1109/MICRO.2016.7783738},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/ChouJQ16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dsn/ChouNQ15,
  author       = {Chia{-}Chen Chou and
                  Prashant J. Nair and
                  Moinuddin K. Qureshi},
  title        = {Reducing Refresh Power in Mobile Devices with Morphable {ECC}},
  booktitle    = {45th Annual {IEEE/IFIP} International Conference on Dependable Systems
                  and Networks, {DSN} 2015, Rio de Janeiro, Brazil, June 22-25, 2015},
  pages        = {355--366},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/DSN.2015.33},
  doi          = {10.1109/DSN.2015.33},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dsn/ChouNQ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hpca/NairCRQ15,
  author       = {Prashant J. Nair and
                  Chia{-}Chen Chou and
                  Bipin Rajendran and
                  Moinuddin K. Qureshi},
  title        = {Reducing read latency of phase change memory via early read and Turbo
                  Read},
  booktitle    = {21st {IEEE} International Symposium on High Performance Computer Architecture,
                  {HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015},
  pages        = {309--319},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/HPCA.2015.7056042},
  doi          = {10.1109/HPCA.2015.7056042},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hpca/NairCRQ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isca/ChouJQ15,
  author       = {Chia{-}Chen Chou and
                  Aamer Jaleel and
                  Moinuddin K. Qureshi},
  editor       = {Deborah T. Marr and
                  David H. Albonesi},
  title        = {{BEAR:} techniques for mitigating bandwidth bloat in gigascale {DRAM}
                  caches},
  booktitle    = {Proceedings of the 42nd Annual International Symposium on Computer
                  Architecture, Portland, OR, USA, June 13-17, 2015},
  pages        = {198--210},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {https://doi.org/10.1145/2749469.2750387},
  doi          = {10.1145/2749469.2750387},
  timestamp    = {Fri, 09 Jul 2021 15:51:20 +0200},
  biburl       = {https://dblp.org/rec/conf/isca/ChouJQ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/NairCQ14,
  author       = {Prashant J. Nair and
                  Chia{-}Chen Chou and
                  Moinuddin K. Qureshi},
  title        = {Refresh pausing in {DRAM} memory systems},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {11},
  number       = {1},
  pages        = {10:1--10:26},
  year         = {2014},
  url          = {https://doi.org/10.1145/2579669},
  doi          = {10.1145/2579669},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/NairCQ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/ChouJQ14,
  author       = {Chia{-}Chen Chou and
                  Aamer Jaleel and
                  Moinuddin K. Qureshi},
  title        = {{CAMEO:} {A} Two-Level Memory Organization with Capacity of Main Memory
                  and Flexibility of Hardware-Managed Cache},
  booktitle    = {47th Annual {IEEE/ACM} International Symposium on Microarchitecture,
                  {MICRO} 2014, Cambridge, United Kingdom, December 13-17, 2014},
  pages        = {1--12},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/MICRO.2014.63},
  doi          = {10.1109/MICRO.2014.63},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/ChouJQ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hpca/NairCQ13,
  author       = {Prashant J. Nair and
                  Chia{-}Chen Chou and
                  Moinuddin K. Qureshi},
  title        = {A case for Refresh Pausing in {DRAM} memory systems},
  booktitle    = {19th {IEEE} International Symposium on High Performance Computer Architecture,
                  {HPCA} 2013, Shenzhen, China, February 23-27, 2013},
  pages        = {627--638},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/HPCA.2013.6522355},
  doi          = {10.1109/HPCA.2013.6522355},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hpca/NairCQ13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/ChenCLL10,
  author       = {Yu{-}Hui Chen and
                  Chia{-}Chen Chou and
                  Hung{-}yi Lee and
                  Lin{-}Shan Lee},
  title        = {An initial attempt to improve spoken term detection by learning optimal
                  weights for different indexing features},
  booktitle    = {Proceedings of the {IEEE} International Conference on Acoustics, Speech,
                  and Signal Processing, {ICASSP} 2010, 14-19 March 2010, Sheraton Dallas
                  Hotel, Dallas, Texas, {USA}},
  pages        = {5278--5281},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ICASSP.2010.5494981},
  doi          = {10.1109/ICASSP.2010.5494981},
  timestamp    = {Thu, 28 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icassp/ChenCLL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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