Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDBibTeX records: Peter Y. K. Cheung
@article{DBLP:journals/tecs/WangDMZLCCCC23,
author = {Erwei Wang and
James J. Davis and
Daniele Moro and
Piotr Zielinski and
Jia Jie Lim and
Claudionor Coelho and
Satrajit Chatterjee and
Peter Y. K. Cheung and
George A. Constantinides},
title = {Enabling Binary Neural Network Training on the Edge},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {22},
number = {6},
pages = {105:1--105:19},
year = {2023},
url = {https://doi.org/10.1145/3626100},
doi = {10.1145/3626100},
timestamp = {Sat, 13 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/WangDMZLCCCC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/WangASCCAD23,
author = {Erwei Wang and
Marie Auffret and
Georgios{-}Ilias Stavrou and
Peter Y. K. Cheung and
George A. Constantinides and
Mohamed S. Abdelfattah and
James J. Davis},
title = {Logic Shrinkage: Learned Connectivity Sparsification for LUT-Based
Neural Networks},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {16},
number = {4},
pages = {57:1--57:25},
year = {2023},
url = {https://doi.org/10.1145/3583075},
doi = {10.1145/3583075},
timestamp = {Sat, 13 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/trets/WangASCCAD23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Wang0SCCA22,
author = {Erwei Wang and
James J. Davis and
Georgios{-}Ilias Stavrou and
Peter Y. K. Cheung and
George A. Constantinides and
Mohamed S. Abdelfattah},
editor = {Michael Adler and
Paolo Ienne},
title = {Logic Shrinkage: Learned {FPGA} Netlist Sparsity for Efficient Neural
Network Inference},
booktitle = {{FPGA} '22: The 2022 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022},
pages = {101--111},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3490422.3502360},
doi = {10.1145/3490422.3502360},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/Wang0SCCA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ploscb/BinCCFLMMPSSS21,
author = {Michelangelo Bin and
Peter Y. K. Cheung and
Emanuele Crisostomi and
Pietro Ferraro and
Hugo Lhachemi and
Roderick Murray{-}Smith and
Connor Myant and
Thomas Parisini and
Robert Shorten and
Sebastian Stein and
Lewi Stone},
title = {Post-lockdown abatement of {COVID-19} by fast periodic switching},
journal = {PLoS Comput. Biol.},
volume = {17},
number = {1},
year = {2021},
url = {https://doi.org/10.1371/journal.pcbi.1008604},
doi = {10.1371/JOURNAL.PCBI.1008604},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ploscb/BinCCFLMMPSSS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/QueWMMNJBALSPCL21,
author = {Zhiqiang Que and
Erwei Wang and
Umar Marikar and
Eric A. Moreno and
Jennifer Ngadiuba and
Hamza Javed and
Bartlomiej Borzyszkowski and
Thea Aarrestad and
Vladimir Loncar and
Sioni Summers and
Maurizio Pierini and
Peter Y. K. Cheung and
Wayne Luk},
title = {Accelerating Recurrent Neural Networks for Gravitational Wave Experiments},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {117--124},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00025},
doi = {10.1109/ASAP52443.2021.00025},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/QueWMMNJBALSPCL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mobisys/Wang0MZLCCCC21,
author = {Erwei Wang and
James J. Davis and
Daniele Moro and
Piotr Zielinski and
Jia Jie Lim and
Claudionor Coelho and
Satrajit Chatterjee and
Peter Y. K. Cheung and
George A. Constantinides},
title = {Enabling Binary Neural Network Training on the Edge},
booktitle = {EMDL@MobiSys 2021: Proceedings of the 5th International Workshop on
Embedded and Mobile Deep Learning, Virtual Event, Wisconsin, USA,
June 25, 2021},
pages = {37--38},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3469116.3470015},
doi = {10.1145/3469116.3470015},
timestamp = {Tue, 10 Aug 2021 13:36:58 +0200},
biburl = {https://dblp.org/rec/conf/mobisys/Wang0MZLCCCC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2102-04270,
author = {Erwei Wang and
James J. Davis and
Daniele Moro and
Piotr Zielinski and
Claudionor Coelho and
Satrajit Chatterjee and
Peter Y. K. Cheung and
George A. Constantinides},
title = {Enabling Binary Neural Network Training on the Edge},
journal = {CoRR},
volume = {abs/2102.04270},
year = {2021},
url = {https://arxiv.org/abs/2102.04270},
eprinttype = {arXiv},
eprint = {2102.04270},
timestamp = {Wed, 10 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2102-04270.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2106-14089,
author = {Zhiqiang Que and
Erwei Wang and
Umar Marikar and
Eric A. Moreno and
Jennifer Ngadiuba and
Hamza Javed and
Bartlomiej Borzyszkowski and
Thea Aarrestad and
Vladimir Loncar and
Sioni Summers and
Maurizio Pierini and
Peter Y. K. Cheung and
Wayne Luk},
title = {Accelerating Recurrent Neural Networks for Gravitational Wave Experiments},
journal = {CoRR},
volume = {abs/2106.14089},
year = {2021},
url = {https://arxiv.org/abs/2106.14089},
eprinttype = {arXiv},
eprint = {2106.14089},
timestamp = {Thu, 29 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2106-14089.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2112-02346,
author = {Erwei Wang and
James J. Davis and
Georgios{-}Ilias Stavrou and
Peter Y. K. Cheung and
George A. Constantinides and
Mohamed S. Abdelfattah},
title = {Logic Shrinkage: Learned {FPGA} Netlist Sparsity for Efficient Neural
Network Inference},
journal = {CoRR},
volume = {abs/2112.02346},
year = {2021},
url = {https://arxiv.org/abs/2112.02346},
eprinttype = {arXiv},
eprint = {2112.02346},
timestamp = {Sat, 17 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2112-02346.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/WangDCC20,
author = {Erwei Wang and
James J. Davis and
Peter Y. K. Cheung and
George A. Constantinides},
title = {LUTNet: Learning {FPGA} Configurations for Highly Efficient Neural
Network Inference},
journal = {{IEEE} Trans. Computers},
volume = {69},
number = {12},
pages = {1795--1808},
year = {2020},
url = {https://doi.org/10.1109/TC.2020.2978817},
doi = {10.1109/TC.2020.2978817},
timestamp = {Thu, 11 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/WangDCC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2003-09930,
author = {Michelangelo Bin and
Peter Y. K. Cheung and
Emanuele Crisostomi and
Pietro Ferraro and
Connor Myant and
Thomas Parisini and
Robert Shorten},
title = {On Fast Multi-Shot Epidemic Interventions for Post Lock-Down Mitigation:
Implications for Simple Covid-19 Models},
journal = {CoRR},
volume = {abs/2003.09930},
year = {2020},
url = {https://arxiv.org/abs/2003.09930},
eprinttype = {arXiv},
eprint = {2003.09930},
timestamp = {Fri, 21 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2003-09930.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/csur/WangDZNNLCC19,
author = {Erwei Wang and
James J. Davis and
Ruizhe Zhao and
Ho{-}Cheung Ng and
Xinyu Niu and
Wayne Luk and
Peter Y. K. Cheung and
George A. Constantinides},
title = {Deep Neural Network Approximation for Custom Hardware: Where We've
Been, Where We're Going},
journal = {{ACM} Comput. Surv.},
volume = {52},
number = {2},
pages = {40:1--40:39},
year = {2019},
url = {https://doi.org/10.1145/3309551},
doi = {10.1145/3309551},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/csur/WangDZNNLCC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jrtip/LiuBC19,
author = {Jianxiong Liu and
Christos Bouganis and
Peter Y. K. Cheung},
title = {Context-based image acquisition from memory in digital systems},
journal = {J. Real Time Image Process.},
volume = {16},
number = {4},
pages = {1057--1076},
year = {2019},
url = {https://doi.org/10.1007/s11554-016-0591-1},
doi = {10.1007/S11554-016-0591-1},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jrtip/LiuBC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/WangDCC19,
author = {Erwei Wang and
James J. Davis and
Peter Y. K. Cheung and
George A. Constantinides},
title = {LUTNet: Rethinking Inference in {FPGA} Soft Logic},
booktitle = {27th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2019, San Diego, CA, USA, April 28 - May
1, 2019},
pages = {26--34},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FCCM.2019.00014},
doi = {10.1109/FCCM.2019.00014},
timestamp = {Sun, 19 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fccm/WangDCC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiWFTC19,
author = {Qiang Li and
Erwei Wang and
Shane T. Fleming and
David B. Thomas and
Peter Y. K. Cheung},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Accelerating Position-Aware Top-k ListNet for Ranking Under Custom
Precision Regimes},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {81--87},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00022},
doi = {10.1109/FPL.2019.00022},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LiWFTC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icfpt/ZhaoGGLWMCC019,
author = {Yiren Zhao and
Xitong Gao and
Xuan Guo and
Junyi Liu and
Erwei Wang and
Robert D. Mullins and
Peter Y. K. Cheung and
George A. Constantinides and
Cheng{-}Zhong Xu},
title = {Automatic Generation of Multi-Precision Multi-Arithmetic {CNN} Accelerators
for FPGAs},
booktitle = {International Conference on Field-Programmable Technology, {FPT} 2019,
Tianjin, China, December 9-13, 2019},
pages = {45--53},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ICFPT47387.2019.00014},
doi = {10.1109/ICFPT47387.2019.00014},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icfpt/ZhaoGGLWMCC019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1901-06955,
author = {Erwei Wang and
James J. Davis and
Ruizhe Zhao and
Ho{-}Cheung Ng and
Xinyu Niu and
Wayne Luk and
Peter Y. K. Cheung and
George A. Constantinides},
title = {Deep Neural Network Approximation for Custom Hardware: Where We've
Been, Where We're Going},
journal = {CoRR},
volume = {abs/1901.06955},
year = {2019},
url = {http://arxiv.org/abs/1901.06955},
eprinttype = {arXiv},
eprint = {1901.06955},
timestamp = {Sun, 19 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1901-06955.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1904-00938,
author = {Erwei Wang and
James J. Davis and
Peter Y. K. Cheung and
George A. Constantinides},
title = {LUTNet: Rethinking Inference in {FPGA} Soft Logic},
journal = {CoRR},
volume = {abs/1904.00938},
year = {2019},
url = {http://arxiv.org/abs/1904.00938},
eprinttype = {arXiv},
eprint = {1904.00938},
timestamp = {Sun, 19 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1904-00938.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1910-10075,
author = {Yiren Zhao and
Xitong Gao and
Xuan Guo and
Junyi Liu and
Erwei Wang and
Robert D. Mullins and
Peter Y. K. Cheung and
George A. Constantinides and
Cheng{-}Zhong Xu},
title = {Automatic Generation of Multi-precision Multi-arithmetic {CNN} Accelerators
for FPGAs},
journal = {CoRR},
volume = {abs/1910.10075},
year = {2019},
url = {http://arxiv.org/abs/1910.10075},
eprinttype = {arXiv},
eprint = {1910.10075},
timestamp = {Thu, 05 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1910-10075.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1910-12625,
author = {Erwei Wang and
James J. Davis and
Peter Y. K. Cheung and
George A. Constantinides},
title = {LUTNet: Learning {FPGA} Configurations for Highly Efficient Neural
Network Inference},
journal = {CoRR},
volume = {abs/1910.12625},
year = {2019},
url = {http://arxiv.org/abs/1910.12625},
eprinttype = {arXiv},
eprint = {1910.12625},
timestamp = {Sun, 19 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1910-12625.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcc/ChenCCK18,
author = {Bony H. K. Chen and
Paul Y. S. Cheung and
Peter Y. K. Cheung and
Yu{-}Kwong Kwok},
title = {CypherDB: {A} Novel Architecture for Outsourcing Secure Database Processing},
journal = {{IEEE} Trans. Cloud Comput.},
volume = {6},
number = {2},
pages = {372--386},
year = {2018},
url = {https://doi.org/10.1109/TCC.2015.2511730},
doi = {10.1109/TCC.2015.2511730},
timestamp = {Sun, 21 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcc/ChenCCK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/DavisHLSCC18,
author = {James J. Davis and
Eddie Hung and
Joshua M. Levine and
Edward A. Stott and
Peter Y. K. Cheung and
George A. Constantinides},
title = {KAPow: High-Accuracy, Low-Overhead Online Per-Module Power Estimation
for {FPGA} Designs},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {11},
number = {1},
pages = {2:1--2:22},
year = {2018},
url = {https://doi.org/10.1145/3129789},
doi = {10.1145/3129789},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/DavisHLSCC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/SuFLZTLC18,
author = {Jiang Su and
Julian Faraone and
Junyi Liu and
Yiren Zhao and
David B. Thomas and
Philip Heng Wai Leong and
Peter Y. K. Cheung},
editor = {Nikolaos S. Voros and
Michael H{\"{u}}bner and
Georgios Keramidas and
Diana Goehringer and
Christos P. Antonopoulos and
Pedro C. Diniz},
title = {Redundancy-Reduced MobileNet Acceleration on Reconfigurable Logic
for ImageNet Classification},
booktitle = {Applied Reconfigurable Computing. Architectures, Tools, and Applications
- 14th International Symposium, {ARC} 2018, Santorini, Greece, May
2-4, 2018, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10824},
pages = {16--28},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-319-78890-6\_2},
doi = {10.1007/978-3-319-78890-6\_2},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/SuFLZTLC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/SuFGBDTLC18,
author = {Jiang Su and
Nicholas J. Fraser and
Giulio Gambardella and
Michaela Blott and
Gianluca Durelli and
David B. Thomas and
Philip Heng Wai Leong and
Peter Y. K. Cheung},
editor = {Nikolaos S. Voros and
Michael H{\"{u}}bner and
Georgios Keramidas and
Diana Goehringer and
Christos P. Antonopoulos and
Pedro C. Diniz},
title = {Accuracy to Throughput Trade-Offs for Reduced Precision Neural Networks
on Reconfigurable Logic},
booktitle = {Applied Reconfigurable Computing. Architectures, Tools, and Applications
- 14th International Symposium, {ARC} 2018, Santorini, Greece, May
2-4, 2018, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10824},
pages = {29--42},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-319-78890-6\_3},
doi = {10.1007/978-3-319-78890-6\_3},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/SuFGBDTLC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhaoLNWDNWSCCL18,
author = {Ruizhe Zhao and
Shuanglong Liu and
Ho{-}Cheung Ng and
Erwei Wang and
James J. Davis and
Xinyu Niu and
Xiwei Wang and
Huifeng Shi and
George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
title = {Hardware Compilation of Deep Neural Networks: An Overview},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445088},
doi = {10.1109/ASAP.2018.8445088},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhaoLNWDNWSCCL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/WangDC18,
author = {Erwei Wang and
James J. Davis and
Peter Y. K. Cheung},
title = {A PYNQ-Based Framework for Rapid {CNN} Prototyping},
booktitle = {26th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2018, Boulder, CO, USA, April 29 - May
1, 2018},
pages = {223},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FCCM.2018.00057},
doi = {10.1109/FCCM.2018.00057},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/WangDC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/LiFTC18,
author = {Qiang Li and
Shane T. Fleming and
David B. Thomas and
Peter Y. K. Cheung},
title = {Accelerating Top-k ListNet Training for Ranking Using {FPGA}},
booktitle = {International Conference on Field-Programmable Technology, {FPT} 2018,
Naha, Okinawa, Japan, December 10-14, 2018},
pages = {242--245},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/FPT.2018.00044},
doi = {10.1109/FPT.2018.00044},
timestamp = {Fri, 23 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/LiFTC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iwocl/DavisLSHCC18,
author = {James J. Davis and
Joshua M. Levine and
Edward A. Stott and
Eddie Hung and
Peter Y. K. Cheung and
George A. Constantinides},
editor = {Simon McIntosh{-}Smith and
Ben Bergen},
title = {{KOCL:} Kernel-level Power Estimation for Arbitrary FPGA-SoC-accelerated
OpenCL Applications},
booktitle = {Proceedings of the International Workshop on OpenCL, {IWOCL} 2018,
Oxford, United Kingdom, May 14-16, 2018},
pages = {4:1},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3204919.3204923},
doi = {10.1145/3204919.3204923},
timestamp = {Mon, 21 Dec 2020 16:56:10 +0100},
biburl = {https://dblp.org/rec/conf/iwocl/DavisLSHCC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1807-10577,
author = {Jiang Su and
Nicholas J. Fraser and
Giulio Gambardella and
Michaela Blott and
Gianluca Durelli and
David B. Thomas and
Philip Heng Wai Leong and
Peter Y. K. Cheung},
title = {Accuracy to Throughput Trade-offs for Reduced Precision Neural Networks
on Reconfigurable Logic},
journal = {CoRR},
volume = {abs/1807.10577},
year = {2018},
url = {http://arxiv.org/abs/1807.10577},
eprinttype = {arXiv},
eprint = {1807.10577},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1807-10577.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/DavisLSHCC17,
author = {James J. Davis and
Joshua M. Levine and
Edward A. Stott and
Eddie Hung and
Peter Y. K. Cheung and
George A. Constantinides},
title = {{KOCL:} Power Self- Awareness for Arbitrary FPGA-SoC-Accelerated OpenCL
Applications},
journal = {{IEEE} Des. Test},
volume = {34},
number = {6},
pages = {36--45},
year = {2017},
url = {https://doi.org/10.1109/MDAT.2017.2750909},
doi = {10.1109/MDAT.2017.2750909},
timestamp = {Sun, 19 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/DavisLSHCC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DavisLSHCC17,
author = {James J. Davis and
Joshua M. Levine and
Edward A. Stott and
Eddie Hung and
Peter Y. K. Cheung and
George A. Constantinides},
editor = {Marco D. Santambrogio and
Diana G{\"{o}}hringer and
Dirk Stroobandt and
Nele Mentens and
Jari Nurmi},
title = {{STRIPE:} Signal selection for runtime power estimation},
booktitle = {27th International Conference on Field Programmable Logic and Applications,
{FPL} 2017, Ghent, Belgium, September 4-8, 2017},
pages = {1--8},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/FPL.2017.8056842},
doi = {10.23919/FPL.2017.8056842},
timestamp = {Sun, 19 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/DavisLSHCC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/SuLTC16,
author = {Jiang Su and
Jianxiong Liu and
David B. Thomas and
Peter Y. K. Cheung},
title = {Neural Network Based Reinforcement Learning Acceleration on {FPGA}
Platforms},
journal = {{SIGARCH} Comput. Archit. News},
volume = {44},
number = {4},
pages = {68--73},
year = {2016},
url = {https://doi.org/10.1145/3039902.3039915},
doi = {10.1145/3039902.3039915},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/SuLTC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/DavisC16,
author = {James J. Davis and
Peter Y. K. Cheung},
editor = {Vanderlei Bonato and
Christos Bouganis and
Marek Gorgon},
title = {Reduced-precision Algorithm-based Fault Tolerance for FPGA-implemented
Accelerators},
booktitle = {Applied Reconfigurable Computing - 12th International Symposium, {ARC}
2016, Mangaratiba, RJ, Brazil, March 22-24, 2016, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9625},
pages = {361--368},
publisher = {Springer},
year = {2016},
url = {https://doi.org/10.1007/978-3-319-30481-6\_31},
doi = {10.1007/978-3-319-30481-6\_31},
timestamp = {Sun, 19 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/DavisC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/SuTC16,
author = {Jiang Su and
David B. Thomas and
Peter Y. K. Cheung},
title = {Increasing Network Size and Training Throughput of {FPGA} Restricted
Boltzmann Machines Using Dropout},
booktitle = {24th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2016, Washington, DC, USA, May 1-3, 2016},
pages = {48--51},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/FCCM.2016.23},
doi = {10.1109/FCCM.2016.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/SuTC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/HungDLSCC16,
author = {Eddie Hung and
James J. Davis and
Joshua M. Levine and
Edward A. Stott and
Peter Y. K. Cheung and
George A. Constantinides},
title = {KAPow: {A} System Identification Approach to Online Per-Module Power
Estimation in {FPGA} Designs},
booktitle = {24th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2016, Washington, DC, USA, May 1-3, 2016},
pages = {56--63},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/FCCM.2016.25},
doi = {10.1109/FCCM.2016.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/HungDLSCC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DavisHLSCC16,
author = {James J. Davis and
Eddie Hung and
Joshua M. Levine and
Edward A. Stott and
Peter Y. K. Cheung and
George A. Constantinides},
editor = {Deming Chen and
Jonathan W. Greene},
title = {Knowledge is Power: Module-level Sensing for Runtime Optimisation
(Abstact Only)},
booktitle = {Proceedings of the 2016 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, Monterey, CA, USA, February 21-23, 2016},
pages = {276},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2847263.2847316},
doi = {10.1145/2847263.2847316},
timestamp = {Sun, 19 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/DavisHLSCC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/ChauNEMCL15,
author = {Thomas C. P. Chau and
Xinyu Niu and
Alison Eele and
Jan M. Maciejowski and
Peter Y. K. Cheung and
Wayne Luk},
title = {Mapping Adaptive Particle Filters to Heterogeneous Reconfigurable
Systems},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {7},
number = {4},
pages = {36:1--36:17},
year = {2015},
url = {https://doi.org/10.1145/2629469},
doi = {10.1145/2629469},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/ChauNEMCL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CheungLS15,
author = {Peter Y. K. Cheung and
Wayne Luk and
Cristina Silvano},
title = {Preface},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293746},
doi = {10.1109/FPL.2015.7293746},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/CheungLS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/ChenCCK15,
author = {Bony H. K. Chen and
Paul Y. S. Cheung and
Peter Y. K. Cheung and
Yu{-}Kwong Kwok},
title = {An efficient architecture for zero overhead data en-/decryption using
reconfigurable cryptographic engine},
booktitle = {2015 International Conference on Field Programmable Technology, {FPT}
2015, Queenstown, New Zealand, December 7-9, 2015},
pages = {248--251},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPT.2015.7393116},
doi = {10.1109/FPT.2015.7393116},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/ChenCCK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/BeanKC15,
author = {Andrew Bean and
Nachiket Kapre and
Peter Y. K. Cheung},
editor = {Michael H{\"{u}}bner and
Maya B. Gokhale and
Ren{\'{e}} Cumplido},
title = {{G-DMA:} improving memory access performance for hardware accelerated
sparse graph computation},
booktitle = {International Conference on ReConFigurable Computing and FPGAs, ReConFig
2015, Riviera Maya, Mexico, December 7-9, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ReConFig.2015.7393317},
doi = {10.1109/RECONFIG.2015.7393317},
timestamp = {Wed, 28 Apr 2021 16:06:54 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/BeanKC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/GuanWCCC14,
author = {Zhenyu Guan and
Justin S. J. Wong and
Sumanta Chaudhuri and
George A. Constantinides and
Peter Y. K. Cheung},
title = {Classification on variation maps: a new placement strategy to alleviate
process variation on {FPGA}},
journal = {{IEICE} Electron. Express},
volume = {11},
number = {3},
pages = {20130912},
year = {2014},
url = {https://doi.org/10.1587/elex.10.20130912},
doi = {10.1587/ELEX.10.20130912},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceee/GuanWCCC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/GuanWCCC14a,
author = {Zhenyu Guan and
Justin S. J. Wong and
Sumanta Chaudhuri and
George A. Constantinides and
Peter Y. K. Cheung},
title = {Mitigation of process variation effect in FPGAs with partial rerouting
method},
journal = {{IEICE} Electron. Express},
volume = {11},
number = {3},
pages = {20140011},
year = {2014},
url = {https://doi.org/10.1587/elex.11.20140011},
doi = {10.1587/ELEX.11.20140011},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceee/GuanWCCC14a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LiuBC14,
author = {Jianxiong Liu and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Image progressive acquisition for hardware systems},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--6},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.368},
doi = {10.7873/DATE.2014.368},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/LiuBC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/StottLCK14,
author = {Edward A. Stott and
Joshua M. Levine and
Peter Y. K. Cheung and
Nachiket Kapre},
title = {Timing Fault Detection in FPGA-Based Circuits},
booktitle = {22nd {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2014, Boston, MA, USA, May 11-13, 2014},
pages = {96--99},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/FCCM.2014.32},
doi = {10.1109/FCCM.2014.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/StottLCK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/DavisC14,
author = {James J. Davis and
Peter Y. K. Cheung},
title = {Reducing Overheads for Fault-Tolerant Datapaths with Dynamic Partial
Reconfiguration},
booktitle = {22nd {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2014, Boston, MA, USA, May 11-13, 2014},
pages = {103},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/FCCM.2014.36},
doi = {10.1109/FCCM.2014.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/DavisC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/ChauKTHSEMCCLCL14,
author = {Thomas C. P. Chau and
Maciej Kurek and
James Stanley Targett and
Jake Humphrey and
Georgios Skouroupathis and
Alison Eele and
Jan M. Maciejowski and
Benjamin Cope and
Kathryn Cobden and
Philip Heng Wai Leong and
Peter Y. K. Cheung and
Wayne Luk},
title = {SMCGen: Generating Reconfigurable Design for Sequential Monte Carlo
Applications},
booktitle = {22nd {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2014, Boston, MA, USA, May 11-13, 2014},
pages = {141--148},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/FCCM.2014.46},
doi = {10.1109/FCCM.2014.46},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/ChauKTHSEMCCLCL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LevineSC14,
author = {Joshua M. Levine and
Edward A. Stott and
Peter Y. K. Cheung},
editor = {Vaughn Betz and
George A. Constantinides},
title = {Dynamic voltage {\&} frequency scaling with online slack measurement},
booktitle = {The 2014 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} '14, Monterey, CA, {USA} - February 26 - 28, 2014},
pages = {65--74},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2554688.2554784},
doi = {10.1145/2554688.2554784},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LevineSC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DavisC14,
author = {James J. Davis and
Peter Y. K. Cheung},
title = {Achieving low-overhead fault tolerance for parallel accelerators with
dynamic partial reconfiguration},
booktitle = {24th International Conference on Field Programmable Logic and Applications,
{FPL} 2014, Munich, Germany, 2-4 September, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FPL.2014.6927447},
doi = {10.1109/FPL.2014.6927447},
timestamp = {Sun, 19 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/DavisC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/visapp/LiuBC14,
author = {Jianxiong Liu and
Christos Bouganis and
Peter Y. K. Cheung},
editor = {Sebastiano Battiato and
Jos{\'{e}} Braz},
title = {Kernel-based Adaptive Image Sampling},
booktitle = {{VISAPP} 2014 - Proceedings of the 9th International Conference on
Computer Vision Theory and Applications, Volume 1, Lisbon, Portugal,
5-8 January, 2014},
pages = {25--32},
publisher = {SciTePress},
year = {2014},
url = {https://doi.org/10.5220/0004653100250032},
doi = {10.5220/0004653100250032},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/visapp/LiuBC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/StottGLWC13,
author = {Edward A. Stott and
Zhenyu Guan and
Joshua M. Levine and
Justin S. J. Wong and
Peter Y. K. Cheung},
title = {Variation and Reliability in FPGAs},
journal = {{IEEE} Des. Test},
volume = {30},
number = {6},
pages = {50--59},
year = {2013},
url = {https://doi.org/10.1109/MDAT.2013.2266652},
doi = {10.1109/MDAT.2013.2266652},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/StottGLWC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/PowellBC13,
author = {Adam Powell and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung},
title = {High-level power and performance estimation of FPGA-based soft processors
and its application to design space exploration},
journal = {J. Syst. Archit.},
volume = {59},
number = {10-D},
pages = {1144--1156},
year = {2013},
url = {https://doi.org/10.1016/j.sysarc.2013.08.003},
doi = {10.1016/J.SYSARC.2013.08.003},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/PowellBC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/ChauTWLCCEM13,
author = {Thomas C. P. Chau and
James Stanley Targett and
Marlon Wijeyasinghe and
Wayne Luk and
Peter Y. K. Cheung and
Benjamin Cope and
Alison Eele and
Jan M. Maciejowski},
title = {Accelerating sequential Monte Carlo method for real-time air traffic
management},
journal = {{SIGARCH} Comput. Archit. News},
volume = {41},
number = {5},
pages = {35--40},
year = {2013},
url = {https://doi.org/10.1145/2641361.2641367},
doi = {10.1145/2641361.2641367},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/ChauTWLCCEM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/WongC13,
author = {Justin S. J. Wong and
Peter Y. K. Cheung},
title = {Timing Measurement Platform for Arbitrary Black-Box Circuits Based
on Transition Probability},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {12},
pages = {2307--2320},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2230280},
doi = {10.1109/TVLSI.2012.2230280},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/WongC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/ChauNELCM13,
author = {Thomas C. P. Chau and
Xinyu Niu and
Alison Eele and
Wayne Luk and
Peter Y. K. Cheung and
Jan M. Maciejowski},
editor = {Philip Brisk and
Jos{\'{e}} Gabriel F. Coutinho and
Pedro C. Diniz},
title = {Heterogeneous Reconfigurable System for Adaptive Particle Filters
in Real-Time Applications},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications -
9th International Symposium, {ARC} 2013, Los Angeles, CA, USA, March
25-27, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7806},
pages = {1--12},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-36812-7\_1},
doi = {10.1007/978-3-642-36812-7\_1},
timestamp = {Fri, 27 Mar 2020 08:54:48 +0100},
biburl = {https://dblp.org/rec/conf/arc/ChauNELCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GuanWCCC13,
author = {Zhenyu Guan and
Justin S. J. Wong and
Sumanta Chaudhuri and
George A. Constantinides and
Peter Y. K. Cheung},
title = {A variation-adaptive retiming method exploiting reconfigurability},
booktitle = {23rd International Conference on Field programmable Logic and Applications,
{FPL} 2013, Porto, Portugal, September 2-4, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPL.2013.6645577},
doi = {10.1109/FPL.2013.6645577},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GuanWCCC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LevineSCC13,
author = {Joshua M. Levine and
Edward A. Stott and
George A. Constantinides and
Peter Y. K. Cheung},
title = {{SMI:} Slack Measurement Insertion for online timing monitoring in
FPGAs},
booktitle = {23rd International Conference on Field programmable Logic and Applications,
{FPL} 2013, Porto, Portugal, September 2-4, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPL.2013.6645598},
doi = {10.1109/FPL.2013.6645598},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LevineSCC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/ChauKCTLTCL13,
author = {Thomas C. P. Chau and
Ka{-}Wai Kwok and
Gary C. T. Chow and
Kuen Hung Tsoi and
Kit{-}Hang Lee and
Zion Tse and
Peter Y. K. Cheung and
Wayne Luk},
title = {Acceleration of real-time Proximity Query for dynamic active constraints},
booktitle = {2013 International Conference on Field-Programmable Technology, {FPT}
2013, Kyoto, Japan, December 9-11, 2013},
pages = {206--213},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPT.2013.6718355},
doi = {10.1109/FPT.2013.6718355},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpt/ChauKCTLTCL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/GuanWCCC13,
author = {Zhenyu Guan and
Justin S. J. Wong and
Sumanta Chaudhuri and
George A. Constantinides and
Peter Y. K. Cheung},
title = {Exploiting stochastic delay variability on FPGAs with adaptive partial
rerouting},
booktitle = {2013 International Conference on Field-Programmable Technology, {FPT}
2013, Kyoto, Japan, December 9-11, 2013},
pages = {254--261},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPT.2013.6718362},
doi = {10.1109/FPT.2013.6718362},
timestamp = {Wed, 03 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/GuanWCCC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/DavisC13,
author = {James J. Davis and
Peter Y. K. Cheung},
title = {Datapath fault tolerance for parallel accelerators},
booktitle = {2013 International Conference on Field-Programmable Technology, {FPT}
2013, Kyoto, Japan, December 9-11, 2013},
pages = {366--369},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPT.2013.6718389},
doi = {10.1109/FPT.2013.6718389},
timestamp = {Sun, 19 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/DavisC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/globalsip/LiuBC13,
author = {Jianxiong Liu and
Christos Bouganis and
Peter Y. K. Cheung},
title = {Domain-specific progressive sampling of face images},
booktitle = {{IEEE} Global Conference on Signal and Information Processing, GlobalSIP
2013, Austin, TX, USA, December 3-5, 2013},
pages = {1021--1024},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/GlobalSIP.2013.6737067},
doi = {10.1109/GLOBALSIP.2013.6737067},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/globalsip/LiuBC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/ChauLC12,
author = {Thomas C. P. Chau and
Wayne Luk and
Peter Y. K. Cheung},
title = {Roberts: reconfigurable platform for benchmarking real-time systems},
journal = {{SIGARCH} Comput. Archit. News},
volume = {40},
number = {5},
pages = {10--15},
year = {2012},
url = {https://doi.org/10.1145/2460216.2460219},
doi = {10.1145/2460216.2460219},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/ChauLC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/LevineSCC12,
author = {Joshua M. Levine and
Edward A. Stott and
George A. Constantinides and
Peter Y. K. Cheung},
title = {Online Measurement of Timing in Circuits: For Health Monitoring and
Dynamic Voltage {\&} Frequency Scaling},
booktitle = {2012 {IEEE} 20th Annual International Symposium on Field-Programmable
Custom Computing Machines, {FCCM} 2012, 29 April - 1 May 2012, Toronto,
Ontario, Canada},
pages = {109--116},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/FCCM.2012.27},
doi = {10.1109/FCCM.2012.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/LevineSCC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GuanWCCC12,
author = {Zhenyu Guan and
Justin S. J. Wong and
Sumanta Chaudhuri and
George A. Constantinides and
Peter Y. K. Cheung},
editor = {Dirk Koch and
Satnam Singh and
Jim T{\o}rresen},
title = {A two-stage variation-aware placement method for {FPGAS} exploiting
variation maps classification},
booktitle = {22nd International Conference on Field Programmable Logic and Applications
(FPL), Oslo, Norway, August 29-31, 2012},
pages = {519--522},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/FPL.2012.6339269},
doi = {10.1109/FPL.2012.6339269},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GuanWCCC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChauLCEM12,
author = {Thomas C. P. Chau and
Wayne Luk and
Peter Y. K. Cheung and
Alison Eele and
Jan M. Maciejowski},
editor = {Dirk Koch and
Satnam Singh and
Jim T{\o}rresen},
title = {Adaptive Sequential Monte Carlo approach for real-time applications},
booktitle = {22nd International Conference on Field Programmable Logic and Applications
(FPL), Oslo, Norway, August 29-31, 2012},
pages = {527--530},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/FPL.2012.6339271},
doi = {10.1109/FPL.2012.6339271},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChauLCEM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PowellBC12,
author = {Adam Powell and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung},
editor = {Dirk Koch and
Satnam Singh and
Jim T{\o}rresen},
title = {Early performance estimation of image compression methods on soft
processors},
booktitle = {22nd International Conference on Field Programmable Logic and Applications
(FPL), Oslo, Norway, August 29-31, 2012},
pages = {587--590},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/FPL.2012.6339213},
doi = {10.1109/FPL.2012.6339213},
timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PowellBC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cj/LiuCMC11,
author = {Qiang Liu and
George A. Constantinides and
Konstantinos Masselos and
Peter Y. K. Cheung},
title = {Compiling C-like Languages to {FPGA} Hardware: Some Novel Approaches
Targeting Data Memory Organization},
journal = {Comput. J.},
volume = {54},
number = {1},
pages = {1--10},
year = {2011},
url = {https://doi.org/10.1093/comjnl/bxp020},
doi = {10.1093/COMJNL/BXP020},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cj/LiuCMC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/AngelopoulouBC11,
author = {Maria E. Angelopoulou and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung},
title = {Blur identification with assumption validation for sensor-based video
reconstruction and its implementation on field programmable gate array},
journal = {{IET} Comput. Digit. Tech.},
volume = {5},
number = {4},
pages = {271--286},
year = {2011},
url = {https://doi.org/10.1049/iet-cdt.2009.0053},
doi = {10.1049/IET-CDT.2009.0053},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/AngelopoulouBC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/thipeac/CopeCLH11,
author = {Ben Cope and
Peter Y. K. Cheung and
Wayne Luk and
Lee W. Howes},
title = {A Systematic Design Space Exploration Approach to Customising Multi-Processor
Architectures: Exemplified Using Graphics Processors},
journal = {Trans. High Perform. Embed. Archit. Compil.},
volume = {4},
pages = {63--83},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-24568-8\_4},
doi = {10.1007/978-3-642-24568-8\_4},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/thipeac/CopeCLH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tie/MakCLL11,
author = {Terrence S. T. Mak and
Peter Y. K. Cheung and
Kai{-}Pui Lam and
Wayne Luk},
title = {Adaptive Routing in Network-on-Chips Using a Dynamic-Programming Network},
journal = {{IEEE} Trans. Ind. Electron.},
volume = {58},
number = {8},
pages = {3701--3716},
year = {2011},
url = {https://doi.org/10.1109/TIE.2010.2081953},
doi = {10.1109/TIE.2010.2081953},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tie/MakCLL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/Cheung11,
author = {Peter Y. K. Cheung},
title = {Introduction to special section {FPGA} 2009},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {4},
number = {4},
pages = {31:1},
year = {2011},
url = {https://doi.org/10.1145/2068716.2068717},
doi = {10.1145/2068716.2068717},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/Cheung11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WongC11,
author = {Justin S. J. Wong and
Peter Y. K. Cheung},
editor = {John Wawrzynek and
Katherine Compton},
title = {Improved delay measurement method in {FPGA} based on transition probability},
booktitle = {Proceedings of the {ACM/SIGDA} 19th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2011, Monterey, California, USA,
February 27, March 1, 2011},
pages = {163--172},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/1950413.1950446},
doi = {10.1145/1950413.1950446},
timestamp = {Wed, 03 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/WongC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LevineSCC11,
author = {Joshua M. Levine and
Edward A. Stott and
George A. Constantinides and
Peter Y. K. Cheung},
editor = {John Wawrzynek and
Katherine Compton},
title = {Health monitoring of live circuits in FPGAs based on time delay measurement
(abstract only)},
booktitle = {Proceedings of the {ACM/SIGDA} 19th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2011, Monterey, California, USA,
February 27, March 1, 2011},
pages = {284},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/1950413.1950482},
doi = {10.1145/1950413.1950482},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LevineSCC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/StottC11,
author = {Edward A. Stott and
Peter Y. K. Cheung},
title = {Improving {FPGA} Reliability with Wear-Levelling},
booktitle = {International Conference on Field Programmable Logic and Applications,
{FPL} 2011, September 5-7, Chania, Crete, Greece},
pages = {323--328},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/FPL.2011.65},
doi = {10.1109/FPL.2011.65},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/StottC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/ChaudhuriWC11,
author = {Sumanta Chaudhuri and
Justin S. J. Wong and
Peter Y. K. Cheung},
editor = {Russell Tessier},
title = {Timing speculation in FPGAs: Probabilistic inference of data dependent
failure rates},
booktitle = {2011 International Conference on Field-Programmable Technology, {FPT}
2011, New Delhi, India, December 12-14, 2011},
pages = {1--8},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/FPT.2011.6132706},
doi = {10.1109/FPT.2011.6132706},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/ChaudhuriWC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/StottSC10,
author = {Edward A. Stott and
N. Pete Sedcole and
Peter Y. K. Cheung},
title = {Fault tolerance and reliability in field-programmable gate arrays},
journal = {{IET} Comput. Digit. Tech.},
volume = {4},
number = {3},
pages = {196--210},
year = {2010},
url = {https://doi.org/10.1049/iet-cdt.2009.0011},
doi = {10.1049/IET-CDT.2009.0011},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/StottSC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/BeckerJLCR10,
author = {Tobias Becker and
Peter Jamieson and
Wayne Luk and
Peter Y. K. Cheung and
Tero Rissa},
title = {Power Characterisation for Fine-Grain Reconfigurable Fabrics},
journal = {Int. J. Reconfigurable Comput.},
volume = {2010},
pages = {787405:1--787405:9},
year = {2010},
url = {https://doi.org/10.1155/2010/787405},
doi = {10.1155/2010/787405},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijrc/BeckerJLCR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/MakSCL10,
author = {Terrence S. T. Mak and
N. Pete Sedcole and
Peter Y. K. Cheung and
Wayne Luk},
title = {Wave-pipelined intra-chip signaling for on-FPGA communications},
journal = {Integr.},
volume = {43},
number = {2},
pages = {188--201},
year = {2010},
url = {https://doi.org/10.1016/j.vlsi.2010.01.002},
doi = {10.1016/J.VLSI.2010.01.002},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/MakSCL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/CopeCLH10,
author = {Ben Cope and
Peter Y. K. Cheung and
Wayne Luk and
Lee W. Howes},
title = {Performance Comparison of Graphics Processors to Reconfigurable Logic:
{A} Case Study},
journal = {{IEEE} Trans. Computers},
volume = {59},
number = {4},
pages = {433--448},
year = {2010},
url = {https://doi.org/10.1109/TC.2009.179},
doi = {10.1109/TC.2009.179},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/CopeCLH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SmithCC10,
author = {Alastair M. Smith and
George A. Constantinides and
Peter Y. K. Cheung},
title = {{FPGA} Architecture Optimization Using Geometric Programming},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {29},
number = {8},
pages = {1163--1176},
year = {2010},
url = {https://doi.org/10.1109/TCAD.2010.2049046},
doi = {10.1109/TCAD.2010.2049046},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SmithCC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/JamiesonBCLRP10,
author = {Peter Jamieson and
Tobias Becker and
Peter Y. K. Cheung and
Wayne Luk and
Tero Rissa and
Teemu Pitk{\"{a}}nen},
title = {Benchmarking and evaluating reconfigurable architectures targeting
the mobile domain},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {15},
number = {2},
pages = {14:1--14:24},
year = {2010},
url = {https://doi.org/10.1145/1698759.1698764},
doi = {10.1145/1698759.1698764},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/JamiesonBCLRP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/SmithCC10,
author = {Alastair M. Smith and
George A. Constantinides and
Peter Y. K. Cheung},
title = {An Automated Flow for Arithmetic Component Generation in Field-Programmable
Gate Arrays},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {3},
number = {3},
pages = {13:1--13:21},
year = {2010},
url = {https://doi.org/10.1145/1839480.1839483},
doi = {10.1145/1839480.1839483},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/SmithCC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/KahoulSCC10,
author = {Asma Kahoul and
Alastair M. Smith and
George A. Constantinides and
Peter Y. K. Cheung},
title = {Efficient Heterogeneous Architecture Floorplan Optimization using
Analytical Methods},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {4},
number = {1},
pages = {3:1--3:23},
year = {2010},
url = {https://doi.org/10.1145/1857927.1857930},
doi = {10.1145/1857927.1857930},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/KahoulSCC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/BouganisPC10,
author = {Christos{-}Savvas Bouganis and
Iosifina Pournara and
Peter Y. K. Cheung},
title = {Exploration of Heterogeneous FPGAs for Mapping Linear Projection Designs},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {3},
pages = {436--449},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2012510},
doi = {10.1109/TVLSI.2009.2012510},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/BouganisPC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/Cheung10,
author = {Peter Y. K. Cheung},
editor = {Phaophak Sirisuk and
Fearghal Morgan and
Tarek A. El{-}Ghazawi and
Hideharu Amano},
title = {Process Variability and Degradation: New Frontier for Reconfigurable},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, 6th
International Symposium, {ARC} 2010, Bangkok, Thailand, March 17-19,
2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5992},
pages = {2},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-12133-3\_2},
doi = {10.1007/978-3-642-12133-3\_2},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/arc/Cheung10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LopezSPLC10,
author = {Sebasti{\'{a}}n L{\'{o}}pez and
Roberto Sarmiento and
Philip G. Potter and
Wayne Luk and
Peter Y. K. Cheung},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {Exploration of hardware sharing for image encoders},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {1737--1742},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5457095},
doi = {10.1109/DATE.2010.5457095},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LopezSPLC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/BeckerLC10,
author = {Tobias Becker and
Wayne Luk and
Peter Y. K. Cheung},
editor = {Ron Sass and
Russell Tessier},
title = {Energy-Aware Optimisation for Run-Time Reconfiguration},
booktitle = {18th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2010, Charlotte, North Carolina, USA, 2-4
May 2010},
pages = {55--62},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/FCCM.2010.17},
doi = {10.1109/FCCM.2010.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/BeckerLC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/StottWSC10,
author = {Edward A. Stott and
Justin S. J. Wong and
N. Pete Sedcole and
Peter Y. K. Cheung},
editor = {Peter Y. K. Cheung and
John Wawrzynek},
title = {Degradation in FPGAs: measurement and modelling},
booktitle = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
February 21-23, 2010},
pages = {229--238},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1723112.1723152},
doi = {10.1145/1723112.1723152},
timestamp = {Wed, 03 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/StottWSC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/JonesPBC10,
author = {David Huw Jones and
Adam Powell and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung},
title = {{GPU} Versus {FPGA} for High Productivity Computing},
booktitle = {International Conference on Field Programmable Logic and Applications,
{FPL} 2010, August 31 2010 - September 2, 2010, Milano, Italy},
pages = {119--124},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/FPL.2010.32},
doi = {10.1109/FPL.2010.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/JonesPBC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/StottWC10,
author = {Edward A. Stott and
Justin S. J. Wong and
Peter Y. K. Cheung},
title = {Degradation Analysis and Mitigation in FPGAs},
booktitle = {International Conference on Field Programmable Logic and Applications,
{FPL} 2010, August 31 2010 - September 2, 2010, Milano, Italy},
pages = {428--433},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/FPL.2010.88},
doi = {10.1109/FPL.2010.88},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/StottWC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iconip/JonesPBC10,
author = {David Huw Jones and
Adam Powell and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung},
editor = {Kok Wai Wong and
B. Sumudu U. Mendis and
Abdesselam Bouzerdoum},
title = {A Salient Region Detector for {GPU} Using a Cellular Automata Architecture},
booktitle = {Neural Information Processing. Models and Applications - 17th International
Conference, {ICONIP} 2010, Sydney, Australia, November 22-25, 2010,
Proceedings, Part {II}},
series = {Lecture Notes in Computer Science},
volume = {6444},
pages = {501--508},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-17534-3\_62},
doi = {10.1007/978-3-642-17534-3\_62},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iconip/JonesPBC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/robio/WuKCD10,
author = {Yan Wu and
Polake Kuvinichkul and
Peter Y. K. Cheung and
Yiannis Demiris},
title = {Towards anthropomorphic robot Thereminist},
booktitle = {2010 {IEEE} International Conference on Robotics and Biomimetics,
{ROBIO} 2010, Tianjin, China, December 14-18, 2010},
pages = {235--240},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ROBIO.2010.5723333},
doi = {10.1109/ROBIO.2010.5723333},
timestamp = {Fri, 09 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/robio/WuKCD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpga/2010,
editor = {Peter Y. K. Cheung and
John Wawrzynek},
title = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
February 21-23, 2010},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1723112},
doi = {10.1145/1723112},
isbn = {978-1-60558-911-4},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/2010.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/LiuBC09,
author = {Yang Liu and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung},
title = {Hardware architectures for eigenvalue computation of real symmetric
matrices},
journal = {{IET} Comput. Digit. Tech.},
volume = {3},
number = {1},
pages = {72--84},
year = {2009},
url = {https://doi.org/10.1049/iet-cdt:20080008},
doi = {10.1049/IET-CDT:20080008},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/LiuBC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/LiuCMC09,
author = {Qiang Liu and
George A. Constantinides and
Konstantinos Masselos and
Peter Y. K. Cheung},
title = {Data-reuse exploration under an on-chip memory constraint for low-power
FPGA-based systems},
journal = {{IET} Comput. Digit. Tech.},
volume = {3},
number = {3},
pages = {235--246},
year = {2009},
url = {https://doi.org/10.1049/iet-cdt.2008.0039},
doi = {10.1049/IET-CDT.2008.0039},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/LiuCMC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/FahmyCL09,
author = {Suhaib A. Fahmy and
Peter Y. K. Cheung and
Wayne Luk},
title = {High-throughput one-dimensional median and weighted median filters
on {FPGA}},
journal = {{IET} Comput. Digit. Tech.},
volume = {3},
number = {4},
pages = {384--394},
year = {2009},
url = {https://doi.org/10.1049/iet-cdt.2008.0119},
doi = {10.1049/IET-CDT.2008.0119},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/FahmyCL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuCMC09,
author = {Qiang Liu and
George A. Constantinides and
Konstantinos Masselos and
Peter Y. K. Cheung},
title = {Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted
Hardware Compilation: {A} Geometric Programming Framework},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {28},
number = {3},
pages = {305--315},
year = {2009},
url = {https://doi.org/10.1109/TCAD.2009.2013541},
doi = {10.1109/TCAD.2009.2013541},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuCMC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ClarkeCC09,
author = {Jonathan A. Clarke and
George A. Constantinides and
Peter Y. K. Cheung},
title = {Word-length selection for power minimization via nonlinear optimization},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {14},
number = {3},
pages = {39:1--39:28},
year = {2009},
url = {https://doi.org/10.1145/1529255.1529261},
doi = {10.1145/1529255.1529261},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/ClarkeCC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/BouganisPCC09,
author = {Christos{-}Savvas Bouganis and
Sung{-}Boem Park and
George A. Constantinides and
Peter Y. K. Cheung},
title = {Synthesis and Optimization of 2D Filter Designs for Heterogeneous
FPGAs},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {1},
number = {4},
pages = {24:1--24:28},
year = {2009},
url = {https://doi.org/10.1145/1462586.1462593},
doi = {10.1145/1462586.1462593},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/BouganisPCC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/WongSC09,
author = {Justin S. J. Wong and
N. Pete Sedcole and
Peter Y. K. Cheung},
title = {Self-Measurement of Combinatorial Circuit Delays in FPGAs},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {2},
number = {2},
pages = {10:1--10:22},
year = {2009},
url = {https://doi.org/10.1145/1534916.1534920},
doi = {10.1145/1534916.1534920},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/WongSC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/AngelopoulouBCC09,
author = {Maria E. Angelopoulou and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung and
George A. Constantinides},
title = {Robust Real-Time Super-Resolution on {FPGA} and an Application to
Video Enhancement},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {2},
number = {4},
pages = {22:1--22:29},
year = {2009},
url = {https://doi.org/10.1145/1575779.1575782},
doi = {10.1145/1575779.1575782},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/AngelopoulouBCC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/BeckerLC09,
author = {Tobias Becker and
Wayne Luk and
Peter Y. K. Cheung},
editor = {J{\"{u}}rgen Becker and
Roger F. Woods and
Peter M. Athanas and
Fearghal Morgan},
title = {Parametric Design for Reconfigurable Software-Defined Radio},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, 5th
International Workshop, {ARC} 2009, Karlsruhe, Germany, March 16-18,
2009. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5453},
pages = {15--26},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-00641-8\_5},
doi = {10.1007/978-3-642-00641-8\_5},
timestamp = {Fri, 19 Jul 2019 13:02:47 +0200},
biburl = {https://dblp.org/rec/conf/arc/BeckerLC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/KahoulCSC09,
author = {Asma Kahoul and
George A. Constantinides and
Alastair M. Smith and
Peter Y. K. Cheung},
editor = {J{\"{u}}rgen Becker and
Roger F. Woods and
Peter M. Athanas and
Fearghal Morgan},
title = {Heterogeneous Architecture Exploration: Analysis vs. Parameter Sweep},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, 5th
International Workshop, {ARC} 2009, Karlsruhe, Germany, March 16-18,
2009. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5453},
pages = {133--144},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-00641-8\_15},
doi = {10.1007/978-3-642-00641-8\_15},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/KahoulCSC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/MakCLL09,
author = {Terrence S. T. Mak and
Peter Y. K. Cheung and
Wayne Luk and
Kai{-}Pui Lam},
editor = {Wolfgang Rosenstiel and
Kazutoshi Wakabayashi},
title = {A DP-network for optimal dynamic routing in network-on-chip},
booktitle = {Proceedings of the 7th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2009, Grenoble, France,
October 11-16, 2009},
pages = {119--128},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629435.1629452},
doi = {10.1145/1629435.1629452},
timestamp = {Mon, 26 Nov 2018 12:14:45 +0100},
biburl = {https://dblp.org/rec/conf/codes/MakCLL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PotterLC09,
author = {Philip G. Potter and
Wayne Luk and
Peter Y. K. Cheung},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Partition-based exploration for reconfigurable {JPEG} designs},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {886--889},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090788},
doi = {10.1109/DATE.2009.5090788},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/PotterLC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/JamiesonBLCRP09,
author = {Peter Jamieson and
Tobias Becker and
Wayne Luk and
Peter Y. K. Cheung and
Tero Rissa and
Teemu Pitk{\"{a}}nen},
editor = {Kenneth L. Pocek and
Duncan A. Buell},
title = {Benchmarking Reconfigurable Architectures in the Mobile Domain},
booktitle = {{FCCM} 2009, 17th {IEEE} Symposium on Field Programmable Custom Computing
Machines, Napa, California, USA, 5-7 April 2009, Proceedings},
pages = {131--138},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/FCCM.2009.13},
doi = {10.1109/FCCM.2009.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/JamiesonBLCRP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SmithCC09,
author = {Alastair M. Smith and
George A. Constantinides and
Peter Y. K. Cheung},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Area estimation and optimisation of {FPGA} routing fabrics},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {256--261},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272298},
doi = {10.1109/FPL.2009.5272298},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SmithCC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SedcoleSC09,
author = {N. Pete Sedcole and
Edward A. Stott and
Peter Y. K. Cheung},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Compensating for variability in FPGAs by re-mapping and re-placement},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {613--616},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272380},
doi = {10.1109/FPL.2009.5272380},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SedcoleSC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/SmithCWC09,
author = {Alastair M. Smith and
George A. Constantinides and
Steven J. E. Wilton and
Peter Y. K. Cheung},
editor = {Neil W. Bergmann and
Oliver Diessel and
Lesley Shannon},
title = {Concurrently optimizing {FPGA} architecture parameters and transistor
sizing: Implications for {FPGA} design},
booktitle = {Proceedings of the 2009 International Conference on Field-Programmable
Technology, {FPT} 2009, Sydney, Australia, December 9-11, 2009},
pages = {54--61},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/FPT.2009.5377647},
doi = {10.1109/FPT.2009.5377647},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/SmithCWC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/AngelopoulouBC09,
author = {Maria E. Angelopoulou and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung},
title = {A sensor-based approach to linear blur identification for real-time
video enhancement},
booktitle = {Proceedings of the International Conference on Image Processing, {ICIP}
2009, 7-10 November 2009, Cairo, Egypt},
pages = {141--144},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ICIP.2009.5414162},
doi = {10.1109/ICIP.2009.5414162},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icip/AngelopoulouBC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangMSC09,
author = {Li Wang and
Terrence S. T. Mak and
N. Pete Sedcole and
Peter Y. K. Cheung},
title = {Throughput Maximization for Wave-pipelined Interconnects using Cascaded
Buffers and Transistor Sizing},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
May 2009, Taipei, Taiwan},
pages = {1293--1296},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ISCAS.2009.5118000},
doi = {10.1109/ISCAS.2009.5118000},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WangMSC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpga/2009,
editor = {Paul Chow and
Peter Y. K. Cheung},
title = {Proceedings of the {ACM/SIGDA} 17th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2009, Monterey, California, USA,
February 22-24, 2009},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1508128},
doi = {10.1145/1508128},
isbn = {978-1-60558-410-2},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/2009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cj/CheungY08,
author = {Peter Y. K. Cheung and
Alexandre Yakovlev},
title = {Comments on the {BCS} Lecture "The Future of Computer Technology
and its Implications for the Computer Industry" by Professor
Steve Furber},
journal = {Comput. J.},
volume = {51},
number = {6},
pages = {741--742},
year = {2008},
url = {https://doi.org/10.1093/comjnl/bxn023},
doi = {10.1093/COMJNL/BXN023},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cj/CheungY08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jrtip/AngCLC08,
author = {Su{-}Shin Ang and
George A. Constantinides and
Wayne Luk and
Peter Y. K. Cheung},
title = {Custom parallel caching schemes for hardware-accelerated image compression},
journal = {J. Real Time Image Process.},
volume = {3},
number = {4},
pages = {289--302},
year = {2008},
url = {https://doi.org/10.1007/s11554-008-0082-0},
doi = {10.1007/S11554-008-0082-0},
timestamp = {Thu, 18 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jrtip/AngCLC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tmm/ArifinC08,
author = {Sutjipto Arifin and
Peter Y. K. Cheung},
title = {Affective Level Video Segmentation by Utilizing the Pleasure-Arousal-Dominance
Information},
journal = {{IEEE} Trans. Multim.},
volume = {10},
number = {7},
pages = {1325--1341},
year = {2008},
url = {https://doi.org/10.1109/TMM.2008.2004911},
doi = {10.1109/TMM.2008.2004911},
timestamp = {Thu, 01 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tmm/ArifinC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/SedcoleC08,
author = {N. Pete Sedcole and
Peter Y. K. Cheung},
title = {Parametric Yield Modeling and Simulations of {FPGA} Circuits Considering
Within-Die Delay Variations},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {1},
number = {2},
pages = {10:1--10:28},
year = {2008},
url = {https://doi.org/10.1145/1371579.1371582},
doi = {10.1145/1371579.1371582},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/SedcoleC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SmithCC08,
author = {Alastair M. Smith and
George A. Constantinides and
Peter Y. K. Cheung},
title = {Integrated Floorplanning, Module-Selection, and Architecture Generationfor
Reconfigurable Devices},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {16},
number = {6},
pages = {733--744},
year = {2008},
url = {https://doi.org/10.1109/TVLSI.2008.2000259},
doi = {10.1109/TVLSI.2008.2000259},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/SmithCC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/TurkingtonCMC08,
author = {Kieron Turkington and
Turkington A. Constantinides and
Kostas Masselos and
Peter Y. K. Cheung},
title = {Outer Loop Pipelining for Application Specific Datapaths in FPGAs},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {16},
number = {10},
pages = {1268--1280},
year = {2008},
url = {https://doi.org/10.1109/TVLSI.2008.2001744},
doi = {10.1109/TVLSI.2008.2001744},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/TurkingtonCMC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/AngelopoulouMCA08,
author = {Maria E. Angelopoulou and
Kostas Masselos and
Peter Y. K. Cheung and
Yiannis Andreopoulos},
title = {Implementation and Comparison of the 5/3 Lifting 2D Discrete Wavelet
Transform Computation Schedules on FPGAs},
journal = {J. Signal Process. Syst.},
volume = {51},
number = {1},
pages = {3--21},
year = {2008},
url = {https://doi.org/10.1007/s11265-007-0139-5},
doi = {10.1007/S11265-007-0139-5},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/AngelopoulouMCA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/AngelopoulouBCC08,
author = {Maria E. Angelopoulou and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung and
George A. Constantinides},
editor = {Roger F. Woods and
Katherine Compton and
Christos{-}Savvas Bouganis and
Pedro C. Diniz},
title = {FPGA-based Real-time Super-Resolution on an Adaptive Image Sensor},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, 4th
International Workshop, {ARC} 2008, London, UK, March 26-28, 2008.
Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4943},
pages = {124--135},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-78610-8\_14},
doi = {10.1007/978-3-540-78610-8\_14},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/AngelopoulouBCC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/bcs/LiuCMC08,
author = {Qiang Liu and
George A. Constantinides and
Konstantinos Masselos and
Peter Y. K. Cheung},
editor = {Erol Gelenbe and
Samson Abramsky and
Vladimiro Sassone},
title = {Compiling C-like Languages to {FPGA} Hardware: Some Novel Approaches
Targeting Data Memory Organisation},
booktitle = {Visions of Computer Science - {BCS} International Academic Conference,
Imperial College, London, UK, 22-24 September 2008},
pages = {295--304},
publisher = {British Computer Society},
year = {2008},
url = {http://www.bcs.org/server.php?show=ConWebDoc.22920},
timestamp = {Mon, 21 Sep 2009 12:13:42 +0200},
biburl = {https://dblp.org/rec/conf/bcs/LiuCMC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CopeCL08,
author = {Ben Cope and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Donatella Sciuto},
title = {Using Reconfigurable Logic to Optimise {GPU} Memory Accesses},
booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
March 10-14, 2008},
pages = {44--49},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1109/DATE.2008.4484658},
doi = {10.1109/DATE.2008.4484658},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/CopeCL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MakSCL08,
author = {Terrence S. T. Mak and
N. Pete Sedcole and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Mike Hutton and
Paul Chow},
title = {High-throughput interconnect wave-pipelining for global communication
in FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 16th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2008, Monterey, California, USA,
February 24-26, 2008},
pages = {258},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1344671.1344714},
doi = {10.1145/1344671.1344714},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/MakSCL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SedcoleWC08,
author = {N. Pete Sedcole and
Justin S. J. Wong and
Peter Y. K. Cheung},
editor = {Mike Hutton and
Paul Chow},
title = {Measuring and modeling {FPGA} clock variability},
booktitle = {Proceedings of the {ACM/SIGDA} 16th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2008, Monterey, California, USA,
February 24-26, 2008},
pages = {258},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1344671.1344713},
doi = {10.1145/1344671.1344713},
timestamp = {Wed, 03 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/SedcoleWC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiuCMC08,
author = {Qiang Liu and
George A. Constantinides and
Konstantinos Masselos and
Peter Y. K. Cheung},
title = {Combining data reuse exploitationwith data-level parallelization for
{FPGA} targeted hardware compilation: {A} geometric programming framework},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {179--184},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4629928},
doi = {10.1109/FPL.2008.4629928},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LiuCMC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/StottSC08,
author = {Edward A. Stott and
N. Pete Sedcole and
Peter Y. K. Cheung},
title = {Fault tolerant methods for reliability in FPGAs},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {415--420},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4629973},
doi = {10.1109/FPL.2008.4629973},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/StottSC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BeckerJLCR08,
author = {Tobias Becker and
Peter Jamieson and
Wayne Luk and
Peter Y. K. Cheung and
Tero Rissa},
title = {Towards benchmarking energy efficiency of reconfigurable architectures},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {691--694},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4630041},
doi = {10.1109/FPL.2008.4630041},
timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BeckerJLCR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WongCS08,
author = {Justin S. J. Wong and
Peter Y. K. Cheung and
N. Pete Sedcole},
title = {Combating process variation on {FPGAS} with a precise at-speed delay
measurement method},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {703--704},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4630046},
doi = {10.1109/FPL.2008.4630046},
timestamp = {Wed, 03 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WongCS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/TurkingtonCCM08,
author = {Kieron Turkington and
George A. Constantinides and
Peter Y. K. Cheung and
Konstantinos Masselos},
editor = {Tarek A. El{-}Ghazawi and
Yao{-}Wen Chang and
Juinn{-}Dar Huang and
Proshanta Saha},
title = {Co-optimisation of datapath and memory in outer loop pipelining},
booktitle = {2008 International Conference on Field-Programmable Technology, {FPT}
2008, Taipei, Taiwan, December 7-10, 2008},
pages = {1--8},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPT.2008.4762359},
doi = {10.1109/FPT.2008.4762359},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/TurkingtonCCM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/MakSCL08,
author = {Terrence S. T. Mak and
N. Pete Sedcole and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Tarek A. El{-}Ghazawi and
Yao{-}Wen Chang and
Juinn{-}Dar Huang and
Proshanta Saha},
title = {Wave-pipelined signaling for on-FPGA communication},
booktitle = {2008 International Conference on Field-Programmable Technology, {FPT}
2008, Taipei, Taiwan, December 7-10, 2008},
pages = {9--16},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPT.2008.4762360},
doi = {10.1109/FPT.2008.4762360},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/MakSCL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/WongSC08,
author = {Justin S. J. Wong and
N. Pete Sedcole and
Peter Y. K. Cheung},
editor = {Tarek A. El{-}Ghazawi and
Yao{-}Wen Chang and
Juinn{-}Dar Huang and
Proshanta Saha},
title = {A transition probability based delay measurement method for arbitrary
circuits on FPGAs},
booktitle = {2008 International Conference on Field-Programmable Technology, {FPT}
2008, Taipei, Taiwan, December 7-10, 2008},
pages = {105--112},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPT.2008.4762372},
doi = {10.1109/FPT.2008.4762372},
timestamp = {Wed, 03 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/WongSC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/SedcoleWC08,
author = {N. Pete Sedcole and
Justin S. J. Wong and
Peter Y. K. Cheung},
editor = {Tarek A. El{-}Ghazawi and
Yao{-}Wen Chang and
Juinn{-}Dar Huang and
Proshanta Saha},
title = {Modelling and compensating for clock skew variability in FPGAs},
booktitle = {2008 International Conference on Field-Programmable Technology, {FPT}
2008, Taipei, Taiwan, December 7-10, 2008},
pages = {217--224},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPT.2008.4762386},
doi = {10.1109/FPT.2008.4762386},
timestamp = {Wed, 03 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/SedcoleWC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/AngelopoulouBC08,
author = {Maria E. Angelopoulou and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung},
title = {Video enhancement on an adaptive image sensor},
booktitle = {Proceedings of the International Conference on Image Processing, {ICIP}
2008, October 12-15, 2008, San Diego, California, {USA}},
pages = {681--684},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICIP.2008.4711846},
doi = {10.1109/ICIP.2008.4711846},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icip/AngelopoulouBC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ClarkeCCS08,
author = {Jonathan A. Clarke and
George A. Constantinides and
Peter Y. K. Cheung and
Alastair M. Smith},
title = {Glitch-aware output switching activity from word-level statistics},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
pages = {1792--1795},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ISCAS.2008.4541787},
doi = {10.1109/ISCAS.2008.4541787},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ClarkeCCS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/SedcoleWC08,
author = {N. Pete Sedcole and
Justin S. J. Wong and
Peter Y. K. Cheung},
title = {Characterisation of {FPGA} Clock Variability},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2008, 7-9
April 2008, Montpellier, France},
pages = {322--328},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISVLSI.2008.48},
doi = {10.1109/ISVLSI.2008.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/SedcoleWC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/MakDSCYL08,
author = {Terrence S. T. Mak and
Crescenzo D'Alessandro and
N. Pete Sedcole and
Peter Y. K. Cheung and
Alexandre Yakovlev and
Wayne Luk},
title = {Implementation of Wave-Pipelined Interconnects in FPGAs},
booktitle = {Second International Symposium on Networks-on-Chips, {NOCS} 2008,
5-6 April 2008, Newcastle University, {UK.} Proceedings},
pages = {213--214},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.ieeecomputersociety.org/10.1109/NOCS.2008.32},
doi = {10.1109/NOCS.2008.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nocs/MakDSCYL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/CopeCL08,
author = {Ben Cope and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Walid A. Najjar and
Holger Blume},
title = {Systematic design space exploration for customisable multi-processor
architectures},
booktitle = {Proceedings of the 2008 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2008),
Samos, Greece, July 21-24, 2008},
pages = {57--64},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICSAMOS.2008.4664847},
doi = {10.1109/ICSAMOS.2008.4664847},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/CopeCL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/slip/MakSCL08,
author = {Terrence S. T. Mak and
N. Pete Sedcole and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Ion I. Mandoiu and
Andrew A. Kennings},
title = {Interconnection lengths and delays estimation for communication links
in FPGAs},
booktitle = {The Tenth International Workshop on System-Level Interconnect Prediction
{(SLIP} 2008), Newcastle, UK, April 5-8, 2008, Proceedings},
pages = {1--10},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1353610.1353612},
doi = {10.1145/1353610.1353612},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/slip/MakSCL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/slip/MakDSCYL08,
author = {Terrence S. T. Mak and
Crescenzo D'Alessandro and
N. Pete Sedcole and
Peter Y. K. Cheung and
Alexandre Yakovlev and
Wayne Luk},
editor = {Ion I. Mandoiu and
Andrew A. Kennings},
title = {Global interconnections in FPGAs: modeling and performance analysis},
booktitle = {The Tenth International Workshop on System-Level Interconnect Prediction
{(SLIP} 2008), Newcastle, UK, April 5-8, 2008, Proceedings},
pages = {51--58},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1353610.1353621},
doi = {10.1145/1353610.1353621},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/slip/MakDSCYL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/MorrisCC07,
author = {Gareth W. Morris and
George A. Constantinides and
Peter Y. K. Cheung},
title = {{ROM} to {DSP} block transfer for resource constrained synthesis},
journal = {{IET} Comput. Digit. Tech.},
volume = {1},
number = {1},
pages = {17--26},
year = {2007},
url = {https://doi.org/10.1049/iet-cdt:20060016},
doi = {10.1049/IET-CDT:20060016},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/MorrisCC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jrtip/FahmyBCL07,
author = {Suhaib A. Fahmy and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung and
Wayne Luk},
title = {Real-time hardware acceleration of the trace transform},
journal = {J. Real Time Image Process.},
volume = {2},
number = {4},
pages = {235--248},
year = {2007},
url = {https://doi.org/10.1007/s11554-007-0061-x},
doi = {10.1007/S11554-007-0061-X},
timestamp = {Thu, 18 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jrtip/FahmyBCL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SedcoleCCL07,
author = {N. Pete Sedcole and
Peter Y. K. Cheung and
George A. Constantinides and
Wayne Luk},
title = {Run-Time Integration of Reconfigurable Video Processing Systems},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {15},
number = {9},
pages = {1003--1016},
year = {2007},
url = {https://doi.org/10.1109/TVLSI.2007.902203},
doi = {10.1109/TVLSI.2007.902203},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/SedcoleCCL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CopeCL07,
author = {Ben Cope and
Peter Y. K. Cheung and
Wayne Luk},
title = {Bridging the Gap between FPGAs and Multi-Processor Architectures:
{A} Video Processing Perspective},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {308--313},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429998},
doi = {10.1109/ASAP.2007.4429998},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CopeCL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/BeckerLC07,
author = {Tobias Becker and
Wayne Luk and
Peter Y. K. Cheung},
editor = {Kenneth L. Pocek and
Duncan A. Buell},
title = {Enhancing Relocatability of Partial Bitstreams for Run-Time Reconfiguration},
booktitle = {{IEEE} Symposium on Field-Programmable Custom Computing Machines,
{FCCM} 2007, 23-25 April 2007, Napa, California, {USA}},
pages = {35--44},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/FCCM.2007.51},
doi = {10.1109/FCCM.2007.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/BeckerLC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/BouganisPC07,
author = {Christos{-}Savvas Bouganis and
Iosifina Pournara and
Peter Y. K. Cheung},
editor = {Kenneth L. Pocek and
Duncan A. Buell},
title = {Efficient Mapping of Dimensionality Reduction Designs onto Heterogeneous
FPGAs},
booktitle = {{IEEE} Symposium on Field-Programmable Custom Computing Machines,
{FCCM} 2007, 23-25 April 2007, Napa, California, {USA}},
pages = {141--150},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/FCCM.2007.50},
doi = {10.1109/FCCM.2007.50},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/BouganisPC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/LiuCMC07,
author = {Qiang Liu and
George A. Constantinides and
Konstantinos Masselos and
Peter Y. K. Cheung},
editor = {Kenneth L. Pocek and
Duncan A. Buell},
title = {Automatic On-chip Memory Minimization for Data Reuse},
booktitle = {{IEEE} Symposium on Field-Programmable Custom Computing Machines,
{FCCM} 2007, 23-25 April 2007, Napa, California, {USA}},
pages = {251--260},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/FCCM.2007.18},
doi = {10.1109/FCCM.2007.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/LiuCMC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/AngCLC07,
author = {Su{-}Shin Ang and
George A. Constantinides and
Wayne Luk and
Peter Y. K. Cheung},
editor = {Kenneth L. Pocek and
Duncan A. Buell},
title = {A Hybrid Memory Sub-system for Video Coding Applications},
booktitle = {{IEEE} Symposium on Field-Programmable Custom Computing Machines,
{FCCM} 2007, 23-25 April 2007, Napa, California, {USA}},
pages = {317--318},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/FCCM.2007.33},
doi = {10.1109/FCCM.2007.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/AngCLC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SedcoleC07,
author = {N. Pete Sedcole and
Peter Y. K. Cheung},
editor = {Andr{\'{e}} DeHon and
Mike Hutton},
title = {Parametric yield in FPGAs due to within-die delay variations: a quantitative
analysis},
booktitle = {Proceedings of the {ACM/SIGDA} 15th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2007, Monterey, California, USA,
February 18-20, 2007},
pages = {178--187},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1216919.1216949},
doi = {10.1145/1216919.1216949},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SedcoleC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ClarkeCC07,
author = {Jonathan A. Clarke and
George A. Constantinides and
Peter Y. K. Cheung},
editor = {Koen Bertels and
Walid A. Najjar and
Arjan J. van Genderen and
Stamatis Vassiliadis},
title = {On the feasibility of early routing capacitance estimation for FPGAs},
booktitle = {{FPL} 2007, International Conference on Field Programmable Logic and
Applications, Amsterdam, The Netherlands, 27-29 August 2007},
pages = {234--239},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/FPL.2007.4380653},
doi = {10.1109/FPL.2007.4380653},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ClarkeCC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiuBC07,
author = {Yang Liu and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung},
editor = {Koen Bertels and
Walid A. Najjar and
Arjan J. van Genderen and
Stamatis Vassiliadis},
title = {Efficient mapping of a Kalman filter into an {FPGA} using Taylor Expansion},
booktitle = {{FPL} 2007, International Conference on Field Programmable Logic and
Applications, Amsterdam, The Netherlands, 27-29 August 2007},
pages = {345--350},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/FPL.2007.4380670},
doi = {10.1109/FPL.2007.4380670},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LiuBC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/WongSC07,
author = {Justin S. J. Wong and
N. Pete Sedcole and
Peter Y. K. Cheung},
editor = {Hideharu Amano and
Andy Ye and
Takeshi Ikenaga},
title = {Self-characterization of Combinatorial Circuit Delays in FPGAs},
booktitle = {2007 International Conference on Field-Programmable Technology, {ICFPT}
2007, Kitakyushu, Japan, December 12-14, 2007},
pages = {17--23},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/FPT.2007.4439227},
doi = {10.1109/FPT.2007.4439227},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/WongSC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/SmithCC07,
author = {Alastair M. Smith and
George A. Constantinides and
Peter Y. K. Cheung},
editor = {Hideharu Amano and
Andy Ye and
Takeshi Ikenaga},
title = {Fused-Arithmetic Unit Generation for Reconfigurable Devices using
Common Subgraph Extraction},
booktitle = {2007 International Conference on Field-Programmable Technology, {ICFPT}
2007, Kitakyushu, Japan, December 12-14, 2007},
pages = {105--112},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/FPT.2007.4439238},
doi = {10.1109/FPT.2007.4439238},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/SmithCC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/ArifinC07,
author = {Sutjipto Arifin and
Peter Y. K. Cheung},
title = {A Novel Video Parsing Algorithm Utilizing the Pleasure-Arousal-Dominance
Emotional Information},
booktitle = {Proceedings of the International Conference on Image Processing, {ICIP}
2007, September 16-19, 2007, San Antonio, Texas, {USA}},
pages = {333--336},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICIP.2007.4379589},
doi = {10.1109/ICIP.2007.4379589},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icip/ArifinC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mm/ArifinC07,
author = {Sutjipto Arifin and
Peter Y. K. Cheung},
editor = {Rainer Lienhart and
Anand R. Prasad and
Alan Hanjalic and
Sunghyun Choi and
Brian P. Bailey and
Nicu Sebe},
title = {A computation method for video segmentation utilizing the pleasure-arousal-dominance
emotional information},
booktitle = {Proceedings of the 15th International Conference on Multimedia 2007,
Augsburg, Germany, September 24-29, 2007},
pages = {68--77},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1291233.1291251},
doi = {10.1145/1291233.1291251},
timestamp = {Thu, 04 Nov 2021 14:40:54 +0100},
biburl = {https://dblp.org/rec/conf/mm/ArifinC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/MakSCLL07,
author = {Terrence S. T. Mak and
N. Pete Sedcole and
Peter Y. K. Cheung and
Wayne Luk and
Kai{-}Pui Lam},
title = {A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing},
booktitle = {First International Symposium on Networks-on-Chips, {NOCS} 2007, 7-9
May 2007, Princeton, New Jersey, USA, Proceedings},
pages = {173--182},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NOCS.2007.2},
doi = {10.1109/NOCS.2007.2},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nocs/MakSCLL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/semco/ArifinC07,
author = {Sutjipto Arifin and
Peter Y. K. Cheung},
title = {A Novel Probabilistic Approach to Modeling the Pleasure-Arousal-Dominance
Content of the Video based on "Working Memory"},
booktitle = {Proceedings of the First {IEEE} International Conference on Semantic
Computing {(ICSC} 2007), September 17-19, 2007, Irvine, California,
{USA}},
pages = {147--154},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICSC.2007.22},
doi = {10.1109/ICSC.2007.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/semco/ArifinC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/CaffarenaCCCN06,
author = {Gabriel Caffarena and
George A. Constantinides and
Peter Y. K. Cheung and
Carlos Carreras and
Octavio Nieto{-}Taladriz},
title = {Optimal combined word-length allocation and architectural synthesis
of digital signal processing circuits},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {53-II},
number = {5},
pages = {339--343},
year = {2006},
url = {https://doi.org/10.1109/TCSII.2005.862175},
doi = {10.1109/TCSII.2005.862175},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/CaffarenaCCCN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/AngCCL06,
author = {Su{-}Shin Ang and
George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Koen Bertels and
Jo{\~{a}}o M. P. Cardoso and
Stamatis Vassiliadis},
title = {A Flexible Multi-port Caching Scheme for Reconfigurable Platforms},
booktitle = {Reconfigurable Computing: Architectures and Applications, Second International
Workshop, {ARC} 2006, Delft, The Netherlands, March 1-3, 2006, Revised
Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {3985},
pages = {205--216},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11802839\_29},
doi = {10.1007/11802839\_29},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/arc/AngCCL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ArifinC06,
author = {Sutjipto Arifin and
Peter Y. K. Cheung},
editor = {Georges G. E. Gielen},
title = {A novel FPGA-based implementation of time adaptive clustering for
logical story unit segmentation},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe:
Designers' Forum, {DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {227--232},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.243907},
doi = {10.1109/DATE.2006.243907},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ArifinC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LiuBCLM06,
author = {Yang Liu and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung and
Philip Heng Wai Leong and
Stephen J. Motley},
editor = {Georges G. E. Gielen},
title = {Hardware efficient architectures for Eigenvalue computation},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {953--958},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.243838},
doi = {10.1109/DATE.2006.243838},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/LiuBCLM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/SmithCC06,
author = {Alastair M. Smith and
George A. Constantinides and
Peter Y. K. Cheung},
title = {A Novel Hueristic and Provable Bounds for Reconfigurable Architecture
Design},
booktitle = {14th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2006), 24-26 April 2006, Napa, CA, USA, Proceedings},
pages = {275--276},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/FCCM.2006.11},
doi = {10.1109/FCCM.2006.11},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/SmithCC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CampregherCCV06,
author = {Nicola Campregher and
Peter Y. K. Cheung and
George A. Constantinides and
Milan Vasilko},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Yield enhancements of design-specific FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {93--100},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117215},
doi = {10.1145/1117201.1117215},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CampregherCCV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ArifinC06,
author = {Sutjipto Arifin and
Peter Y. K. Cheung},
title = {Towards Affective Level Video Applications: {A} Novel FPGA-Based Video
Arousal Content Modeling System},
booktitle = {Proceedings of the 2006 International Conference on Field Programmable
Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006},
pages = {1--4},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPL.2006.311297},
doi = {10.1109/FPL.2006.311297},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ArifinC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BouganisCZ06,
author = {Christos{-}Savvas Bouganis and
Peter Y. K. Cheung and
Zhaoping Li},
title = {FPGA-Accelerated Pre-Attentive Segmentation in Primary Visual Cortex},
booktitle = {Proceedings of the 2006 International Conference on Field Programmable
Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006},
pages = {1--6},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPL.2006.311214},
doi = {10.1109/FPL.2006.311214},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BouganisCZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CampregherCCV06,
author = {Nicola Campregher and
Peter Y. K. Cheung and
George A. Constantinides and
Milan Vasilko},
title = {Reconfiguration and Fine-Grained Redundancy for Fault Tolerance in
FPGAs},
booktitle = {Proceedings of the 2006 International Conference on Field Programmable
Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006},
pages = {1--6},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPL.2006.311251},
doi = {10.1109/FPL.2006.311251},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/CampregherCCV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FahmyBCL06,
author = {Suhaib A. Fahmy and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung and
Wayne Luk},
title = {Efficient Realtime {FPGA} Implementation of the Trace Transform},
booktitle = {Proceedings of the 2006 International Conference on Field Programmable
Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006},
pages = {1--6},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPL.2006.311266},
doi = {10.1109/FPL.2006.311266},
timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/FahmyBCL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MakSCL06,
author = {Terrence S. T. Mak and
N. Pete Sedcole and
Peter Y. K. Cheung and
Wayne Luk},
title = {On-FPGA Communication Architectures and Design Factors},
booktitle = {Proceedings of the 2006 International Conference on Field Programmable
Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006},
pages = {1--8},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPL.2006.311209},
doi = {10.1109/FPL.2006.311209},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MakSCL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SmithCC06,
author = {Alastair M. Smith and
George A. Constantinides and
Peter Y. K. Cheung},
title = {A Novel Heuristic and Provable Bounds for Reconfigurable Architecture
Design},
booktitle = {Proceedings of the 2006 International Conference on Field Programmable
Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006},
pages = {1--6},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPL.2006.311261},
doi = {10.1109/FPL.2006.311261},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SmithCC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/SedcoleC06,
author = {N. Pete Sedcole and
Peter Y. K. Cheung},
editor = {George A. Constantinides and
Wai{-}Kei Mak and
Phaophak Sirisuk and
Theerayod Wiangtong},
title = {Within-die delay variability in 90nm FPGAs and beyond},
booktitle = {2006 {IEEE} International Conference on Field Programmable Technology,
{FPT} 2006, Bangkok, Thailand, December 13-15, 2006},
pages = {97--104},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPT.2006.270300},
doi = {10.1109/FPT.2006.270300},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/SedcoleC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/AngelopoulouMCA06,
author = {Maria E. Angelopoulou and
Konstantinos Masselos and
Peter Y. K. Cheung and
Yiannis Andreopoulos},
editor = {George A. Constantinides and
Wai{-}Kei Mak and
Phaophak Sirisuk and
Theerayod Wiangtong},
title = {A comparison of 2-D discrete wavelet transform computation schedules
on FPGAs},
booktitle = {2006 {IEEE} International Conference on Field Programmable Technology,
{FPT} 2006, Bangkok, Thailand, December 13-15, 2006},
pages = {181--188},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPT.2006.270310},
doi = {10.1109/FPT.2006.270310},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/AngelopoulouMCA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/AngCLC06,
author = {Su{-}Shin Ang and
George A. Constantinides and
Wayne Luk and
Peter Y. K. Cheung},
editor = {George A. Constantinides and
Wai{-}Kei Mak and
Phaophak Sirisuk and
Theerayod Wiangtong},
title = {The cost of data dependence in motion vector estimation for reconfigurable
platforms},
booktitle = {2006 {IEEE} International Conference on Field Programmable Technology,
{FPT} 2006, Bangkok, Thailand, December 13-15, 2006},
pages = {333--336},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPT.2006.270341},
doi = {10.1109/FPT.2006.270341},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/AngCLC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/BouganisPC06,
author = {Christos{-}Savvas Bouganis and
Iosifina Pournara and
Peter Y. K. Cheung},
editor = {George A. Constantinides and
Wai{-}Kei Mak and
Phaophak Sirisuk and
Theerayod Wiangtong},
title = {A statistical framework for dimensionality reduction implementation
in FPGAs},
booktitle = {2006 {IEEE} International Conference on Field Programmable Technology,
{FPT} 2006, Bangkok, Thailand, December 13-15, 2006},
pages = {365--368},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPT.2006.270349},
doi = {10.1109/FPT.2006.270349},
timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/BouganisPC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/ArifinC06,
author = {Sutjipto Arifin and
Peter Y. K. Cheung},
title = {User Attention Based Arousal Content Modeling},
booktitle = {Proceedings of the International Conference on Image Processing, {ICIP}
2006, October 8-11, Atlanta, Georgia, {USA}},
pages = {433--436},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ICIP.2006.312450},
doi = {10.1109/ICIP.2006.312450},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icip/ArifinC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/LiuBC06,
author = {Yang Liu and
Christos{-}Savvas Bouganis and
Peter Y. K. Cheung},
title = {A Spatiotemporal Saliency Framework},
booktitle = {Proceedings of the International Conference on Image Processing, {ICIP}
2006, October 8-11, Atlanta, Georgia, {USA}},
pages = {437--440},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ICIP.2006.312447},
doi = {10.1109/ICIP.2006.312447},
timestamp = {Sun, 04 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icip/LiuBC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ClarkeGCC06,
author = {Jonathan A. Clarke and
Altaf Abdul Gaffar and
George A. Constantinides and
Peter Y. K. Cheung},
title = {Fast word-level power models for synthesis of FPGA-based arithmetic},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
May 2006, Island of Kos, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISCAS.2006.1692831},
doi = {10.1109/ISCAS.2006.1692831},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ClarkeGCC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/SedcoleCCL06,
author = {N. Pete Sedcole and
Peter Y. K. Cheung and
George A. Constantinides and
Wayne Luk},
editor = {Georgi Gaydadjiev and
C. John Glossner and
Jarmo Takala and
Stamatis Vassiliadis},
title = {On-Chip Communication in Run-Time Assembled Reconfigurable Systems},
booktitle = {Proceedings of 2006 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2006),
Samos, Greece, July 17-20, 2006},
pages = {168--176},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ICSAMOS.2006.300824},
doi = {10.1109/ICSAMOS.2006.300824},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/SedcoleCCL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/spm/WiangtongCL05,
author = {Theerayod Wiangtong and
Peter Y. K. Cheung and
Wayne Luk},
title = {Hardware/software codesign: a systematic approach targeting data-intensive
applications},
journal = {{IEEE} Signal Process. Mag.},
volume = {22},
number = {3},
pages = {14--22},
year = {2005},
url = {https://doi.org/10.1109/MSP.2005.1425894},
doi = {10.1109/MSP.2005.1425894},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/spm/WiangtongCL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ConstantinidesCL05,
author = {George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
title = {Optimum and heuristic synthesis of multiple word-length architectures},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {13},
number = {1},
pages = {39--57},
year = {2005},
url = {https://doi.org/10.1109/TVLSI.2004.840398},
doi = {10.1109/TVLSI.2004.840398},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ConstantinidesCL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/CheungTLC05,
author = {Ray C. C. Cheung and
N. J. Telle and
Wayne Luk and
Peter Y. K. Cheung},
title = {Customizable elliptic curve cryptosystems},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {13},
number = {9},
pages = {1048--1059},
year = {2005},
url = {https://doi.org/10.1109/TVLSI.2005.857179},
doi = {10.1109/TVLSI.2005.857179},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/CheungTLC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CheungLMLC05,
author = {Ray C. C. Cheung and
Dong{-}U Lee and
Oskar Mencer and
Wayne Luk and
Peter Y. K. Cheung},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Automating custom-precision function evaluation for embedded processors},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {22--31},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086302},
doi = {10.1145/1086297.1086302},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/CheungLMLC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/FahmyCL05,
author = {Suhaib A. Fahmy and
Peter Y. K. Cheung and
Wayne Luk},
title = {Hardware Acceleration of Hidden Markov Model Decoding for Person Detection},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {8--13},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.169},
doi = {10.1109/DATE.2005.169},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/FahmyCL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CheungLC05,
author = {Ray C. C. Cheung and
Wayne Luk and
Peter Y. K. Cheung},
title = {Reconfigurable Elliptic Curve Cryptosystems on a Chip},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {24--29},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.254},
doi = {10.1109/DATE.2005.254},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/CheungLC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ersa/MelisTWLCM05,
author = {Wim J. C. Melis and
Kieron Turkington and
Alexander Whitton and
Wayne Luk and
Peter Y. K. Cheung and
Paul Metzgen},
editor = {Toomas P. Plaks},
title = {Cell Based Motion Estimators for Reconfigurable Platforms},
booktitle = {Proceedings of The 2005 International Conference on Engineering of
Reconfigurable Systems and Algorithms, {ERSA} 2005, Las Vegas, Nevada,
USA, June 27-30, 2005},
pages = {218--224},
publisher = {{CSREA} Press},
year = {2005},
timestamp = {Tue, 07 Feb 2006 13:12:06 +0100},
biburl = {https://dblp.org/rec/conf/ersa/MelisTWLCM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/BouganisCC05,
author = {Christos{-}Savvas Bouganis and
George A. Constantinides and
Peter Y. K. Cheung},
title = {A Novel 2D Filter Design Methodology for Heterogeneous Devices},
booktitle = {13th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2005), 17-20 April 2005, Napa, CA, USA, Proceedings},
pages = {13--22},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/FCCM.2005.10},
doi = {10.1109/FCCM.2005.10},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/BouganisCC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CampregherCCV05,
author = {Nicola Campregher and
Peter Y. K. Cheung and
George A. Constantinides and
Milan Vasilko},
editor = {Herman Schmit and
Steven J. E. Wilton},
title = {Analysis of yield loss due to random photolithographic defects in
the interconnect structure of FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 13th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2005, Monterey, California, USA,
February 20-22, 2005},
pages = {138--148},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1046192.1046211},
doi = {10.1145/1046192.1046211},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CampregherCCV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SmithCC05,
author = {Alastair M. Smith and
George A. Constantinides and
Peter Y. K. Cheung},
editor = {Herman Schmit and
Steven J. E. Wilton},
title = {Exploration of heterogeneous reconfigurable architectures (abstract
only)},
booktitle = {Proceedings of the {ACM/SIGDA} 13th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2005, Monterey, California, USA,
February 20-22, 2005},
pages = {268},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1046192.1046241},
doi = {10.1145/1046192.1046241},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SmithCC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MorrisCC05,
author = {Gareth W. Morris and
George A. Constantinides and
Peter Y. K. Cheung},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {Using {DSP} Blocks For {ROM} Replacement: {A} Novel Synthesis Flow},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {77--82},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515702},
doi = {10.1109/FPL.2005.1515702},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MorrisCC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SidahaoCC05,
author = {Nalin Sidahao and
George A. Constantinides and
Peter Y. K. Cheung},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {Power and Area Optimization for Multiple Restricted Multiplication},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {112--117},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515708},
doi = {10.1109/FPL.2005.1515708},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SidahaoCC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/EweCC05,
author = {Chun Te Ewe and
Peter Y. K. Cheung and
George A. Constantinides},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {Error Modelling of Dual FiXed-point Arithmetic and its Application
in Field Programmable Logic},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {124--129},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515710},
doi = {10.1109/FPL.2005.1515710},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/EweCC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FahmyCL05,
author = {Suhaib A. Fahmy and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {Novel FPGA-Based Implementation of Median and Weighted Median Filters
for Image Processing},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {142--147},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515713},
doi = {10.1109/FPL.2005.1515713},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/FahmyCL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BouganisCC05,
author = {Christos{-}Savvas Bouganis and
Peter Y. K. Cheung and
George A. Constantinides},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {Heterogeneity Exploration for Multiple 2D Filter Designs},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {263--268},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515732},
doi = {10.1109/FPL.2005.1515732},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BouganisCC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SmithCC05,
author = {Alastair M. Smith and
George A. Constantinides and
Peter Y. K. Cheung},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {An Analytical Approach to Generation and Exploration of Reconfigurable
Architectures},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {341--346},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515745},
doi = {10.1109/FPL.2005.1515745},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SmithCC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CampregherCCV05,
author = {Nicola Campregher and
Peter Y. K. Cheung and
George A. Constantinides and
Milan Vasilko},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {Yield modelling and Yield Enhancement for FPGAs using Fault Tolerance
Schemes},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {409--414},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515756},
doi = {10.1109/FPL.2005.1515756},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/CampregherCCV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/CopeCLW05,
author = {Ben Cope and
Peter Y. K. Cheung and
Wayne Luk and
Sarah Witt},
editor = {Gordon J. Brebner and
Samarjit Chakraborty and
Weng{-}Fai Wong},
title = {Have GPUs Made FPGAs Redundant in the Field of Video Processing?},
booktitle = {Proceedings of the 2005 {IEEE} International Conference on Field-Programmable
Technology, {FPT} 2005, 11-14 December 2005, Singapore},
pages = {111--118},
publisher = {{IEEE}},
year = {2005},
timestamp = {Tue, 19 Jun 2018 20:15:46 +0200},
biburl = {https://dblp.org/rec/conf/fpt/CopeCLW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/HeyCG05,
author = {Laurence A. Hey and
Peter Y. K. Cheung and
Michael Gellman},
editor = {Gordon J. Brebner and
Samarjit Chakraborty and
Weng{-}Fai Wong},
title = {{FPGA} Based Router for Cognitive Packet Networks},
booktitle = {Proceedings of the 2005 {IEEE} International Conference on Field-Programmable
Technology, {FPT} 2005, 11-14 December 2005, Singapore},
pages = {331--332},
publisher = {{IEEE}},
year = {2005},
timestamp = {Wed, 22 Feb 2006 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpt/HeyCG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BouganisCC05,
author = {Christos{-}Savvas Bouganis and
George A. Constantinides and
Peter Y. K. Cheung},
title = {A novel 2D filter design methodology},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {532--535},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1464642},
doi = {10.1109/ISCAS.2005.1464642},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BouganisCC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SidahaoCC05,
author = {Nalin Sidahao and
George A. Constantinides and
Peter Y. K. Cheung},
title = {A heuristic approach for multiple restricted multiplication},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {692--695},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1464682},
doi = {10.1109/ISCAS.2005.1464682},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SidahaoCC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0010656,
author = {George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
title = {Synthesis and optimization of {DSP} algorithms},
publisher = {Kluwer},
year = {2004},
isbn = {978-1-4020-7930-6},
timestamp = {Thu, 07 Apr 2011 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/daglib/0010656.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/CheungCS04,
author = {Peter Y. K. Cheung and
George A. Constantinides and
Jos{\'{e}} T. de Sousa},
title = {Guest Editors' Introduction: Field Programmable Logic and Applications},
journal = {{IEEE} Trans. Computers},
volume = {53},
number = {11},
pages = {1361--1362},
year = {2004},
url = {https://doi.org/10.1109/TC.2004.97},
doi = {10.1109/TC.2004.97},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/CheungCS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LeeLVC04,
author = {Dong{-}U Lee and
Wayne Luk and
John D. Villasenor and
Peter Y. K. Cheung},
title = {A Gaussian Noise Generator for Hardware-Based Simulations},
journal = {{IEEE} Trans. Computers},
volume = {53},
number = {12},
pages = {1523--1534},
year = {2004},
url = {https://doi.org/10.1109/TC.2004.106},
doi = {10.1109/TC.2004.106},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LeeLVC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HettiaratchiC04,
author = {Sambuddhi Hettiaratchi and
Peter Y. K. Cheung},
title = {A Novel Implementation of Tile-Based Address Mapping},
booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2004), 16-20 February 2004, Paris, France},
pages = {306--311},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DATE.2004.1268865},
doi = {10.1109/DATE.2004.1268865},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HettiaratchiC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ersa/RissaLC04,
author = {Tero Rissa and
Wayne Luk and
Peter Y. K. Cheung},
editor = {Toomas P. Plaks},
title = {Distinguished Paper: Automated Combination of Simulation and Hardware
Prototyping},
booktitle = {Proceedings of the International Conference on Engineering of Reconfigurable
Systems and Algorithms, ERSA'04, June 21-24, 2004, Las Vegas, Nevada,
{USA}},
pages = {184--193},
publisher = {{CSREA} Press},
year = {2004},
timestamp = {Fri, 19 Nov 2004 09:19:54 +0100},
biburl = {https://dblp.org/rec/conf/ersa/RissaLC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/GaffarMLC04,
author = {Altaf Abdul Gaffar and
Oskar Mencer and
Wayne Luk and
Peter Y. K. Cheung},
title = {Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point
Designs},
booktitle = {12th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2004), 20-23 April 2004, Napa, CA, USA, Proceedings},
pages = {79--88},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/FCCM.2004.59},
doi = {10.1109/FCCM.2004.59},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/GaffarMLC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/SedcoleCCL04,
author = {N. Pete Sedcole and
Peter Y. K. Cheung and
George A. Constantinides and
Wayne Luk},
title = {A Structured System Methodology for {FPGA} Based System-on-A-Chip
Design},
booktitle = {12th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2004), 20-23 April 2004, Napa, CA, USA, Proceedings},
pages = {271--272},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/FCCM.2004.10},
doi = {10.1109/FCCM.2004.10},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/SedcoleCCL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/MorrisCC04,
author = {Gareth W. Morris and
George A. Constantinides and
Peter Y. K. Cheung},
title = {Migrating Functionality from {ROMS} to Embedded Multipliers},
booktitle = {12th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2004), 20-23 April 2004, Napa, CA, USA, Proceedings},
pages = {287--288},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/FCCM.2004.43},
doi = {10.1109/FCCM.2004.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/MorrisCC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RissaCL04,
author = {Tero Rissa and
Peter Y. K. Cheung and
Wayne Luk},
editor = {J{\"{u}}rgen Becker and
Marco Platzner and
Serge Vernalde},
title = {SoftSONIC: {A} Customisable Modular Platform for Video Applications},
booktitle = {Field Programmable Logic and Application, 14th International Conference
, {FPL} 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3203},
pages = {54--63},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30117-2\_8},
doi = {10.1007/978-3-540-30117-2\_8},
timestamp = {Fri, 19 Jul 2019 13:02:47 +0200},
biburl = {https://dblp.org/rec/conf/fpl/RissaCL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/EweCC04,
author = {Chun Te Ewe and
Peter Y. K. Cheung and
George A. Constantinides},
editor = {J{\"{u}}rgen Becker and
Marco Platzner and
Serge Vernalde},
title = {Dual Fixed-Point: An Efficient Alternative to Floating-Point Computation},
booktitle = {Field Programmable Logic and Application, 14th International Conference
, {FPL} 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3203},
pages = {200--208},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30117-2\_22},
doi = {10.1007/978-3-540-30117-2\_22},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/EweCC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CampregherCV04,
author = {Nicola Campregher and
Peter Y. K. Cheung and
Milan Vasilko},
editor = {J{\"{u}}rgen Becker and
Marco Platzner and
Serge Vernalde},
title = {{BIST} Based Interconnect Fault Location for FPGAs},
booktitle = {Field Programmable Logic and Application, 14th International Conference
, {FPL} 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3203},
pages = {322--332},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30117-2\_34},
doi = {10.1007/978-3-540-30117-2\_34},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/CampregherCV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SidahaoCC04,
author = {Nalin Sidahao and
George A. Constantinides and
Peter Y. K. Cheung},
editor = {J{\"{u}}rgen Becker and
Marco Platzner and
Serge Vernalde},
title = {Multiple Restricted Multiplication},
booktitle = {Field Programmable Logic and Application, 14th International Conference
, {FPL} 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3203},
pages = {374--383},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30117-2\_39},
doi = {10.1007/978-3-540-30117-2\_39},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SidahaoCC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BouganisCNB04,
author = {Christos{-}Savvas Bouganis and
Peter Y. K. Cheung and
Jeffrey Ng and
Anil A. Bharath},
editor = {J{\"{u}}rgen Becker and
Marco Platzner and
Serge Vernalde},
title = {A Steerable Complex Wavelet Construction and Its Implementation on
{FPGA}},
booktitle = {Field Programmable Logic and Application, 14th International Conference
, {FPL} 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3203},
pages = {394--403},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30117-2\_41},
doi = {10.1007/978-3-540-30117-2\_41},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BouganisCNB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SedcoleCCL04,
author = {N. Pete Sedcole and
Peter Y. K. Cheung and
George A. Constantinides and
Wayne Luk},
editor = {J{\"{u}}rgen Becker and
Marco Platzner and
Serge Vernalde},
title = {A Structured Methodology for System-on-an-FPGA Design},
booktitle = {Field Programmable Logic and Application, 14th International Conference
, {FPL} 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3203},
pages = {1047--1051},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30117-2\_124},
doi = {10.1007/978-3-540-30117-2\_124},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SedcoleCCL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/CheungBLC04,
author = {Ray C. C. Cheung and
Ashley Brown and
Wayne Luk and
Peter Y. K. Cheung},
editor = {Oliver Diessel and
John Williams},
title = {A scalable hardware architecture for prime number validation},
booktitle = {Proceedings of the 2004 {IEEE} International Conference on Field-Programmable
Technology, Brisbane, Australia, December 6-8, 2004},
pages = {177--184},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/FPT.2004.1393266},
doi = {10.1109/FPT.2004.1393266},
timestamp = {Fri, 22 Nov 2019 15:44:53 +0100},
biburl = {https://dblp.org/rec/conf/fpt/CheungBLC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/MelisCL04,
author = {Wim J. C. Melis and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Oliver Diessel and
John Williams},
title = {Scalable structured data access by combining autonomous memory blocks},
booktitle = {Proceedings of the 2004 {IEEE} International Conference on Field-Programmable
Technology, Brisbane, Australia, December 6-8, 2004},
pages = {457--460},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/FPT.2004.1393324},
doi = {10.1109/FPT.2004.1393324},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/MelisCL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MelisCL04,
author = {Wim J. C. Melis and
Peter Y. K. Cheung and
Wayne Luk},
title = {Autonomous Memory Block for reconfigurable computing},
booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems,
{ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
pages = {581--584},
publisher = {{IEEE}},
year = {2004},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MelisCL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ConstantinidesCL03,
author = {George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
title = {Wordlength optimization for linear digital signal processing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {22},
number = {10},
pages = {1432--1442},
year = {2003},
url = {https://doi.org/10.1109/TCAD.2003.818119},
doi = {10.1109/TCAD.2003.818119},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ConstantinidesCL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ConstantinidesCL03,
author = {George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
title = {Synthesis of saturation arithmetic architectures},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {8},
number = {3},
pages = {334--354},
year = {2003},
url = {https://doi.org/10.1145/785411.785415},
doi = {10.1145/785411.785415},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/ConstantinidesCL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HettiaratchiC03,
author = {Sambuddhi Hettiaratchi and
Peter Y. K. Cheung},
title = {Mesh Partitioning Approach to Energy Efficient Data Layout},
booktitle = {2003 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2003), 3-7 March 2003, Munich, Germany},
pages = {11076--11081},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/DATE.2003.10138},
doi = {10.1109/DATE.2003.10138},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HettiaratchiC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/LeeLVC03,
author = {Dong{-}U Lee and
Wayne Luk and
John D. Villasenor and
Peter Y. K. Cheung},
title = {A Hardware Gaussian Noise Generator for Channel Code Evaluation},
booktitle = {11th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2003), 8-11 April 2003, Napa, CA, USA, Proceedings},
pages = {69},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/FPGA.2003.1227243},
doi = {10.1109/FPGA.2003.1227243},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/LeeLVC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RoyalC03,
author = {Andrew Royal and
Peter Y. K. Cheung},
editor = {Peter Y. K. Cheung and
George A. Constantinides and
Jos{\'{e}} T. de Sousa},
title = {Globally Asynchronous Locally Synchronous {FPGA} Architectures},
booktitle = {Field Programmable Logic and Application, 13th International Conference,
{FPL} 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2778},
pages = {355--364},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-45234-8\_35},
doi = {10.1007/978-3-540-45234-8\_35},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/RoyalC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WiangtongCL03,
author = {Theerayod Wiangtong and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Peter Y. K. Cheung and
George A. Constantinides and
Jos{\'{e}} T. de Sousa},
title = {A Unified Codesign Run-Time Environment for the UltraSONIC Reconfigurable
Computer},
booktitle = {Field Programmable Logic and Application, 13th International Conference,
{FPL} 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2778},
pages = {396--405},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-45234-8\_39},
doi = {10.1007/978-3-540-45234-8\_39},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WiangtongCL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SedcoleCCL03,
author = {N. Pete Sedcole and
Peter Y. K. Cheung and
George A. Constantinides and
Wayne Luk},
editor = {Peter Y. K. Cheung and
George A. Constantinides and
Jos{\'{e}} T. de Sousa},
title = {A Reconfigurable Platform for Real-Time Embedded Video Image Processing},
booktitle = {Field Programmable Logic and Application, 13th International Conference,
{FPL} 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2778},
pages = {606--615},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-45234-8\_59},
doi = {10.1007/978-3-540-45234-8\_59},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SedcoleCCL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LeeLVC03,
author = {Dong{-}U Lee and
Wayne Luk and
John D. Villasenor and
Peter Y. K. Cheung},
editor = {Peter Y. K. Cheung and
George A. Constantinides and
Jos{\'{e}} T. de Sousa},
title = {Non-uniform Segmentation for Hardware Function Evaluation},
booktitle = {Field Programmable Logic and Application, 13th International Conference,
{FPL} 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2778},
pages = {796--807},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-45234-8\_77},
doi = {10.1007/978-3-540-45234-8\_77},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LeeLVC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WiangtongCL03a,
author = {Theerayod Wiangtong and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Peter Y. K. Cheung and
George A. Constantinides and
Jos{\'{e}} T. de Sousa},
title = {Cluster-Driven Hardware/Software Partitioning and Scheduling Approach
for a Reconfigurable Computer System},
booktitle = {Field Programmable Logic and Application, 13th International Conference,
{FPL} 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2778},
pages = {1071--1074},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-45234-8\_122},
doi = {10.1007/978-3-540-45234-8\_122},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WiangtongCL03a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/LeeLVC03,
author = {Dong{-}U Lee and
Wayne Luk and
John D. Villasenor and
Peter Y. K. Cheung},
title = {Hierarchical segmentation schemes for function evaluation},
booktitle = {Proceedings of the 2003 {IEEE} International Conference on Field-Programmable
Technology, Tokyo, Japan, {FPT} 2003, December 15-17, 2003},
pages = {92--99},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/FPT.2003.1275736},
doi = {10.1109/FPT.2003.1275736},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/LeeLVC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/LeeDLC03,
author = {T. K. Lee and
Arran Derbyshire and
Wayne Luk and
Peter Y. K. Cheung},
title = {High-level language extensions for run-time reconfigurable systems},
booktitle = {Proceedings of the 2003 {IEEE} International Conference on Field-Programmable
Technology, Tokyo, Japan, {FPT} 2003, December 15-17, 2003},
pages = {144--151},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/FPT.2003.1275742},
doi = {10.1109/FPT.2003.1275742},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/LeeDLC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WiangtongCL03,
author = {Theerayod Wiangtong and
Peter Y. K. Cheung and
Wayne Luk},
title = {Multitasking in hardware-software codesign for reconfigurable computer},
booktitle = {Proceedings of the 2003 International Symposium on Circuits and Systems,
{ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
pages = {621--624},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ISCAS.2003.1206389},
doi = {10.1109/ISCAS.2003.1206389},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WiangtongCL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SidahaoCC03,
author = {Nalin Sidahao and
George A. Constantinides and
Peter Y. K. Cheung},
title = {Architectures for function evaluation on FPGAs},
booktitle = {Proceedings of the 2003 International Symposium on Circuits and Systems,
{ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
pages = {804--807},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ISCAS.2003.1206096},
doi = {10.1109/ISCAS.2003.1206096},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SidahaoCC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WiangtongEC03,
author = {Theerayod Wiangtong and
Chun Te Ewe and
Peter Y. K. Cheung},
title = {SONICmole: a debugging environment for the UltraSONIC reconfigurable
computer},
booktitle = {Proceedings of the 2003 International Symposium on Circuits and Systems,
{ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
pages = {808--811},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ISCAS.2003.1206097},
doi = {10.1109/ISCAS.2003.1206097},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WiangtongEC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpl/2003,
editor = {Peter Y. K. Cheung and
George A. Constantinides and
Jos{\'{e}} T. de Sousa},
title = {Field Programmable Logic and Application, 13th International Conference,
{FPL} 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2778},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/b12007},
doi = {10.1007/B12007},
isbn = {3-540-40822-3},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/2003.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dafes/WiangtongCL02,
author = {Theerayod Wiangtong and
Peter Y. K. Cheung and
Wayne Luk},
title = {Comparing Three Heuristic Search Methods for Functional Partitioning
in Hardware-Software Codesign},
journal = {Des. Autom. Embed. Syst.},
volume = {6},
number = {4},
pages = {425--449},
year = {2002},
url = {https://doi.org/10.1023/A:1016567828852},
doi = {10.1023/A:1016567828852},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dafes/WiangtongCL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HettiaratchiCC02,
author = {Sambuddhi Hettiaratchi and
Peter Y. K. Cheung and
Thomas J. W. Clarke},
title = {Performance-Area Trade-Off of Address Generators for Address Decoder-Decoupled
Memory},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {902--908},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998407},
doi = {10.1109/DATE.2002.998407},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HettiaratchiCC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/MelisCL02,
author = {Wim J. C. Melis and
Peter Y. K. Cheung and
Wayne Luk},
title = {Image Registration of Real-Time Video Data Using the {SONIC} Reconfigurable
Computer Platform},
booktitle = {10th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2002), 22-24 April 2002, Napa, CA, USA, Proceedings},
pages = {3--12},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/FPGA.2002.1106656},
doi = {10.1109/FPGA.2002.1106656},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/MelisCL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/GauseCL02,
author = {J{\"{o}}rn Gause and
Peter Y. K. Cheung and
Wayne Luk},
title = {Reconfigurable Shape-Adaptive Template Matching Architectures},
booktitle = {10th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2002), 22-24 April 2002, Napa, CA, USA, Proceedings},
pages = {98},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/FPGA.2002.1106665},
doi = {10.1109/FPGA.2002.1106665},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/GauseCL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/ConstantinidesCL02,
author = {George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
title = {Optimum Wordlength Allocation},
booktitle = {10th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2002), 22-24 April 2002, Napa, CA, USA, Proceedings},
pages = {219--228},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/FPGA.2002.1106676},
doi = {10.1109/FPGA.2002.1106676},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/ConstantinidesCL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/WiangtongCL02,
author = {Theerayod Wiangtong and
Peter Y. K. Cheung and
Wayne Luk},
title = {Tabu Search with Intensification Strategy for Functional Partitioning
in Hardware-Software Codesign},
booktitle = {10th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2002), 22-24 April 2002, Napa, CA, USA, Proceedings},
pages = {297--298},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/FPGA.2002.1106691},
doi = {10.1109/FPGA.2002.1106691},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/WiangtongCL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/GaffarLCS02,
author = {Altaf Abdul Gaffar and
Wayne Luk and
Peter Y. K. Cheung and
Nabeel Shirazi},
title = {Customising Floating-Point Designs},
booktitle = {10th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2002), 22-24 April 2002, Napa, CA, USA, Proceedings},
pages = {315--317},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/FPGA.2002.1106698},
doi = {10.1109/FPGA.2002.1106698},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/GaffarLCS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GaffarLCSH02,
author = {Altaf Abdul Gaffar and
Wayne Luk and
Peter Y. K. Cheung and
Nabeel Shirazi and
James Hwang},
editor = {Manfred Glesner and
Peter Zipf and
Michel Renovell},
title = {Automating Customisation of Floating-Point Designs},
booktitle = {Field-Programmable Logic and Applications, Reconfigurable Computing
Is Going Mainstream, 12th International Conference, {FPL} 2002, Montpellier,
France, September 2-4, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2438},
pages = {523--533},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-46117-5\_55},
doi = {10.1007/3-540-46117-5\_55},
timestamp = {Sat, 30 Sep 2023 09:41:27 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GaffarLCSH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SengLC02,
author = {Shay Ping Seng and
Wayne Luk and
Peter Y. K. Cheung},
editor = {Manfred Glesner and
Peter Zipf and
Michel Renovell},
title = {Run-Time Adaptive Flexible Instruction Processors},
booktitle = {Field-Programmable Logic and Applications, Reconfigurable Computing
Is Going Mainstream, 12th International Conference, {FPL} 2002, Montpellier,
France, September 2-4, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2438},
pages = {545--555},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-46117-5\_57},
doi = {10.1007/3-540-46117-5\_57},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SengLC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MelisCL02,
author = {Wim J. C. Melis and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Manfred Glesner and
Peter Zipf and
Michel Renovell},
title = {Image Registration of Real-Time Broadcast Video Using the UltraSONIC
Reconfigurable Computer},
booktitle = {Field-Programmable Logic and Applications, Reconfigurable Computing
Is Going Mainstream, 12th International Conference, {FPL} 2002, Montpellier,
France, September 2-4, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2438},
pages = {1148--1151},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-46117-5\_128},
doi = {10.1007/3-540-46117-5\_128},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MelisCL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/GaffarMLCS02,
author = {Altaf Abdul Gaffar and
Oskar Mencer and
Wayne Luk and
Peter Y. K. Cheung and
Nabeel Shirazi},
title = {Floating-point bitwidth analysis via automatic differentiation},
booktitle = {Proceedings of the 2002 {IEEE} International Conference on Field-Programmable
Technology, {FPT} 2002, Hong Kong, China, December 16-18, 2002},
pages = {158--165},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/FPT.2002.1188677},
doi = {10.1109/FPT.2002.1188677},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/GaffarMLCS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/LeeLLC02,
author = {Dong{-}U Lee and
T. K. Lee and
Wayne Luk and
Peter Y. K. Cheung},
title = {Incremental programming for reconfigurable engines},
booktitle = {Proceedings of the 2002 {IEEE} International Conference on Field-Programmable
Technology, {FPT} 2002, Hong Kong, China, December 16-18, 2002},
pages = {411--415},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/FPT.2002.1188723},
doi = {10.1109/FPT.2002.1188723},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/LeeLLC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/SengPRWLC02,
author = {Shay Ping Seng and
Krishna V. Palem and
Rodric M. Rabbah and
Weng{-}Fai Wong and
Wayne Luk and
Peter Y. K. Cheung},
title = {{PD-XML:} extensible markup language for processor description},
booktitle = {Proceedings of the 2002 {IEEE} International Conference on Field-Programmable
Technology, {FPT} 2002, Hong Kong, China, December 16-18, 2002},
pages = {437--440},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/FPT.2002.1188729},
doi = {10.1109/FPT.2002.1188729},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/SengPRWLC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/IpLCCLSM02,
author = {Henry M. D. Ip and
James D. Low and
Peter Y. K. Cheung and
George A. Constantinides and
Wayne Luk and
Shay Ping Seng and
Paul Metzgen},
title = {Strassen's matrix multiplication for customisable processors},
booktitle = {Proceedings of the 2002 {IEEE} International Conference on Field-Programmable
Technology, {FPT} 2002, Hong Kong, China, December 16-18, 2002},
pages = {453--456},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/FPT.2002.1188734},
doi = {10.1109/FPT.2002.1188734},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/IpLCCLSM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HettiaratchiCC02,
author = {Sambuddhi Hettiaratchi and
Peter Y. K. Cheung and
Thomas J. W. Clarke},
editor = {Lawrence T. Pileggi and
Andreas Kuehlmann},
title = {Energy efficient address assignment through minimized memory row switching},
booktitle = {Proceedings of the 2002 {IEEE/ACM} International Conference on Computer-aided
Design, {ICCAD} 2002, San Jose, California, USA, November 10-14, 2002},
pages = {577--581},
publisher = {{ACM} / {IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1145/774572.774657},
doi = {10.1145/774572.774657},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HettiaratchiCC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/ShiraziBLCG01,
author = {Nabeel Shirazi and
Dan Benyamin and
Wayne Luk and
Peter Y. K. Cheung and
Shaori Guo},
title = {Quantitative Analysis of FPGA-based Database Searching},
journal = {J. {VLSI} Signal Process.},
volume = {28},
number = {1-2},
pages = {85--96},
year = {2001},
url = {https://doi.org/10.1023/A:1008163222529},
doi = {10.1023/A:1008163222529},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/ShiraziBLCG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ConstantinidesCL01,
author = {George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Wolfgang Nebel and
Ahmed Jerraya},
title = {Heuristic datapath allocation for multiple wordlength systems},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2001, Munich, Germany, March 12-16, 2001},
pages = {791--797},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DATE.2001.915122},
doi = {10.1109/DATE.2001.915122},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ConstantinidesCL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/ConstantinidesCL01,
author = {George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
title = {The Multiple Wordlength Paradigm},
booktitle = {The 9th Annual {IEEE} Symposium on Field-Programmable Custom Computing
Machines, {FCCM} 2001, Rohnert Park, California, USA, April 29 - May
2, 2001},
pages = {51--60},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/FCCM.2001.46},
doi = {10.1109/FCCM.2001.46},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/ConstantinidesCL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/GauseRKCL01,
author = {J{\"{o}}rn Gause and
Carsten Reuter and
Holger Kropp and
Peter Y. K. Cheung and
Wayne Luk},
title = {The Effect of {FPGA} Granularity on Video Codec Implementations},
booktitle = {The 9th Annual {IEEE} Symposium on Field-Programmable Custom Computing
Machines, {FCCM} 2001, Rohnert Park, California, USA, April 29 - May
2, 2001},
pages = {287--288},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/FCCM.2001.44},
doi = {10.1109/FCCM.2001.44},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/GauseRKCL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VisavakulCL01,
author = {Chakkapas Visavakul and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Gordon J. Brebner and
Roger F. Woods},
title = {A Digit-Serial Structure for Reconfigurable Multipliers},
booktitle = {Field-Programmable Logic and Applications, 11th International Conference,
{FPL} 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2147},
pages = {565--573},
publisher = {Springer},
year = {2001},
url = {https://doi.org/10.1007/3-540-44687-7\_58},
doi = {10.1007/3-540-44687-7\_58},
timestamp = {Sat, 19 Oct 2019 20:15:05 +0200},
biburl = {https://dblp.org/rec/conf/fpl/VisavakulCL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TiewPC01,
author = {Kei{-}Tee Tiew and
Alison J. Payne and
Peter Y. K. Cheung},
title = {{MASH} delta-sigma modulators for wideband and multi-standard applications},
booktitle = {Proceedings of the 2001 International Symposium on Circuits and Systems,
{ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
pages = {778--781},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ISCAS.2001.922353},
doi = {10.1109/ISCAS.2001.922353},
timestamp = {Fri, 04 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TiewPC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/HaynesSCL00,
author = {Simon D. Haynes and
John Stone and
Peter Y. K. Cheung and
Wayne Luk},
title = {Video Image Processing with the Sonic Architecture},
journal = {Computer},
volume = {33},
number = {4},
pages = {50--57},
year = {2000},
url = {https://doi.org/10.1109/2.839321},
doi = {10.1109/2.839321},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/HaynesSCL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SengLC00,
author = {Shay Ping Seng and
Wayne Luk and
Peter Y. K. Cheung},
title = {Flexible instruction processors},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {193--200},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354907},
doi = {10.1145/354880.354907},
timestamp = {Tue, 06 Nov 2018 11:07:42 +0100},
biburl = {https://dblp.org/rec/conf/cases/SengLC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/ConstantinidesCL00,
author = {George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
title = {Multiple Precision for Resource Minimization},
booktitle = {8th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2000), 17-19 April 2000, Napa Valley, CA, USA, Proceedings},
pages = {307--308},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/FPGA.2000.903430},
doi = {10.1109/FPGA.2000.903430},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/ConstantinidesCL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GauseCL00,
author = {J{\"{o}}rn Gause and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Reiner W. Hartenstein and
Herbert Gr{\"{u}}nbacher},
title = {Static and Dynamic Reconfigurable Designs for a 2D Shape-Adaptive
{DCT}},
booktitle = {Field-Programmable Logic and Applications, The Roadmap to Reconfigurable
Computing, 10th International Workshop, {FPL} 2000, Villach, Austria,
August 27-30, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1896},
pages = {96--105},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44614-1\_11},
doi = {10.1007/3-540-44614-1\_11},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GauseCL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ConstantinidesCL00,
author = {George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Reiner W. Hartenstein and
Herbert Gr{\"{u}}nbacher},
title = {Multiple-Wordlength Resource Binding},
booktitle = {Field-Programmable Logic and Applications, The Roadmap to Reconfigurable
Computing, 10th International Workshop, {FPL} 2000, Villach, Austria,
August 27-30, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1896},
pages = {646--655},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44614-1\_69},
doi = {10.1007/3-540-44614-1\_69},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ConstantinidesCL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ConstantinidesC00,
author = {George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
title = {Roundoff-noise shaping in filter design},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
May 2000, Proceedings},
pages = {57--60},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/ISCAS.2000.858687},
doi = {10.1109/ISCAS.2000.858687},
timestamp = {Fri, 13 Aug 2021 09:26:01 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ConstantinidesC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/HaynesFC99,
author = {Simon D. Haynes and
Antonio B. Ferrari and
Peter Y. K. Cheung},
title = {Flexible reconfigurable multiplier blocks suitable for enhancing the
architecture of FPGAs},
booktitle = {Proceedings of the {IEEE} 1999 Custom Integrated Circuits Conference,
{CICC} 1999, San Diego, CA, USA, May 16-19, 1999},
pages = {191--194},
publisher = {{IEEE}},
year = {1999},
url = {https://doi.org/10.1109/CICC.1999.777272},
doi = {10.1109/CICC.1999.777272},
timestamp = {Fri, 07 Jul 2023 11:00:51 +0200},
biburl = {https://dblp.org/rec/conf/cicc/HaynesFC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/LukLRSC99,
author = {Wayne Luk and
T. K. Lee and
J. Rice and
Nabeel Shirazi and
Peter Y. K. Cheung},
title = {Reconfigurable Computing for Augmented Reality},
booktitle = {7th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} '99), 21-23 April 1999, Napa, CA, {USA}},
pages = {136--145},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/FPGA.1999.803675},
doi = {10.1109/FPGA.1999.803675},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/LukLRSC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/HaynesCLS99,
author = {Simon D. Haynes and
Peter Y. K. Cheung and
Wayne Luk and
John Stone},
title = {{SONIC} - {A} Plug-In Architecture for Video Processing},
booktitle = {7th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} '99), 21-23 April 1999, Napa, CA, {USA}},
pages = {280--281},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/FPGA.1999.803697},
doi = {10.1109/FPGA.1999.803697},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/HaynesCLS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HaynesCLS99,
author = {Simon D. Haynes and
Peter Y. K. Cheung and
Wayne Luk and
John Stone},
editor = {Patrick Lysaght and
James Irvine and
Reiner W. Hartenstein},
title = {{SONIC} - {A} Plug-In Architecture for Video Processing},
booktitle = {Field-Programmable Logic and Applications, 9th International Workshop,
FPL'99, Glasgow, UK, August 30 - September 1, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1673},
pages = {21--30},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/978-3-540-48302-1\_3},
doi = {10.1007/978-3-540-48302-1\_3},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HaynesCLS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ShiraziLBC99,
author = {Nabeel Shirazi and
Wayne Luk and
Dan Benyamin and
Peter Y. K. Cheung},
editor = {Patrick Lysaght and
James Irvine and
Reiner W. Hartenstein},
title = {Quantitative Analysis of Run-Time Reconfigurable Database Search},
booktitle = {Field-Programmable Logic and Applications, 9th International Workshop,
FPL'99, Glasgow, UK, August 30 - September 1, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1673},
pages = {253--263},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/978-3-540-48302-1\_26},
doi = {10.1007/978-3-540-48302-1\_26},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ShiraziLBC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ConstantinidisCL99,
author = {George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Patrick Lysaght and
James Irvine and
Reiner W. Hartenstein},
title = {\emph{Synthia}: Synthesis of Interacting Automata Targeting LUT-based
FPGAs},
booktitle = {Field-Programmable Logic and Applications, 9th International Workshop,
FPL'99, Glasgow, UK, August 30 - September 1, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1673},
pages = {323--332},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/978-3-540-48302-1\_33},
doi = {10.1007/978-3-540-48302-1\_33},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ConstantinidisCL99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/ShiraziLC98,
author = {Nabeel Shirazi and
Wayne Luk and
Peter Y. K. Cheung},
title = {Automating Production of Run-Time Reconfigurable Designs},
booktitle = {6th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} '98), 15-17 April 1998, Napa Valley, CA, {USA}},
pages = {147--156},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/FPGA.1998.707892},
doi = {10.1109/FPGA.1998.707892},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/ShiraziLC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/HaynesC98,
author = {Simon D. Haynes and
Peter Y. K. Cheung},
title = {A Reconfigurable Multiplier Array For Video Image Processing Tasks,
Suitable For Embedding In An {FPGA} Structure},
booktitle = {6th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} '98), 15-17 April 1998, Napa Valley, CA, {USA}},
pages = {226--234},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/FPGA.1998.707900},
doi = {10.1109/FPGA.1998.707900},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/HaynesC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ShiraziLC98,
author = {Nabeel Shirazi and
Wayne Luk and
Peter Y. K. Cheung},
editor = {Reiner W. Hartenstein and
Andres Keevallik},
title = {Run-Time Management of Dynamically Recongigurable Designs},
booktitle = {Field-Programmable Logic and Applications, From FPGAs to Computing
Paradigm, 8th International Workshop, FPL'98, Tallinn, Estonia, August
31 - September 3, 1998, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1482},
pages = {59--68},
publisher = {Springer},
year = {1998},
url = {https://doi.org/10.1007/BFb0055233},
doi = {10.1007/BFB0055233},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ShiraziLC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/HaynesFC98,
author = {Simon D. Haynes and
Antonio B. Ferrari and
Peter Y. K. Cheung},
title = {Algorithms and Structures for Reconfigurable Multiplication Units},
booktitle = {Proceedings of the 11th Annual Symposium on Integrated Circuits Design,
{SBCCI} 1998, Rio de Janiero, Brazil, September 30 - October 2, 1998},
pages = {13},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.ieeecomputersociety.org/10.1109/SBCCI.1998.715402},
doi = {10.1109/SBCCI.1998.715402},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/HaynesFC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/SousaC97,
author = {Jos{\'{e}} T. de Sousa and
Peter Y. K. Cheung},
title = {Diagnosis of Boards for Realistic Interconnect Shorts},
journal = {J. Electron. Test.},
volume = {11},
number = {2},
pages = {157--171},
year = {1997},
url = {https://doi.org/10.1023/A:1008270406603},
doi = {10.1023/A:1008270406603},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/SousaC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jifs/AlwanC97,
author = {Majd Alwan and
Peter Y. K. Cheung},
title = {Modelling and Handling Uncertainties in Mobile Robotics},
journal = {J. Intell. Fuzzy Syst.},
volume = {5},
number = {3},
pages = {205--217},
year = {1997},
url = {https://doi.org/10.3233/IFS-1997-5303},
doi = {10.3233/IFS-1997-5303},
timestamp = {Sat, 25 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jifs/AlwanC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/MolinaC97,
author = {Pedro A. Molina and
Peter Y. K. Cheung},
title = {A Quasi Delay-Insensitive Bus Proposal for Asynchronous Systems},
booktitle = {3rd International Symposium on Advanced Research in Asynchronous Circuits
and Systems {(ASYNC} '97), 7-10 April 1997, Eindhoven, The Netherlands},
pages = {126--139},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ASYNC.1997.587169},
doi = {10.1109/ASYNC.1997.587169},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/async/MolinaC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SousaC97,
author = {Jos{\'{e}} T. de Sousa and
Peter Y. K. Cheung},
title = {Improved diagnosis of realistic interconnect shorts},
booktitle = {European Design and Test Conference, ED{\&}TC '97, Paris, France,
17-20 March 1997},
pages = {501--505},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/EDTC.1997.582407},
doi = {10.1109/EDTC.1997.582407},
timestamp = {Fri, 20 May 2022 15:59:03 +0200},
biburl = {https://dblp.org/rec/conf/date/SousaC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/LukSC97,
author = {Wayne Luk and
Nabeel Shirazi and
Peter Y. K. Cheung},
title = {Compilation tools for run-time reconfigurable designs},
booktitle = {5th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} '97), 16-18 April 1997, Napa Valley, CA, {USA}},
pages = {56--65},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/FPGA.1997.624605},
doi = {10.1109/FPGA.1997.624605},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/LukSC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MackinlayCLS97,
author = {Patrick I. Mackinlay and
Peter Y. K. Cheung and
Wayne Luk and
Richard Sandiford},
editor = {Wayne Luk and
Peter Y. K. Cheung and
Manfred Glesner},
title = {Riley-2: {A} flexible platform for codesign and dynamic reconfigurable
computing research},
booktitle = {Field-Programmable Logic and Applications, 7th International Workshop,
{FPL} '97, London, UK, September 1-3, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1304},
pages = {91--100},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/3-540-63465-7\_214},
doi = {10.1007/3-540-63465-7\_214},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MackinlayCLS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LukSGC97,
author = {Wayne Luk and
Nabeel Shirazi and
Shaori Guo and
Peter Y. K. Cheung},
editor = {Wayne Luk and
Peter Y. K. Cheung and
Manfred Glesner},
title = {Pipeline morphing and virtual pipelines},
booktitle = {Field-Programmable Logic and Applications, 7th International Workshop,
{FPL} '97, London, UK, September 1-3, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1304},
pages = {111--120},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/3-540-63465-7\_216},
doi = {10.1007/3-540-63465-7\_216},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LukSGC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChaudhuriCL97,
author = {Anjit Sekhar Chaudhuri and
Peter Y. K. Cheung and
Wayne Luk},
editor = {Wayne Luk and
Peter Y. K. Cheung and
Manfred Glesner},
title = {A reconfigurable data-localised array for morphological algorithms},
booktitle = {Field-Programmable Logic and Applications, 7th International Workshop,
{FPL} '97, London, UK, September 1-3, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1304},
pages = {344--353},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/3-540-63465-7\_239},
doi = {10.1007/3-540-63465-7\_239},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChaudhuriCL97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BormannC97,
author = {David S. Bormann and
Peter Y. K. Cheung},
title = {Asnchronous Wrapper for Heterogeneous Systems},
booktitle = {Proceedings 1997 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '97, Austin, Texas, USA,
October 12-15, 1997},
pages = {307--314},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICCD.1997.628884},
doi = {10.1109/ICCD.1997.628884},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BormannC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpl/1997,
editor = {Wayne Luk and
Peter Y. K. Cheung and
Manfred Glesner},
title = {Field-Programmable Logic and Applications, 7th International Workshop,
{FPL} '97, London, UK, September 1-3, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1304},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/3-540-63465-7},
doi = {10.1007/3-540-63465-7},
isbn = {3-540-63465-7},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/1997.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KoskinenC96,
author = {Timo Koskinen and
Peter Y. K. Cheung},
title = {Hierarchical tolerance analysis using statistical behavioral models},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {15},
number = {5},
pages = {506--516},
year = {1996},
url = {https://doi.org/10.1109/43.506138},
doi = {10.1109/43.506138},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KoskinenC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/anziis/KharmaAC96,
author = {Nawwaf N. Kharma and
Majd Alwan and
Peter Y. K. Cheung},
editor = {V. Lakshmi Narasimhan and
Lakhmi C. Jain},
title = {An incremental machine learning mechanism applied to robot navigation},
booktitle = {Proceedings of the Australian New Zealand Conference on Intelligent
Information Systems, {ANZIIS} 96, Adelaide, South Australia, 18-20
November 1996},
pages = {325--328},
publisher = {{IEEE}},
year = {1996},
url = {https://doi.org/10.1109/ANZIIS.1996.573975},
doi = {10.1109/ANZIIS.1996.573975},
timestamp = {Wed, 17 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/anziis/KharmaAC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/anziis/AlwanCSO96,
author = {Majd Alwan and
Peter Y. K. Cheung and
Akram Saleh and
Nour E. Cheikh Obeid},
editor = {V. Lakshmi Narasimhan and
Lakhmi C. Jain},
title = {Combining goal-directed, reactive and reflexive navigation in autonomous
mobile robots},
booktitle = {Proceedings of the Australian New Zealand Conference on Intelligent
Information Systems, {ANZIIS} 96, Adelaide, South Australia, 18-20
November 1996},
pages = {346--349},
publisher = {{IEEE}},
year = {1996},
url = {https://doi.org/10.1109/ANZIIS.1996.573982},
doi = {10.1109/ANZIIS.1996.573982},
timestamp = {Wed, 17 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/anziis/AlwanCSO96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SousaSC96,
author = {Jos{\'{e}} T. de Sousa and
T. Shen and
Peter Y. K. Cheung},
title = {Realistic Fault Extraction for Boards},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {612},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494376},
doi = {10.1109/EDTC.1996.494376},
timestamp = {Fri, 20 May 2022 15:52:30 +0200},
biburl = {https://dblp.org/rec/conf/date/SousaSC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/LukSC96,
author = {Wayne Luk and
Nabeel Shirazi and
Peter Y. K. Cheung},
title = {Modelling and optimising run-time reconfigurable systems},
booktitle = {4th {IEEE} Symposium on FPGAs for Custom Computing Machines {(FCCM}
'96), Napa Valley, CA, USA, April 17-19, 1996},
pages = {167--176},
publisher = {{IEEE}},
year = {1996},
url = {https://doi.org/10.1109/FPGA.1996.564815},
doi = {10.1109/FPGA.1996.564815},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/fccm/LukSC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/AlbaharnaCC96,
author = {Osama T. Albaharna and
Peter Y. K. Cheung and
Thomas J. Clarke},
title = {On the viability of FPGA-based integrated coprocessors},
booktitle = {4th {IEEE} Symposium on FPGAs for Custom Computing Machines {(FCCM}
'96), Napa Valley, CA, USA, April 17-19, 1996},
pages = {206--215},
publisher = {{IEEE}},
year = {1996},
url = {https://doi.org/10.1109/FPGA.1996.564843},
doi = {10.1109/FPGA.1996.564843},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fccm/AlbaharnaCC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fgr/DemirelCC96,
author = {Hasan Demirel and
Thomas J. Clarke and
Peter Y. K. Cheung},
title = {Adaptive Automatic Facial Feature Segmentation},
booktitle = {2nd International Conference on Automatic Face and Gesture Recognition
{(FG} '96), October 14-16, 1996, Killington, Vermont, {USA}},
pages = {277--282},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/AFGR.1996.557277},
doi = {10.1109/AFGR.1996.557277},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fgr/DemirelCC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/AhmedCC94,
author = {Salman Ahmed and
Peter Y. K. Cheung and
Phil Collins},
editor = {Robert Werner},
title = {A Model-based Approach to Analog Fault Diagnosis using Techniques
from Optimisation},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {665},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/EDTC.1994.326798},
doi = {10.1109/EDTC.1994.326798},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/AhmedCC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/AlbaharnaCC94,
author = {Osama T. Albaharna and
Peter Y. K. Cheung and
Thomas J. Clarke},
title = {Area {\&} Time Limitations of FPGA-based Virtual Hardware},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {184--189},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331884},
doi = {10.1109/ICCD.1994.331884},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AlbaharnaCC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Sang-InC94,
author = {Akachai Sang{-}In and
Peter Y. K. Cheung},
title = {A Method of Representative Fault Selection in Digital Circuits for
{ATPG}},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {73--76},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408758},
doi = {10.1109/ISCAS.1994.408758},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Sang-InC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AlbaharnaCC94,
author = {Osama T. Albaharna and
Peter Y. K. Cheung and
Thomas J. Clarke},
title = {Virtual Hardware and the Limits of Computational Speed-up},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {159--162},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409222},
doi = {10.1109/ISCAS.1994.409222},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AlbaharnaCC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AhmedC94,
author = {Salman Ahmed and
Peter Y. K. Cheung},
title = {Analog Fault Diagnosis - {A} Practical Approach},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {351--354},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408869},
doi = {10.1109/ISCAS.1994.408869},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AhmedC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GoharC93,
author = {Nasir{-}ud{-}Din Gohar and
Peter Y. K. Cheung},
title = {A New Schematic-driven Floorplanning Algorithm for Analog Cell Layout},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1770--1773},
publisher = {{IEEE}},
year = {1993},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GoharC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/Rogel-FavilaWC91,
author = {Benjamin Rogel{-}Favila and
Antony Wakeling and
Peter Y. K. Cheung},
editor = {Tony Ambler and
Jochen A. G. Jess and
Hugo De Man},
title = {Model-based fault diagnosis of sequential circuits and its acceleration},
booktitle = {Proceedings of the conference on European design automation, EURO-DAC'91,
Amsterdam, The Netherlands, 1991},
pages = {224--229},
publisher = {{EEE} Computer Society},
year = {1991},
url = {http://dl.acm.org/citation.cfm?id=951562},
timestamp = {Tue, 17 Nov 2015 16:02:17 +0100},
biburl = {https://dblp.org/rec/conf/eurodac/Rogel-FavilaWC91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Fuentes-SanchezC91,
author = {Vicente Fuentes{-}S{\'{a}}nchez and
Peter Y. K. Cheung},
title = {A Tag Coprocessor Architecture for Symbolic Languages},
booktitle = {Proceedings 1991 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '91, Cambridge, MA,
USA, October 14-16, 1991},
pages = {370--373},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/ICCD.1991.139922},
doi = {10.1109/ICCD.1991.139922},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Fuentes-SanchezC91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-01-15 01:44 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
