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BibTeX records: Kailash Chandrashekar
@article{DBLP:journals/jssc/KunduCCPC21, author = {Somnath Kundu and Likai Chai and Kailash Chandrashekar and Stefano Pellerano and Brent R. Carlton}, title = {A Self-Calibrated 2-bit Time-Period Comparator-Based Synthesized Fractional-N {MDLL} in 22-nm FinFET {CMOS}}, journal = {{IEEE} J. Solid State Circuits}, volume = {56}, number = {1}, pages = {43--54}, year = {2021}, url = {https://doi.org/10.1109/JSSC.2020.3021279}, doi = {10.1109/JSSC.2020.3021279}, timestamp = {Sat, 09 Jan 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jssc/KunduCCPC21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/SeddighradPXMCA20, author = {Parmoon Seddighrad and Yorgos Palaskas and Hongtao Xu and Paolo Madoglio and Kailash Chandrashekar and David J. Allstot}, title = {Transformer-Combining Digital {PA} with Efficiency Peaking at 0, -6, and -12 dB Backoff in 32nm {CMOS}}, booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020, Sevilla, Spain, October 10-21, 2020}, pages = {1--4}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/ISCAS45731.2020.9180467}, doi = {10.1109/ISCAS45731.2020.9180467}, timestamp = {Mon, 18 Jan 2021 08:38:59 +0100}, biburl = {https://dblp.org/rec/conf/iscas/SeddighradPXMCA20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/KunduCCPC20, author = {Somnath Kundu and Likai Chai and Kailash Chandrashekar and Stefano Pellerano and Brent R. Carlton}, title = {25.5 {A} Self-Calibrated 1.2-to-3.8GHz 0.0052mm2 Synthesized Fractional-N {MDLL} Using a 2b Time-Period Comparator in 22nm FinFET {CMOS}}, booktitle = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC} 2020, San Francisco, CA, USA, February 16-20, 2020}, pages = {276--278}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/ISSCC19947.2020.9062939}, doi = {10.1109/ISSCC19947.2020.9062939}, timestamp = {Sat, 18 Apr 2020 17:41:44 +0200}, biburl = {https://dblp.org/rec/conf/isscc/KunduCCPC20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/islped/LiKCNR17, author = {William Y. Li and Hyung Seok Kim and Kailash Chandrashekar and Khoa Minh Nguyen and Ashoke Ravi}, title = {A 32nm, 0.65-10GHz, 0.9/0.3 ps/{\(\sigma\)} {TX/RX} jitter single inductor digital fractional-n clock generator for reconfigurable serial {I/O}}, booktitle = {2017 {IEEE/ACM} International Symposium on Low Power Electronics and Design, {ISLPED} 2017, Taipei, Taiwan, July 24-26, 2017}, pages = {1--6}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISLPED.2017.8009160}, doi = {10.1109/ISLPED.2017.8009160}, timestamp = {Wed, 16 Oct 2019 14:14:56 +0200}, biburl = {https://dblp.org/rec/conf/islped/LiKCNR17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/MadoglioXCCFLKN17, author = {Paolo Madoglio and Hongtao Xu and Kailash Chandrashekar and Luis Cuellar and Muhammad Faisal and Yee William Li and Hyung Seok Kim and Khoa Minh Nguyen and Yulin Tan and Brent R. Carlton and Vaibhav A. Vaidya and Yanjie Wang and Thomas Tetzlaff and Satoshi Suzuki and Amr Fahim and Parmoon Seddighrad and Jianyong Xie and Zhichao Zhang and Divya Shree Vemparala and Ashoke Ravi and Stefano Pellerano and Yorgos Palaskas}, title = {13.6 {A} 2.4GHz {WLAN} digital polar transmitter with synthesized digital-to-time converter in 14nm trigate/FinFET technology for IoT and wearable applications}, booktitle = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2017, San Francisco, CA, USA, February 5-9, 2017}, pages = {226--227}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISSCC.2017.7870343}, doi = {10.1109/ISSCC.2017.7870343}, timestamp = {Wed, 01 Sep 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isscc/MadoglioXCCFLKN17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/KimOCSSMLR13, author = {Hyung Seok Kim and Carlos Ornelas and Kailash Chandrashekar and Dan Shi and Pin{-}en Su and Paolo Madoglio and Yee William Li and Ashoke Ravi}, title = {A Digital Fractional-N {PLL} With a {PVT} and Mismatch Insensitive {TDC} Utilizing Equivalent Time Sampling Technique}, journal = {{IEEE} J. Solid State Circuits}, volume = {48}, number = {7}, pages = {1721--1729}, year = {2013}, url = {https://doi.org/10.1109/JSSC.2013.2253407}, doi = {10.1109/JSSC.2013.2253407}, timestamp = {Sun, 30 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/KimOCSSMLR13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/RaviMXCVPCASZBLP12, author = {Ashoke Ravi and Paolo Madoglio and Hongtao Xu and Kailash Chandrashekar and Marian Verhelst and Stefano Pellerano and Luis Cuellar and Mariano Aguirre{-}Hernandez and Masoud Sajadieh and J. E. Zarate{-}Roldan and Ofir Bochobza{-}Degani and Hasnain Lakdawala and Yorgos Palaskas}, title = {A 2.4-GHz 20-40-MHz Channel {WLAN} Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm {CMOS}}, journal = {{IEEE} J. Solid State Circuits}, volume = {47}, number = {12}, pages = {3184--3196}, year = {2012}, url = {https://doi.org/10.1109/JSSC.2012.2216671}, doi = {10.1109/JSSC.2012.2216671}, timestamp = {Thu, 31 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/RaviMXCVPCASZBLP12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/esscirc/KimOCSMLR12, author = {Hyung Seok Kim and Carlos Ornelas and Kailash Chandrashekar and Pin{-}en Su and Paolo Madoglio and Yee William Li and Ashoke Ravi}, title = {A digital fractional-N {PLL} with a 3mW 0.004mm\({}^{\mbox{2}}\) 6-bit {PVT} and mismatch insensitive {TDC}}, booktitle = {Proceedings of the 38th European Solid-State Circuit conference, {ESSCIRC} 2012, Bordeaux, France, September 17-21, 2012}, pages = {193--196}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/ESSCIRC.2012.6341291}, doi = {10.1109/ESSCIRC.2012.6341291}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/esscirc/KimOCSMLR12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/MadoglioRXCVPCASDLP12, author = {Paolo Madoglio and Ashoke Ravi and Hongtao Xu and Kailash Chandrashekar and Marian Verhelst and Stefano Pellerano and Luis Cuellar and Mariano Aguirre and Masoud Sajadieh and Ofir B. Degani and Hasnain Lakdawala and Yorgos Palaskas}, title = {A 20dBm 2.4GHz digital outphasing transmitter for {WLAN} application in 32nm {CMOS}}, booktitle = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2012, San Francisco, CA, USA, February 19-23, 2012}, pages = {168--170}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/ISSCC.2012.6176962}, doi = {10.1109/ISSCC.2012.6176962}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isscc/MadoglioRXCVPCASDLP12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/ChandrashekarPMRP12, author = {Kailash Chandrashekar and Stefano Pellerano and Paolo Madoglio and Ashoke Ravi and Yorgos Palaskas}, title = {A 32nm {CMOS} all-digital reconfigurable fractional frequency divider for {LO} generation in multistandard SoC radios with on-the-fly interference management}, booktitle = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2012, San Francisco, CA, USA, February 19-23, 2012}, pages = {352--354}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/ISSCC.2012.6177048}, doi = {10.1109/ISSCC.2012.6177048}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isscc/ChandrashekarPMRP12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsic/TanDFABLRPCKCSS12, author = {Yulin Tan and Jon Duster and Chang{-}Tsung Fu and Erkan Alpman and Ajay Balankutty and Chun C. Lee and Ashoke Ravi and Stefano Pellerano and Kailash Chandrashekar and Hyung Seok Kim and Brent R. Carlton and Satoshi Suzuki and M. Shafi and Yorgos Palaskas and Hasnain Lakdawala}, title = {A 2.4GHz {WLAN} transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm {T/R} switch, 240MS/s DAC, 320MS/s ADC, and {DPLL} in 32nm SoC {CMOS}}, booktitle = {Symposium on {VLSI} Circuits, {VLSIC} 2012, Honolulu, HI, USA, June 13-15, 2012}, pages = {76--77}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/VLSIC.2012.6243797}, doi = {10.1109/VLSIC.2012.6243797}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/vlsic/TanDFABLRPCKCSS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/ChandrashekarB11, author = {Kailash Chandrashekar and Bertan Bakkaloglu}, title = {A 10 b 50 MS/s Opamp-Sharing Pipeline {A/D} With Current-Reuse OTAs}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {19}, number = {9}, pages = {1610--1616}, year = {2011}, url = {https://doi.org/10.1109/TVLSI.2010.2052376}, doi = {10.1109/TVLSI.2010.2052376}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tvlsi/ChandrashekarB11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcas/ChandrashekarCFB10, author = {Kailash Chandrashekar and Marco Corsi and John W. Fattaruso and Bertan Bakkaloglu}, title = {A 20-MS/s to 40-MS/s Reconfigurable Pipeline {ADC} Implemented With Parallel {OTA} Scaling}, journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs}, volume = {57-II}, number = {8}, pages = {602--606}, year = {2010}, url = {https://doi.org/10.1109/TCSII.2010.2050948}, doi = {10.1109/TCSII.2010.2050948}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcas/ChandrashekarCFB10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cicc/ChandrashekarB09, author = {Kailash Chandrashekar and Bertan Bakkaloglu}, title = {A 10b 50MS/s opamp-sharing pipeline {A/D} with current-reuse OTAs}, booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2009, San Jose, California, USA, 13-16 September, 2009, Proceedings}, pages = {263--266}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/CICC.2009.5280855}, doi = {10.1109/CICC.2009.5280855}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cicc/ChandrashekarB09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cicc/CopaniVJKCGKCDBBK08, author = {Tino Copani and Bert Vermeire and Anuj Jain and Habib Karaki and Kailash Chandrashekar and Sushmit Goswami and Jennifer Kitchen and Hoon Hee Chung and Ilker Deligoz and Bertan Bakkaloglu and Hugh J. Barnaby and Sayfe Kiaei}, title = {A fully integrated pulsed-LASER time-of-flight measurement system with 12ps single-shot precision}, booktitle = {Proceedings of the {IEEE} 2008 Custom Integrated Circuits Conference, {CICC} 2008, DoubleTree Hotel, San Jose, California, USA, September 21-24, 2008}, pages = {359--362}, publisher = {{IEEE}}, year = {2008}, url = {https://doi.org/10.1109/CICC.2008.4672096}, doi = {10.1109/CICC.2008.4672096}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cicc/CopaniVJKCGKCDBBK08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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