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ORCIDBibTeX records: Sean M. Carey
@inproceedings{DBLP:conf/dsn/SwaminathanBBBHCAJPB23,
author = {Karthik Swaminathan and
Ramon Bertran and
Doug Balazich and
Alper Buyuktosunoglu and
Arvind Haran and
Sean M. Carey and
Karl Anderson and
Hans M. Jacobson and
Matthias Pflanz and
Pradip Bose},
title = {Characterization and Exploration of Latch Checkers for Efficient {RAS}
Protection},
booktitle = {53rd Annual {IEEE/IFIP} International Conference on Dependable Systems
and Networks, {DSN} 2023 - Supplemental Volume, Porto, Portugal, June
27-30, 2023},
pages = {63--69},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DSN-S58398.2023.00026},
doi = {10.1109/DSN-S58398.2023.00026},
timestamp = {Thu, 17 Aug 2023 15:16:15 +0200},
biburl = {https://dblp.org/rec/conf/dsn/SwaminathanBBBHCAJPB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/WolpertBBJSIGDC21,
author = {David Wolpert and
Christopher J. Berry and
Brian Bell and
Adam Jatkowski and
Jesse Surprise and
John Isakson and
Ofer Geva and
Brian Deskin and
Mark Cichanowski and
Dina Hamid and
Chris Cavitt and
Gregory Fredeman and
Dinesh Kannambadi and
Anthony Saporito and
Ashutosh Mishra and
Alper Buyuktosunoglu and
Tobias Webel and
Preetham Lobo and
Ramon Bertran and
Pradeep Bhadravati Parashurama and
Dureseti Chidambarrao and
Brandon Bruen and
Alan P. Wagstaff and
Eric Lukes and
Sean M. Carey and
Hunter F. Shi and
Michael Romain and
Paul Logsdon and
Ishita Agarwal},
title = {Cores, Cache, Content, and Characterization: IBM's Second Generation
14-nm Product, z15},
journal = {{IEEE} J. Solid State Circuits},
volume = {56},
number = {1},
pages = {98--111},
year = {2021},
url = {https://doi.org/10.1109/JSSC.2020.3030062},
doi = {10.1109/JSSC.2020.3030062},
timestamp = {Mon, 04 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/WolpertBBJSIGDC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/BerryWBJSSIGDCB20,
author = {Christopher J. Berry and
David Wolpert and
Brian Bell and
Adam Jatkowski and
Jesse Surprise and
Gerald Strevig and
John Isakson and
Ofer Geva and
Brian Deskin and
Mark Cichanowski and
Giora Biran and
Dina Hamid and
Chris Cavitt and
Gregory Fredeman and
Dureseti Chidambarrao and
Brandon Bruen and
Michael H. Wood and
Sean M. Carey and
Drew Turner and
Leon J. Sigal},
title = {{IBM} z15: Physical design improvements to significantly increase
content in the same technology},
journal = {{IBM} J. Res. Dev.},
volume = {64},
number = {5/6},
pages = {8:1--8:12},
year = {2020},
url = {https://doi.org/10.1147/JRD.2020.3008099},
doi = {10.1147/JRD.2020.3008099},
timestamp = {Mon, 04 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/BerryWBJSSIGDCB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BerryWVRCMSCJSS19,
author = {Christopher J. Berry and
David Wolpert and
Christos Vezyrtzis and
Richard F. Rizzolo and
Sean M. Carey and
Yaniv Maroz and
Hunter F. Shi and
Dureseti Chidambarrao and
Christian Jacobi and
Anthony Saporito and
Thomas Strach and
Alper Buyuktosunoglu and
Preetham Lobo and
Pierce Chuang and
Pawel Owczarczyk and
Ramon Bertran and
Tobias Webel and
Phillip J. Restle},
title = {{IBM} z14: Processor Characterization and Power Management for High-Reliability
Mainframe Systems},
journal = {{IEEE} J. Solid State Circuits},
volume = {54},
number = {1},
pages = {121--132},
year = {2019},
url = {https://doi.org/10.1109/JSSC.2018.2873582},
doi = {10.1109/JSSC.2018.2873582},
timestamp = {Tue, 19 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/BerryWVRCMSCJSS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/BerryWIBBMMHSWG18,
author = {Christopher J. Berry and
James D. Warnock and
John Isakson and
John Badar and
Brian Bell and
Frank Malgioglio and
Guenter Mayer and
Dina Hamid and
Jesse Surprise and
David Wolpert and
Ofer Geva and
Bill Huott and
Leon J. Sigal and
Sean M. Carey and
Richard F. Rizzolo and
Ricardo Nigaglioni and
Mark Cichanowski and
Dureseti Chidambarrao and
Christian Jacobi and
Anthony Saporito and
Arthur O'neill and
Robert J. Sonnelitter and
Christian G. Zoellin and
Michael H. Wood and
Jos{\'{e}} Neves},
title = {{IBM} z14{\texttrademark}: 14nm microprocessor for the next-generation
mainframe},
booktitle = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2018, San Francisco, CA, USA, February 11-15, 2018},
pages = {36--38},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISSCC.2018.8310171},
doi = {10.1109/ISSCC.2018.8310171},
timestamp = {Mon, 04 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/BerryWIBBMMHSWG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/VezyrtzisSCLRWO18,
author = {Christos Vezyrtzis and
Thomas Strach and
Pierce I{-}Jen Chuang and
Preetham Lobo and
Richard F. Rizzolo and
Tobias Webel and
Pawel Owczarczyk and
Alper Buyuktosunoglu and
Ramon Bertran and
David T. Hui and
Susan M. Eickhoff and
Michael S. Floyd and
Gerard Salem and
Sean M. Carey and
Stelios G. Tsapepas and
Phillip J. Restle},
title = {Droop mitigation using critical-path sensors and an on-chip distributed
power supply estimation engine in the z14{\texttrademark} enterprise
processor},
booktitle = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2018, San Francisco, CA, USA, February 11-15, 2018},
pages = {300--302},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISSCC.2018.8310303},
doi = {10.1109/ISSCC.2018.8310303},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/VezyrtzisSCLRWO18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ChuangVPRWSTLBB17,
author = {Pierce I{-}Jen Chuang and
Christos Vezyrtzis and
Divya Pathak and
Richard F. Rizzolo and
Tobias Webel and
Thomas Strach and
Otto A. Torreiter and
Preetham Lobo and
Alper Buyuktosunoglu and
Ramon Bertran and
Michael S. Floyd and
Malcolm S. Ware and
Gerard Salem and
Sean M. Carey and
Phillip J. Restle},
title = {26.2 Power supply noise in a 22nm z13{\texttrademark} microprocessor},
booktitle = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2017, San Francisco, CA, USA, February 5-9, 2017},
pages = {438--439},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISSCC.2017.7870449},
doi = {10.1109/ISSCC.2017.7870449},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/ChuangVPRWSTLBB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/WarnockBWSMMMCM15,
author = {James D. Warnock and
Christopher J. Berry and
Michael H. Wood and
Leon J. Sigal and
Yun{-}Chan Myung and
Guenter Mayer and
Mark D. Mayo and
Y. Chan and
Frank Malgioglio and
Gerald Strevig and
Charudhattan Nagarajan and
Sean M. Carey and
Gerard Salem and
Friedrich Schroeder and
Howard H. Smith and
Di Phan and
Ricardo Nigaglioni and
Thomas Strach and
Matthew M. Ziegler and
Niels Fricke and
K. Lind and
Jos{\'{e}} Neves and
Sridhar H. Rangarajan and
J. P. Surprise and
John Isakson and
John Badar and
Doug Malone and
Donald W. Plass and
A. Aipperspach and
Dieter F. Wendel and
Robert M. Averill III and
Ruchir Puri},
title = {{IBM} z13 circuit design and methodology},
journal = {{IBM} J. Res. Dev.},
volume = {59},
number = {4/5},
year = {2015},
url = {https://doi.org/10.1147/JRD.2015.2446871},
doi = {10.1147/JRD.2015.2446871},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/WarnockBWSMMMCM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/WebelLBSARCSBLB15,
author = {Tobias Webel and
Preetham M. Lobo and
Ramon Bertran and
Gerard Salem and
Malcolm Allen{-}Ware and
Richard F. Rizzolo and
Sean M. Carey and
Thomas Strach and
Alper Buyuktosunoglu and
Charles Lefurgy and
Pradip Bose and
Ricardo Nigaglioni and
Timothy J. Slegel and
Michael S. Floyd and
Brian W. Curran},
title = {Robust power management in the {IBM} z13},
journal = {{IBM} J. Res. Dev.},
volume = {59},
number = {4/5},
year = {2015},
url = {https://doi.org/10.1147/JRD.2015.2446872},
doi = {10.1147/JRD.2015.2446872},
timestamp = {Thu, 04 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/WebelLBSARCSBLB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WarnockCBFPCCSS15,
author = {James D. Warnock and
Brian W. Curran and
John Badar and
Gregory Fredeman and
Donald W. Plass and
Yuen H. Chan and
Sean M. Carey and
Gerard Salem and
Friedrich Schroeder and
Frank Malgioglio and
Guenter Mayer and
Christopher J. Berry and
Michael H. Wood and
Yiu{-}Hing Chan and
Mark D. Mayo and
John Isakson and
Charudhattan Nagarajan and
Tobias Werner and
Leon J. Sigal and
Ricardo Nigaglioni and
Mark Cichanowski and
Jeffrey A. Zitz and
Matthew M. Ziegler and
Tim Bronson and
Gerald Strevig and
Daniel Dreps and
Ruchir Puri and
Douglas Malone and
Dieter F. Wendel and
Pak{-}kin Mak and
Michael A. Blake},
title = {4.1 22nm Next-generation {IBM} System z microprocessor},
booktitle = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2015, Digest of Technical Papers, San Francisco, CA, USA, February
22-26, 2015},
pages = {1--3},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ISSCC.2015.7062930},
doi = {10.1109/ISSCC.2015.7062930},
timestamp = {Wed, 22 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/WarnockCBFPCCSS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/WarnockCHCSMPZJSDGBMCMRSSSWMSPW14,
author = {James D. Warnock and
Yuen H. Chan and
Hubert Harrer and
Sean M. Carey and
Gerard Salem and
Doug Malone and
Ruchir Puri and
Jeffrey A. Zitz and
Adam Jatkowski and
Gerald Strevig and
Ayan Datta and
Anne Gattiker and
Aditya Bansal and
Guenter Mayer and
Yiu{-}Hing Chan and
Mark D. Mayo and
David L. Rude and
Leon J. Sigal and
Thomas Strach and
Howard H. Smith and
Huajun Wen and
Pak{-}kin Mak and
Chung{-}Lung Kevin Shum and
Donald W. Plass and
Charles F. Webb},
title = {Circuit and Physical Design of the zEnterprise{\texttrademark} {EC12}
Microprocessor Chips and Multi-Chip Module},
journal = {{IEEE} J. Solid State Circuits},
volume = {49},
number = {1},
pages = {9--18},
year = {2014},
url = {https://doi.org/10.1109/JSSC.2013.2284647},
doi = {10.1109/JSSC.2013.2284647},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/WarnockCHCSMPZJSDGBMCMRSSSWMSPW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/BertranBBSSCRS14,
author = {Ramon Bertran and
Alper Buyuktosunoglu and
Pradip Bose and
Timothy J. Slegel and
Gerard Salem and
Sean M. Carey and
Richard F. Rizzolo and
Thomas Strach},
title = {Voltage Noise in Multi-Core Processors: Empirical Characterization
and Optimization Opportunities},
booktitle = {47th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2014, Cambridge, United Kingdom, December 13-17, 2014},
pages = {368--380},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/MICRO.2014.12},
doi = {10.1109/MICRO.2014.12},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/BertranBBSSCRS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WarnockCHRPCSMCMJSSDGBMSWMSPW13,
author = {James D. Warnock and
Yuen H. Chan and
Hubert Harrer and
David L. Rude and
Ruchir Puri and
Sean M. Carey and
Gerard Salem and
Guenter Mayer and
Yiu{-}Hing Chan and
Mark D. Mayo and
Adam Jatkowski and
Gerald Strevig and
Leon J. Sigal and
Ayan Datta and
Anne Gattiker and
Aditya Bansal and
Doug Malone and
Thomas Strach and
Huajun Wen and
Pak{-}kin Mak and
Chung{-}Lung Kevin Shum and
Donald W. Plass and
Charles F. Webb},
title = {5.5GHz system z microprocessor and multi-chip module},
booktitle = {2013 {IEEE} International Solid-State Circuits Conference - Digest
of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
17-21, 2013},
pages = {46--47},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISSCC.2013.6487630},
doi = {10.1109/ISSCC.2013.6487630},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/WarnockCHRPCSMCMJSSDGBMSWMSPW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/WarnockCCWMGSCDBPRPSMMNRH12,
author = {James D. Warnock and
Yiu{-}Hing Chan and
Sean M. Carey and
Huajun Wen and
Patrick J. Meaney and
Guenter Gerwig and
Howard H. Smith and
Yuen H. Chan and
John Davis and
Paul Bunce and
Antonio Pelella and
Daniel Rodko and
Pradip Patel and
Thomas Strach and
Doug Malone and
Frank Malgioglio and
Jos{\'{e}} Neves and
David L. Rude and
William V. Huott},
title = {Circuit and Physical Design Implementation of the Microprocessor Chip
for the zEnterprise System},
journal = {{IEEE} J. Solid State Circuits},
volume = {47},
number = {1},
pages = {151--163},
year = {2012},
url = {https://doi.org/10.1109/JSSC.2011.2169308},
doi = {10.1109/JSSC.2011.2169308},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/WarnockCCWMGSCDBPRPSMMNRH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WarnockCHCFWSMMPCMMSRAWSSCSEMWMMW11,
author = {James D. Warnock and
Y. Chan and
William V. Huott and
Sean M. Carey and
Michael F. Fee and
Huajun Wen and
Mary Jo Saccamango and
Frank Malgioglio and
Patrick J. Meaney and
Donald W. Plass and
Yuen H. Chan and
Mark D. Mayo and
Guenter Mayer and
Leon J. Sigal and
David L. Rude and
Robert M. Averill III and
Michael H. Wood and
Thomas Strach and
Howard H. Smith and
Brian W. Curran and
Eric M. Schwarz and
Lee Eisen and
Doug Malone and
Steve Weitzel and
Pak{-}kin Mak and
Thomas J. McPherson and
Charles F. Webb},
title = {A 5.2GHz microprocessor chip for the {IBM} zEnterprise{\texttrademark}
system},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
2011},
pages = {70--72},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISSCC.2011.5746223},
doi = {10.1109/ISSCC.2011.5746223},
timestamp = {Thu, 07 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/WarnockCHCFWSMMPCMMSRAWSSCSEMWMMW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/MayerDRBCCKLNSVWW07,
author = {Guenter Mayer and
Gerhard D{\"{o}}ttling and
Richard F. Rizzolo and
Christopher J. Berry and
Sean M. Carey and
Christopher M. Carney and
Joachim Keinert and
Peter Loeffler and
Walter Nop and
Daniel E. Skooglund and
Vern A. Victoria and
Alan P. Wagstaff and
Patrick M. Williams},
title = {Design methods for attaining {IBM} System z9 processor cycle-time
goals},
journal = {{IBM} J. Res. Dev.},
volume = {51},
number = {1/2},
pages = {19--36},
year = {2007},
url = {https://doi.org/10.1147/rd.511.0019},
doi = {10.1147/RD.511.0019},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/MayerDRBCCKLNSVWW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/ShepardCCCHHMNS97,
author = {Kenneth L. Shepard and
Sean M. Carey and
Ee Kin Cho and
Brian W. Curran and
Robert F. Hatch and
Dale E. Hoffman and
Scott A. McCabe and
Gregory A. Northrop and
A. E. (Rick) Seigler},
title = {Design methodology for the {S/390} Parallel Enterprise Server {G4}
microprocessors},
journal = {{IBM} J. Res. Dev.},
volume = {41},
number = {4{\&}5},
pages = {515--548},
year = {1997},
url = {https://doi.org/10.1147/rd.414.0515},
doi = {10.1147/RD.414.0515},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/ShepardCCCHHMNS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ShepardCBHN97,
author = {Kenneth L. Shepard and
Sean M. Carey and
Daniel K. Beece and
Robert F. Hatch and
Gregory A. Northrop},
title = {Design Methodology for the High-Performance {G4} {S/390}},
booktitle = {Proceedings 1997 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '97, Austin, Texas, USA,
October 12-15, 1997},
pages = {232--240},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICCD.1997.628873},
doi = {10.1109/ICCD.1997.628873},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ShepardCBHN97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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