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ORCIDBibTeX records: Krste Asanovic
@article{DBLP:journals/micro/DiamantA23,
author = {Ron Diamant and
Krste Asanovic},
title = {Special Issue on Hot Chips 34},
journal = {{IEEE} Micro},
volume = {43},
number = {3},
pages = {7--8},
year = {2023},
url = {https://doi.org/10.1109/MM.2023.3264401},
doi = {10.1109/MM.2023.3264401},
timestamp = {Fri, 02 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/DiamantA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KimGNANS23,
author = {Seah Kim and
Hasan Genc and
Vadim Vadimovich Nikiforov and
Krste Asanovic and
Borivoje Nikolic and
Yakun Sophia Shao},
title = {MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural
Networks},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2023, Montreal, QC, Canada, February 25 - March 1, 2023},
pages = {828--841},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/HPCA56546.2023.10071035},
doi = {10.1109/HPCA56546.2023.10071035},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/KimGNANS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KarandikarUCWZK23,
author = {Sagar Karandikar and
Aniruddha N. Udipi and
Junsun Choi and
Joonho Whangbo and
Jerry Zhao and
Svilen Kanev and
Edwin Lim and
Jyrki Alakuijala and
Vrishab Madduri and
Yakun Sophia Shao and
Borivoje Nikolic and
Krste Asanovic and
Parthasarathy Ranganathan},
editor = {Yan Solihin and
Mark A. Heinrich},
title = {{CDPU:} Co-designing Compression and Decompression Processing Units
for Hyperscale Systems},
booktitle = {Proceedings of the 50th Annual International Symposium on Computer
Architecture, {ISCA} 2023, Orlando, FL, USA, June 17-21, 2023},
pages = {39:1--39:17},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3579371.3589074},
doi = {10.1145/3579371.3589074},
timestamp = {Fri, 07 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/KarandikarUCWZK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/GonzalezKK0DKCA23,
author = {Abraham Gonzalez and
Aasheesh Kolli and
Samira Manabi Khan and
Sihang Liu and
Vidushi Dadu and
Sagar Karandikar and
Jichuan Chang and
Krste Asanovic and
Parthasarathy Ranganathan},
editor = {Yan Solihin and
Mark A. Heinrich},
title = {Profiling Hyperscale Big Data Processing},
booktitle = {Proceedings of the 50th Annual International Symposium on Computer
Architecture, {ISCA} 2023, Orlando, FL, USA, June 17-21, 2023},
pages = {47:1--47:16},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3579371.3589082},
doi = {10.1145/3579371.3589082},
timestamp = {Fri, 07 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/GonzalezKK0DKCA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KimZANS23,
author = {Seah Kim and
Jerry Zhao and
Krste Asanovic and
Borivoje Nikolic and
Yakun Sophia Shao},
title = {AuRORA: Virtualized Accelerator Orchestration for Multi-Tenant Workloads},
booktitle = {Proceedings of the 56th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2023, Toronto, ON, Canada, 28 October
2023 - 1 November 2023},
pages = {62--76},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3613424.3614280},
doi = {10.1145/3613424.3614280},
timestamp = {Sun, 31 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/KimZANS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2305-05843,
author = {Seah Kim and
Hasan Genc and
Vadim Vadimovich Nikiforov and
Krste Asanovic and
Borivoje Nikolic and
Yakun Sophia Shao},
title = {MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural
Networks},
journal = {CoRR},
volume = {abs/2305.05843},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2305.05843},
doi = {10.48550/ARXIV.2305.05843},
eprinttype = {arXiv},
eprint = {2305.05843},
timestamp = {Tue, 16 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2305-05843.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SchmidtWWCOBHMF22,
author = {Colin Schmidt and
John Charles Wright and
Zhongkai Wang and
Eric Chang and
Albert J. Ou and
Woorham Bae and
Sean Huang and
Vladimir M. Milovanovic and
Anita Flynn and
Brian C. Richards and
Krste Asanovic and
Elad Alon and
Borivoje Nikolic},
title = {An Eight-Core 1.44-GHz {RISC-V} Vector Processor in 16-nm FinFET},
journal = {{IEEE} J. Solid State Circuits},
volume = {57},
number = {1},
pages = {140--152},
year = {2022},
url = {https://doi.org/10.1109/JSSC.2021.3118046},
doi = {10.1109/JSSC.2021.3118046},
timestamp = {Tue, 25 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/SchmidtWWCOBHMF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccs/LeeCTLGVVSSA22,
author = {Dayeol Lee and
Kevin Cheang and
Alexander Thomas and
Catherine Lu and
Pranav Gaddamadugu and
Anjo Vahldiek{-}Oberwagner and
Mona Vij and
Dawn Song and
Sanjit A. Seshia and
Krste Asanovic},
editor = {Heng Yin and
Angelos Stavrou and
Cas Cremers and
Elaine Shi},
title = {Cerberus: {A} Formal Approach to Secure and Efficient Enclave Memory
Sharing},
booktitle = {Proceedings of the 2022 {ACM} {SIGSAC} Conference on Computer and
Communications Security, {CCS} 2022, Los Angeles, CA, USA, November
7-11, 2022},
pages = {1871--1885},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3548606.3560595},
doi = {10.1145/3548606.3560595},
timestamp = {Sat, 17 Dec 2022 01:15:29 +0100},
biburl = {https://dblp.org/rec/conf/ccs/LeeCTLGVVSSA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/LiewGW0KIWABN22,
author = {Harrison Liew and
Daniel Grubb and
John Wright and
Colin Schmidt and
Nayiri Krzysztofowicz and
Adam M. Izraelevitz and
Edward Wang and
Krste Asanovic and
Jonathan Bachrach and
Borivoje Nikolic},
editor = {Rob Oshana},
title = {Hammer: a modular and reusable physical design flow tool: invited},
booktitle = {{DAC} '22: 59th {ACM/IEEE} Design Automation Conference, San Francisco,
California, USA, July 10 - 14, 2022},
pages = {1335--1338},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3489517.3530672},
doi = {10.1145/3489517.3530672},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/LiewGW0KIWABN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2209-15253,
author = {Dayeol Lee and
Kevin Cheang and
Alexander Thomas and
Catherine Lu and
Pranav Gaddamadugu and
Anjo Vahldiek{-}Oberwagner and
Mona Vij and
Dawn Song and
Sanjit A. Seshia and
Krste Asanovic},
title = {Cerberus: {A} Formal Approach to Secure and Efficient Enclave Memory
Sharing},
journal = {CoRR},
volume = {abs/2209.15253},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2209.15253},
doi = {10.48550/ARXIV.2209.15253},
eprinttype = {arXiv},
eprint = {2209.15253},
timestamp = {Thu, 06 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2209-15253.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2211-02179,
author = {Kevin Cheang and
Cameron Rasmussen and
Dayeol Lee and
David W. Kohlbrenner and
Krste Asanovic and
Sanjit A. Seshia},
title = {Verifying {RISC-V} Physical Memory Protection},
journal = {CoRR},
volume = {abs/2211.02179},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2211.02179},
doi = {10.48550/ARXIV.2211.02179},
eprinttype = {arXiv},
eprint = {2211.02179},
timestamp = {Wed, 09 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2211-02179.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/HamLSSLBSAOW21,
author = {Tae Jun Ham and
Yejin Lee and
Seong Hoon Seo and
U. Gyeong Song and
Jae W. Lee and
David Bruns{-}Smith and
Brendan Sweeney and
Krste Asanovic and
Young H. Oh and
Lisa Wu Wills},
title = {Accelerating Genomic Data Analytics With Composable Hardware Acceleration
Framework},
journal = {{IEEE} Micro},
volume = {41},
number = {3},
pages = {42--49},
year = {2021},
url = {https://doi.org/10.1109/MM.2021.3072385},
doi = {10.1109/MM.2021.3072385},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/HamLSSLBSAOW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/BiancolinMKANBA21,
author = {David Biancolin and
Albert Magyar and
Sagar Karandikar and
Alon Amid and
Borivoje Nikolic and
Jonathan Bachrach and
Krste Asanovic},
title = {Accessible, {FPGA} Resource-Optimized Simulation of Multiclock Systems
in FireSim},
journal = {{IEEE} Micro},
volume = {41},
number = {4},
pages = {58--66},
year = {2021},
url = {https://doi.org/10.1109/MM.2021.3085537},
doi = {10.1109/MM.2021.3085537},
timestamp = {Tue, 13 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/BiancolinMKANBA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/GencKAHIPZGLMO021,
author = {Hasan Genc and
Seah Kim and
Alon Amid and
Ameer Haj{-}Ali and
Vighnesh Iyer and
Pranav Prakash and
Jerry Zhao and
Daniel Grubb and
Harrison Liew and
Howard Mao and
Albert J. Ou and
Colin Schmidt and
Samuel Steffl and
John Charles Wright and
Ion Stoica and
Jonathan Ragan{-}Kelley and
Krste Asanovic and
Borivoje Nikolic and
Yakun Sophia Shao},
title = {Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation
via Full-Stack Integration},
booktitle = {58th {ACM/IEEE} Design Automation Conference, {DAC} 2021, San Francisco,
CA, USA, December 5-9, 2021},
pages = {769--774},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DAC18074.2021.9586216},
doi = {10.1109/DAC18074.2021.9586216},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/GencKAHIPZGLMO021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/GonzalezZKG0WBA21,
author = {Abraham Gonzalez and
Jerry Zhao and
Ben Korpan and
Hasan Genc and
Colin Schmidt and
John Charles Wright and
Ayan Biswas and
Alon Amid and
Farhana Sheikh and
Anton Sorokin and
Sirisha Kale and
Mani Yalamanchi and
Ramya Yarlagadda and
Mark Flannigan and
Larry Abramowitz and
Elad Alon and
Yakun Sophia Shao and
Krste Asanovic and
Borivoje Nikolic},
title = {A 16mm\({}^{\mbox{2}}\) 106.1 {GOPS/W} Heterogeneous {RISC-V} Multi-Core
Multi-Accelerator SoC in Low-Power 22nm FinFET},
booktitle = {47th {ESSCIRC} 2021 - European Solid State Circuits Conference, {ESSCIR}
2021, Grenoble, France, September 13-22, 2021},
pages = {259--262},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ESSCIRC53450.2021.9567768},
doi = {10.1109/ESSCIRC53450.2021.9567768},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/esscirc/GonzalezZKG0WBA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AmidOASN21,
author = {Alon Amid and
Albert J. Ou and
Krste Asanovic and
Yakun Sophia Shao and
Borivoje Nikolic},
title = {Vertically Integrated Computing Labs Using Open-Source Hardware Generators
and Cloud-Hosted FPGAs},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021,
Daegu, South Korea, May 22-28, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCAS51556.2021.9401515},
doi = {10.1109/ISCAS51556.2021.9401515},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AmidOASN21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/ZhaoGAKA21,
author = {Jerry Zhao and
Abraham Gonzalez and
Alon Amid and
Sagar Karandikar and
Krste Asanovic},
title = {{COBRA:} {A} Framework for Evaluating Compositions of Hardware Branch
Predictors},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2021, Stony Brook, NY, USA, March 28-30, 2021},
pages = {310--320},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISPASS51385.2021.00053},
doi = {10.1109/ISPASS51385.2021.00053},
timestamp = {Wed, 05 May 2021 09:46:27 +0200},
biburl = {https://dblp.org/rec/conf/ispass/ZhaoGAKA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SchmidtWWCOBHFR21,
author = {Colin Schmidt and
John Charles Wright and
Zhongkai Wang and
Eric Chang and
Albert J. Ou and
Woo{-}Rham Bae and
Sean Huang and
Anita Flynn and
Brian C. Richards and
Krste Asanovic and
Elad Alon and
Borivoje Nikolic},
title = {4.3 An Eight-Core 1.44GHz {RISC-V} Vector Machine in 16nm FinFET},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {58--60},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9365789},
doi = {10.1109/ISSCC42613.2021.9365789},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/SchmidtWWCOBHFR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KarandikarLKZPN21,
author = {Sagar Karandikar and
Chris Leary and
Chris Kennelly and
Jerry Zhao and
Dinesh Parimi and
Borivoje Nikolic and
Krste Asanovic and
Parthasarathy Ranganathan},
title = {A Hardware Accelerator for Protocol Buffers},
booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,
Virtual Event, Greece, October 18-22, 2021},
pages = {462--478},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3466752.3480051},
doi = {10.1145/3466752.3480051},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/KarandikarLKZPN21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieeesp/KohlbrennerSLAS20,
author = {David Kohlbrenner and
Shweta Shinde and
Dayeol Lee and
Krste Asanovic and
Dawn Song},
title = {Building Open Trusted Execution Environments},
journal = {{IEEE} Secur. Priv.},
volume = {18},
number = {5},
pages = {47--56},
year = {2020},
url = {https://doi.org/10.1109/MSEC.2020.2990649},
doi = {10.1109/MSEC.2020.2990649},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieeesp/KohlbrennerSLAS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/AmidBGGKLMMOPRS20,
author = {Alon Amid and
David Biancolin and
Abraham Gonzalez and
Daniel Grubb and
Sagar Karandikar and
Harrison Liew and
Albert Magyar and
Howard Mao and
Albert J. Ou and
Nathan Pemberton and
Paul Rigge and
Colin Schmidt and
John Charles Wright and
Jerry Zhao and
Yakun Sophia Shao and
Krste Asanovic and
Borivoje Nikolic},
title = {Chipyard: Integrated Design, Simulation, and Implementation Framework
for Custom SoCs},
journal = {{IEEE} Micro},
volume = {40},
number = {4},
pages = {10--21},
year = {2020},
url = {https://doi.org/10.1109/MM.2020.2996616},
doi = {10.1109/MM.2020.2996616},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/AmidBGGKLMMOPRS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/WrightSKDKIMCBA20,
author = {John Charles Wright and
Colin Schmidt and
Ben Keller and
Daniel Palmer Dabbelt and
Jaehwa Kwak and
Vighnesh Iyer and
Nandish Mehta and
Pi{-}Feng Chiu and
Stevo Bailey and
Krste Asanovic and
Borivoje Nikolic},
title = {A Dual-Core {RISC-V} Vector Processor With On-Chip Fine-Grain Power
Management in 28-nm {FD-SOI}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {28},
number = {12},
pages = {2721--2725},
year = {2020},
url = {https://doi.org/10.1109/TVLSI.2020.3030243},
doi = {10.1109/TVLSI.2020.3030243},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/WrightSKDKIMCBA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/KarandikarOAMKN20,
author = {Sagar Karandikar and
Albert J. Ou and
Alon Amid and
Howard Mao and
Randy H. Katz and
Borivoje Nikolic and
Krste Asanovic},
editor = {James R. Larus and
Luis Ceze and
Karin Strauss},
title = {FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance
Profiling and Co-Design},
booktitle = {{ASPLOS} '20: Architectural Support for Programming Languages and
Operating Systems, Lausanne, Switzerland, March 16-20, 2020},
pages = {715--731},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3373376.3378455},
doi = {10.1145/3373376.3378455},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/KarandikarOAMKN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cgo/Haj-AliAWSAS20,
author = {Ameer Haj{-}Ali and
Nesreen K. Ahmed and
Theodore L. Willke and
Yakun Sophia Shao and
Krste Asanovic and
Ion Stoica},
title = {NeuroVectorizer: end-to-end vectorization with deep reinforcement
learning},
booktitle = {{CGO} '20: 18th {ACM/IEEE} International Symposium on Code Generation
and Optimization, San Diego, CA, USA, February, 2020},
pages = {242--255},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3368826.3377928},
doi = {10.1145/3368826.3377928},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cgo/Haj-AliAWSAS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/DuranWGHAKAGRFF20,
author = {Ckristian Duran and
Megan Wachs and
Luis E. Rueda G. and
Albert Huntington and
Javier Ardila and
Jack Kang and
Andres Amaya and
H{\'{e}}ctor G{\'{o}}mez and
Juan Romero and
Laude Fernandez and
Felipe Flechas and
Rolando Torres and
Juan Sebastian Moya and
Wilmer Ramirez and
Julian Arenas and
Juan Gomez and
Hanssel Morales and
Camilo Rojas and
Alex Mantilla and
Elkim Roa and
Krste Asanovic},
title = {An Energy-Efficient {RISC-V} {RV32IMAC} Microcontroller for Periodical-Driven
Sensing Applications},
booktitle = {2020 {IEEE} Custom Integrated Circuits Conference, {CICC} 2020, Boston,
MA, USA, March 22-25, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/CICC48029.2020.9075877},
doi = {10.1109/CICC48029.2020.9075877},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/DuranWGHAKAGRFF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AmidBGGKLMMOPR020,
author = {Alon Amid and
David Biancolin and
Abraham Gonzalez and
Daniel Grubb and
Sagar Karandikar and
Harrison Liew and
Albert Magyar and
Howard Mao and
Albert J. Ou and
Nathan Pemberton and
Paul Rigge and
Colin Schmidt and
John Charles Wright and
Jerry Zhao and
Jonathan Bachrach and
Yakun Sophia Shao and
Borivoje Nikolic and
Krste Asanovic},
title = {Invited: Chipyard - An Integrated SoC Research and Implementation
Environment},
booktitle = {57th {ACM/IEEE} Design Automation Conference, {DAC} 2020, San Francisco,
CA, USA, July 20-24, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DAC18072.2020.9218756},
doi = {10.1109/DAC18072.2020.9218756},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/AmidBGGKLMMOPR020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurosys/LeeKSAS20,
author = {Dayeol Lee and
David Kohlbrenner and
Shweta Shinde and
Krste Asanovic and
Dawn Song},
editor = {Angelos Bilas and
Kostas Magoutis and
Evangelos P. Markatos and
Dejan Kostic and
Margo I. Seltzer},
title = {Keystone: an open framework for architecting trusted execution environments},
booktitle = {EuroSys '20: Fifteenth EuroSys Conference 2020, Heraklion, Greece,
April 27-30, 2020},
pages = {38:1--38:16},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3342195.3387532},
doi = {10.1145/3342195.3387532},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eurosys/LeeKSAS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HamBSLSSOALW20,
author = {Tae Jun Ham and
David Bruns{-}Smith and
Brendan Sweeney and
Yejin Lee and
Seong Hoon Seo and
U. Gyeong Song and
Young H. Oh and
Krste Asanovic and
Jae W. Lee and
Lisa Wu Wills},
title = {Genesis: {A} Hardware Acceleration Framework for Genomic Data Analysis},
booktitle = {47th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020},
pages = {254--267},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCA45697.2020.00031},
doi = {10.1109/ISCA45697.2020.00031},
timestamp = {Mon, 19 Feb 2024 07:32:24 +0100},
biburl = {https://dblp.org/rec/conf/isca/HamBSLSSOALW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mlsys/Haj-AliHMXAWS20,
author = {Ameer Haj{-}Ali and
Qijing (Jenny) Huang and
William S. Moses and
John Xiang and
Krste Asanovic and
John Wawrzynek and
Ion Stoica},
editor = {Inderjit S. Dhillon and
Dimitris S. Papailiopoulos and
Vivienne Sze},
title = {AutoPhase: Juggling {HLS} Phase Orderings in Random Forests with Deep
Reinforcement Learning},
booktitle = {Proceedings of Machine Learning and Systems 2020, MLSys 2020, Austin,
TX, USA, March 2-4, 2020},
publisher = {mlsys.org},
year = {2020},
url = {https://proceedings.mlsys.org/book/292.pdf},
timestamp = {Fri, 21 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mlsys/Haj-AliHMXAWS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/netsoft/Li00TIZHZHSA20,
author = {Bin Li and
Yipeng Wang and
Ren Wang and
Charlie Tai and
Ravi R. Iyer and
Zhu Zhou and
Andrew Herdrich and
Tong Zhang and
Ameer Haj{-}Ali and
Ion Stoica and
Krste Asanovic},
editor = {Filip De Turck and
Prosper Chemouil and
Tim Wauters and
Mohamed Faten Zhani and
Walter Cerroni and
Rafael Pasquini and
Zuqing Zhu},
title = {{RLDRM:} Closed Loop Dynamic Cache Allocation with Deep Reinforcement
Learning for Network Function Virtualization},
booktitle = {6th {IEEE} Conference on Network Softwarization, NetSoft 2020, Ghent,
Belgium, June 29 - July 3, 2020},
pages = {335--343},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/NetSoft48620.2020.9165471},
doi = {10.1109/NETSOFT48620.2020.9165471},
timestamp = {Mon, 15 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/netsoft/Li00TIZHZHSA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2003-00671,
author = {Qijing Huang and
Ameer Haj{-}Ali and
William S. Moses and
John Xiang and
Ion Stoica and
Krste Asanovic and
John Wawrzynek},
title = {AutoPhase: Juggling {HLS} Phase Orderings in Random Forests with Deep
Reinforcement Learning},
journal = {CoRR},
volume = {abs/2003.00671},
year = {2020},
url = {https://arxiv.org/abs/2003.00671},
eprinttype = {arXiv},
eprint = {2003.00671},
timestamp = {Fri, 21 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2003-00671.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2005-13685,
author = {Ameer Haj{-}Ali and
Hasan Genc and
Qijing Huang and
William S. Moses and
John Wawrzynek and
Krste Asanovic and
Ion Stoica},
title = {ProTuner: Tuning Programs with Monte Carlo Tree Search},
journal = {CoRR},
volume = {abs/2005.13685},
year = {2020},
url = {https://arxiv.org/abs/2005.13685},
eprinttype = {arXiv},
eprint = {2005.13685},
timestamp = {Fri, 21 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2005-13685.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/AmidKGWAK19,
author = {Alon Amid and
Kiseok Kwon and
Amir Gholami and
Bichen Wu and
Krste Asanovic and
Kurt Keutzer},
title = {Co-design of deep neural nets and neural net accelerators for embedded
vision applications},
journal = {{IBM} J. Res. Dev.},
volume = {63},
number = {6},
pages = {6:1--6:14},
year = {2019},
url = {https://doi.org/10.1147/JRD.2019.2942284},
doi = {10.1147/JRD.2019.2942284},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/AmidKGWAK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/CelioCANP19,
author = {Christopher Celio and
Pi{-}Feng Chiu and
Krste Asanovic and
Borivoje Nikolic and
David A. Patterson},
title = {{BROOM:} An Open-Source Out-of-Order Processor With Resilient Low-Voltage
Operation in 28-nm {CMOS}},
journal = {{IEEE} Micro},
volume = {39},
number = {2},
pages = {52--60},
year = {2019},
url = {https://doi.org/10.1109/MM.2019.2897782},
doi = {10.1109/MM.2019.2897782},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/CelioCANP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/MaasAK19,
author = {Martin Maas and
Krste Asanovic and
John Kubiatowicz},
title = {A Hardware Accelerator for Tracing Garbage Collection},
journal = {{IEEE} Micro},
volume = {39},
number = {3},
pages = {38--46},
year = {2019},
url = {https://doi.org/10.1109/MM.2019.2910509},
doi = {10.1109/MM.2019.2910509},
timestamp = {Fri, 08 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/MaasAK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/KarandikarMKBAL19,
author = {Sagar Karandikar and
Howard Mao and
Donggyu Kim and
David Biancolin and
Alon Amid and
Dayeol Lee and
Nathan Pemberton and
Emmanuel Amaro and
Colin Schmidt and
Aditya Chopra and
Qijing Huang and
Kyle Kovacs and
Borivoje Nikolic and
Randy Howard Katz and
Jonathan Bachrach and
Krste Asanovic},
title = {FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation
in the Public Cloud},
journal = {{IEEE} Micro},
volume = {39},
number = {3},
pages = {56--65},
year = {2019},
url = {https://doi.org/10.1109/MM.2019.2910175},
doi = {10.1109/MM.2019.2910175},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/KarandikarMKBAL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AlonABN19,
author = {Elad Alon and
Krste Asanovic and
Jonathan Bachrach and
Borivoje Nikolic},
title = {Open-Source {EDA} Tools and IP, {A} View from the Trenches},
booktitle = {Proceedings of the 56th Annual Design Automation Conference 2019,
{DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019},
pages = {79},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3316781.3323481},
doi = {10.1145/3316781.3323481},
timestamp = {Sun, 08 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/AlonABN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LebedevHDKLASD19,
author = {Ilia A. Lebedev and
Kyle Hogan and
Jules Drean and
David Kohlbrenner and
Dayeol Lee and
Krste Asanovic and
Dawn Song and
Srinivas Devadas},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {Sanctorum: {A} lightweight security monitor for secure enclaves},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {1142--1147},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8715182},
doi = {10.23919/DATE.2019.8715182},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/LebedevHDKLASD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/HuangHMXSAW19,
author = {Qijing Huang and
Ameer Haj{-}Ali and
William S. Moses and
John Xiang and
Ion Stoica and
Krste Asanovic and
John Wawrzynek},
title = {AutoPhase: Compiler Phase-Ordering for {HLS} with Deep Reinforcement
Learning},
booktitle = {27th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2019, San Diego, CA, USA, April 28 - May
1, 2019},
pages = {308},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FCCM.2019.00049},
doi = {10.1109/FCCM.2019.00049},
timestamp = {Fri, 21 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fccm/HuangHMXSAW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BiancolinKKKWBA19,
author = {David Biancolin and
Sagar Karandikar and
Donggyu Kim and
Jack Koenig and
Andrew Waterman and
Jonathan Bachrach and
Krste Asanovic},
editor = {Kia Bazargan and
Stephen Neuendorffer},
title = {{FASED:} FPGA-Accelerated Simulation and Evaluation of {DRAM}},
booktitle = {Proceedings of the 2019 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2019, Seaside, CA, USA, February 24-26, 2019},
pages = {330--339},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3289602.3293894},
doi = {10.1145/3289602.3293894},
timestamp = {Tue, 05 Mar 2019 07:04:43 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BiancolinKKKWBA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WuBNHKLLMSAPJ19,
author = {Lisa Wu and
David Bruns{-}Smith and
Frank A. Nothaft and
Qijing Huang and
Sagar Karandikar and
Johnny Le and
Andrew Lin and
Howard Mao and
Brendan Sweeney and
Krste Asanovic and
David A. Patterson and
Anthony D. Joseph},
title = {{FPGA} Accelerated {INDEL} Realignment in the Cloud},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {277--290},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00044},
doi = {10.1109/HPCA.2019.00044},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/WuBNHKLLMSAPJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HuangYKPBMDQAW19,
author = {Qijing Huang and
Christopher Yarp and
Sagar Karandikar and
Nathan Pemberton and
Benjamin Brock and
Liang Ma and
Guohao Dai and
Robert Quitt and
Krste Asanovic and
John Wawrzynek},
editor = {David Z. Pan},
title = {Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator
SoCs using FPGA-Acceleration},
booktitle = {Proceedings of the International Conference on Computer-Aided Design,
{ICCAD} 2019, Westminster, CO, USA, November 4-7, 2019},
pages = {1--8},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1109/ICCAD45719.2019.8942048},
doi = {10.1109/ICCAD45719.2019.8942048},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/HuangYKPBMDQAW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/MagyarBKSBA19,
author = {Albert Magyar and
David Biancolin and
John Koenig and
Sanjit Seshia and
Jonathan Bachrach and
Krste Asanovic},
editor = {David Z. Pan},
title = {Golden Gate: Bridging The Resource-Efficiency Gap Between ASICs and
{FPGA} Prototypes},
booktitle = {Proceedings of the International Conference on Computer-Aided Design,
{ICCAD} 2019, Westminster, CO, USA, November 4-7, 2019},
pages = {1--8},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1109/ICCAD45719.2019.8942087},
doi = {10.1109/ICCAD45719.2019.8942087},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/MagyarBKSBA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KimZBA19,
author = {Donggyu Kim and
Jerry Zhao and
Jonathan Bachrach and
Krste Asanovic},
title = {Simmani: Runtime Power Modeling for Arbitrary {RTL} with Automatic
Signal Selection},
booktitle = {Proceedings of the 52nd Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2019, Columbus, OH, USA, October 12-16,
2019},
pages = {1050--1062},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3352460.3358322},
doi = {10.1145/3352460.3358322},
timestamp = {Wed, 16 Oct 2019 09:55:30 +0200},
biburl = {https://dblp.org/rec/conf/micro/KimZBA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1901-04615,
author = {Ameer Haj Ali and
Qijing Huang and
William S. Moses and
John Xiang and
Ion Stoica and
Krste Asanovic and
John Wawrzynek},
title = {AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep
Reinforcement Learning},
journal = {CoRR},
volume = {abs/1901.04615},
year = {2019},
url = {http://arxiv.org/abs/1901.04615},
eprinttype = {arXiv},
eprint = {1901.04615},
timestamp = {Fri, 21 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1901-04615.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1907-10119,
author = {Dayeol Lee and
David Kohlbrenner and
Shweta Shinde and
Dawn Song and
Krste Asanovic},
title = {Keystone: {A} Framework for Architecting TEEs},
journal = {CoRR},
volume = {abs/1907.10119},
year = {2019},
url = {http://arxiv.org/abs/1907.10119},
eprinttype = {arXiv},
eprint = {1907.10119},
timestamp = {Thu, 01 Aug 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1907-10119.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1908-01275,
author = {Ameer Haj{-}Ali and
Nesreen K. Ahmed and
Theodore L. Willke and
Joseph Gonzalez and
Krste Asanovic and
Ion Stoica},
title = {Deep Reinforcement Learning in System Optimization},
journal = {CoRR},
volume = {abs/1908.01275},
year = {2019},
url = {http://arxiv.org/abs/1908.01275},
eprinttype = {arXiv},
eprint = {1908.01275},
timestamp = {Thu, 30 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1908-01275.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1909-13639,
author = {Ameer Haj{-}Ali and
Nesreen K. Ahmed and
Theodore L. Willke and
Yakun Sophia Shao and
Krste Asanovic and
Ion Stoica},
title = {NeuroVectorizer: End-to-End Vectorization with Deep Reinforcement
Learning},
journal = {CoRR},
volume = {abs/1909.13639},
year = {2019},
url = {http://arxiv.org/abs/1909.13639},
eprinttype = {arXiv},
eprint = {1909.13639},
timestamp = {Wed, 04 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1909-13639.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1911-09925,
author = {Hasan Genc and
Ameer Haj{-}Ali and
Vighnesh Iyer and
Alon Amid and
Howard Mao and
John Charles Wright and
Colin Schmidt and
Jerry Zhao and
Albert J. Ou and
Max Banister and
Yakun Sophia Shao and
Borivoje Nikolic and
Ion Stoica and
Krste Asanovic},
title = {Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations
of Deep-Learning Architectures},
journal = {CoRR},
volume = {abs/1911.09925},
year = {2019},
url = {http://arxiv.org/abs/1911.09925},
eprinttype = {arXiv},
eprint = {1911.09925},
timestamp = {Wed, 05 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1911-09925.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/LebedevHDKLASD19,
author = {Ilia A. Lebedev and
Kyle Hogan and
Jules Drean and
David Kohlbrenner and
Dayeol Lee and
Krste Asanovic and
Dawn Song and
Srinivas Devadas},
title = {Sanctorum: {A} lightweight security monitor for secure enclaves},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {1},
year = {2019},
url = {https://eprint.iacr.org/2019/001},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/LebedevHDKLASD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KwonAGWAK18,
author = {Kiseok Kwon and
Alon Amid and
Amir Gholami and
Bichen Wu and
Krste Asanovic and
Kurt Keutzer},
title = {Co-design of deep neural nets and neural net accelerators for embedded
vision applications},
booktitle = {Proceedings of the 55th Annual Design Automation Conference, {DAC}
2018, San Francisco, CA, USA, June 24-29, 2018},
pages = {148:1--148:6},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3195970.3199849},
doi = {10.1145/3195970.3199849},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/KwonAGWAK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/NikolicAA18,
author = {Borivoje Nikolic and
Elad Alon and
Krste Asanovic},
title = {Generating the Next Wave of Custom Silicon},
booktitle = {44th {IEEE} European Solid State Circuits Conference, {ESSCIRC} 2018,
Dresden, Germany, September 3-6, 2018},
pages = {6--11},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ESSCIRC.2018.8494310},
doi = {10.1109/ESSCIRC.2018.8494310},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/esscirc/NikolicAA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KimCKBBA18,
author = {Donggyu Kim and
Christopher Celio and
Sagar Karandikar and
David Biancolin and
Jonathan Bachrach and
Krste Asanovic},
title = {{DESSERT:} Debugging {RTL} Effectively with State Snapshotting for
Error Replays across Trillions of Cycles},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {76--80},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00021},
doi = {10.1109/FPL.2018.00021},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KimCKBBA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KarandikarMKBAL18,
author = {Sagar Karandikar and
Howard Mao and
Donggyu Kim and
David Biancolin and
Alon Amid and
Dayeol Lee and
Nathan Pemberton and
Emmanuel Amaro and
Colin Schmidt and
Aditya Chopra and
Qijing Huang and
Kyle Kovacs and
Borivoje Nikolic and
Randy H. Katz and
Jonathan Bachrach and
Krste Asanovic},
editor = {Murali Annavaram and
Timothy Mark Pinkston and
Babak Falsafi},
title = {FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation
in the Public Cloud},
booktitle = {45th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2018, Los Angeles, CA, USA, June 1-6, 2018},
pages = {29--42},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ISCA.2018.00014},
doi = {10.1109/ISCA.2018.00014},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/KarandikarMKBAL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/MaasAK18,
author = {Martin Maas and
Krste Asanovic and
John Kubiatowicz},
editor = {Murali Annavaram and
Timothy Mark Pinkston and
Babak Falsafi},
title = {A Hardware Accelerator for Tracing Garbage Collection},
booktitle = {45th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2018, Los Angeles, CA, USA, June 1-6, 2018},
pages = {138--151},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ISCA.2018.00022},
doi = {10.1109/ISCA.2018.00022},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/MaasAK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChiuCAPN18,
author = {Pi{-}Feng Chiu and
Christopher Celio and
Krste Asanovic and
David A. Patterson and
Borivoje Nikolic},
title = {An Out-of-Order {RISC-V} Processor with Resilient Low-Voltage Operation
in 28NM {CMOS}},
booktitle = {2018 {IEEE} Symposium on {VLSI} Circuits, Honolulu, HI, USA, June
18-22, 2018},
pages = {61--62},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/VLSIC.2018.8502320},
doi = {10.1109/VLSIC.2018.8502320},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ChiuCAPN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1804-10642,
author = {Kiseok Kwon and
Alon Amid and
Amir Gholami and
Bichen Wu and
Krste Asanovic and
Kurt Keutzer},
title = {Co-Design of Deep Neural Nets and Neural Net Accelerators for Embedded
Vision Applications},
journal = {CoRR},
volume = {abs/1804.10642},
year = {2018},
url = {http://arxiv.org/abs/1804.10642},
eprinttype = {arXiv},
eprint = {1804.10642},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1804-10642.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1812-10605,
author = {Ilia A. Lebedev and
Kyle Hogan and
Jules Drean and
David Kohlbrenner and
Dayeol Lee and
Krste Asanovic and
Dawn Song and
Srinivas Devadas},
title = {Sanctorum: {A} lightweight security monitor for secure enclaves},
journal = {CoRR},
volume = {abs/1812.10605},
year = {2018},
url = {http://arxiv.org/abs/1812.10605},
eprinttype = {arXiv},
eprint = {1812.10605},
timestamp = {Thu, 03 Jan 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1812-10605.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/KellerCZKPLBBCD17,
author = {Ben Keller and
Martin Cochet and
Brian Zimmer and
Jaehwa Kwak and
Alberto Puggelli and
Yunsup Lee and
Milovan Blagojevic and
Stevo Bailey and
Pi{-}Feng Chiu and
Daniel Palmer Dabbelt and
Colin Schmidt and
Elad Alon and
Krste Asanovic and
Borivoje Nikolic},
title = {A {RISC-V} Processor SoC With Integrated Power Management at Submicrosecond
Timescales in 28 nm {FD-SOI}},
journal = {{IEEE} J. Solid State Circuits},
volume = {52},
number = {7},
pages = {1863--1875},
year = {2017},
url = {https://doi.org/10.1109/JSSC.2017.2690859},
doi = {10.1109/JSSC.2017.2690859},
timestamp = {Sat, 11 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/KellerCZKPLBBCD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ZimmerCNA17,
author = {Brian Zimmer and
Pi{-}Feng Chiu and
Borivoje Nikolic and
Krste Asanovic},
title = {Reprogrammable Redundancy for SRAM-Based Cache V\({}_{\mbox{min}}\)
Reduction in a 28-nm {RISC-V} Processor},
journal = {{IEEE} J. Solid State Circuits},
volume = {52},
number = {10},
pages = {2589--2600},
year = {2017},
url = {https://doi.org/10.1109/JSSC.2017.2715798},
doi = {10.1109/JSSC.2017.2715798},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/ZimmerCNA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/KoenigBBA17,
author = {Jack Koenig and
David Biancolin and
Jonathan Bachrach and
Krste Asanovic},
editor = {Neil Burgess and
Javier D. Bruguera and
Florent de Dinechin},
title = {A Hardware Accelerator for Computing an Exact Dot Product},
booktitle = {24th {IEEE} Symposium on Computer Arithmetic, {ARITH} 2017, London,
United Kingdom, July 24-26, 2017},
pages = {114--121},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ARITH.2017.38},
doi = {10.1109/ARITH.2017.38},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/KoenigBBA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotos/MaasAK17,
author = {Martin Maas and
Krste Asanovic and
John Kubiatowicz},
editor = {Alexandra Fedorova and
Andrew Warfield and
Ivan Beschastnikh and
Rachit Agarwal},
title = {Return of the Runtimes: Rethinking the Language Runtime System for
the Cloud 3.0 Era},
booktitle = {Proceedings of the 16th Workshop on Hot Topics in Operating Systems,
HotOS 2017, Whistler, BC, Canada, May 8-10, 2017},
pages = {138--143},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3102980.3103003},
doi = {10.1145/3102980.3103003},
timestamp = {Fri, 08 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hotos/MaasAK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BachrachMDLLA17,
author = {Jonathan Bachrach and
Albert Magyar and
Daniel Palmer Dabbelt and
Patrick Li and
Richard Lin and
Krste Asanovic},
editor = {Sri Parameswaran},
title = {Cyclist: Accelerating hardware development},
booktitle = {2017 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 2017, Irvine, CA, USA, November 13-16, 2017},
pages = {1011--1018},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ICCAD.2017.8203892},
doi = {10.1109/ICCAD.2017.8203892},
timestamp = {Sat, 11 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/BachrachMDLLA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/BeamerAP17,
author = {Scott Beamer and
Krste Asanovic and
David A. Patterson},
title = {Reducing Pagerank Communication via Propagation Blocking},
booktitle = {2017 {IEEE} International Parallel and Distributed Processing Symposium,
{IPDPS} 2017, Orlando, FL, USA, May 29 - June 2, 2017},
pages = {820--831},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/IPDPS.2017.112},
doi = {10.1109/IPDPS.2017.112},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ipps/BeamerAP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ofc/SunWLOAGWSALMKP17,
author = {Chen Sun and
Mark T. Wade and
Yunsup Lee and
Jason S. Orcutt and
Luca Alloatti and
Michael S. Georgas and
Andrew S. Waterman and
Jeffrey M. Shainline and
Rimas R. Avizienis and
Sen Lin and
Benjamin R. Moss and
Rajesh Kumar and
Fabio Pavanello and
Amir H. Atabaki and
Henry M. Cook and
Albert J. Ou and
Jonathan C. Leu and
Yu{-}Hsin Chen and
Krste Asanovic and
Rajeev J. Ram and
Milos A. Popovic and
Vladimir Marko Stojanovic},
title = {Microprocessor chip with photonic {I/O}},
booktitle = {Optical Fiber Communications Conference and Exhibition, {OFC} 2017,
Los Angeles, CA, USA, March 19-23, 2017},
pages = {1--3},
publisher = {{IEEE}},
year = {2017},
url = {https://ieeexplore.ieee.org/xpl/freeabs\_all.jsp?arnumber=7937291},
timestamp = {Tue, 08 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ofc/SunWLOAGWSALMKP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/BulucBMAP17,
author = {Aydin Bulu{\c{c}} and
Scott Beamer and
Kamesh Madduri and
Krste Asanovic and
David A. Patterson},
title = {Distributed-Memory Breadth-First Search on Massive Graphs},
journal = {CoRR},
volume = {abs/1705.04590},
year = {2017},
url = {http://arxiv.org/abs/1705.04590},
eprinttype = {arXiv},
eprint = {1705.04590},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/BulucBMAP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ZimmerLPKJKBBCL16,
author = {Brian Zimmer and
Yunsup Lee and
Alberto Puggelli and
Jaehwa Kwak and
Ruzica Jevtic and
Ben Keller and
Steven Bailey and
Milovan Blagojevic and
Pi{-}Feng Chiu and
Hanh{-}Phuc Le and
Po{-}Hung Chen and
Nicholas Sutardja and
Rimas Avizienis and
Andrew Waterman and
Brian C. Richards and
Philippe Flatresse and
Elad Alon and
Krste Asanovic and
Borivoje Nikolic},
title = {A {RISC-V} Vector Processor With Simultaneous-Switching Switched-Capacitor
{DC-DC} Converters in 28 nm {FDSOI}},
journal = {{IEEE} J. Solid State Circuits},
volume = {51},
number = {4},
pages = {930--942},
year = {2016},
url = {https://doi.org/10.1109/JSSC.2016.2519386},
doi = {10.1109/JSSC.2016.2519386},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/ZimmerLPKJKBBCL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/LeeWCZKPKJBBCAR16,
author = {Yunsup Lee and
Andrew Waterman and
Henry Cook and
Brian Zimmer and
Ben Keller and
Alberto Puggelli and
Jaehwa Kwak and
Ruzica Jevtic and
Stevo Bailey and
Milovan Blagojevic and
Pi{-}Feng Chiu and
Rimas Avizienis and
Brian C. Richards and
Jonathan Bachrach and
David A. Patterson and
Elad Alon and
Bora Nikolic and
Krste Asanovic},
title = {An Agile Approach to Building {RISC-V} Microprocessors},
journal = {{IEEE} Micro},
volume = {36},
number = {2},
pages = {8--20},
year = {2016},
url = {https://doi.org/10.1109/MM.2016.11},
doi = {10.1109/MM.2016.11},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/LeeWCZKPKJBBCAR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/MaasA0K16,
author = {Martin Maas and
Krste Asanovic and
Tim Harris and
John Kubiatowicz},
editor = {Tom Conte and
Yuanyuan Zhou},
title = {Taurus: {A} Holistic Language Runtime System for Coordinating Distributed
Managed-Language Applications},
booktitle = {Proceedings of the Twenty-First International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2016, Atlanta, GA, USA, April 2-6, 2016},
pages = {457--471},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2872362.2872386},
doi = {10.1145/2872362.2872386},
timestamp = {Wed, 07 Jul 2021 13:23:08 +0200},
biburl = {https://dblp.org/rec/conf/asplos/MaasA0K16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ZimmerCNA16,
author = {Brian Zimmer and
Pi{-}Feng Chiu and
Borivoje Nikolic and
Krste Asanovic},
title = {Reprogrammable redundancy for cache Vmin reduction in a 28nm {RISC-V}
processor},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {121--124},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844150},
doi = {10.1109/ASSCC.2016.7844150},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ZimmerCNA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/KellerCZLBKPBCD16,
author = {Ben Keller and
Martin Cochet and
Brian Zimmer and
Yunsup Lee and
Milovan Blagojevic and
Jaehwa Kwak and
Alberto Puggelli and
Stevo Bailey and
Pi{-}Feng Chiu and
Daniel Palmer Dabbelt and
Colin Schmidt and
Elad Alon and
Krste Asanovic and
Borivoje Nikolic},
title = {Sub-microsecond adaptive voltage scaling in a 28nm {FD-SOI} processor
SoC},
booktitle = {{ESSCIRC} Conference 2016: 42\({}^{\mbox{nd}}\) European Solid-State
Circuits Conference, Lausanne, Switzerland, September 12-15, 2016},
pages = {269--272},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ESSCIRC.2016.7598294},
doi = {10.1109/ESSCIRC.2016.7598294},
timestamp = {Sat, 11 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/KellerCZLBKPBCD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/DabbeltSLMKA16,
author = {Daniel Palmer Dabbelt and
Colin Schmidt and
Eric Love and
Howard Mao and
Sagar Karandikar and
Krste Asanovic},
title = {Vector Processors for Energy-Efficient Embedded Systems},
booktitle = {Proceedings of the Fourth {ACM} International Workshop on Many-core
Embedded Systems, MES@ISCA 2016, Seoul, Republic of Korea, June 19,
2016},
pages = {10--16},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2934495.2934497},
doi = {10.1145/2934495.2934497},
timestamp = {Sat, 11 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/DabbeltSLMKA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KimICKZLBA16,
author = {Donggyu Kim and
Adam M. Izraelevitz and
Christopher Celio and
Hokeun Kim and
Brian Zimmer and
Yunsup Lee and
Jonathan Bachrach and
Krste Asanovic},
title = {Strober: Fast and Accurate Sample-Based Energy Simulation for Arbitrary
{RTL}},
booktitle = {43rd {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2016, Seoul, South Korea, June 18-22, 2016},
pages = {128--139},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISCA.2016.21},
doi = {10.1109/ISCA.2016.21},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/KimICKZLBA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/CelioDPA16,
author = {Christopher Celio and
Daniel Palmer Dabbelt and
David A. Patterson and
Krste Asanovic},
title = {The Renewed Case for the Reduced Instruction Set Computer: Avoiding
{ISA} Bloat with Macro-Op Fusion for {RISC-V}},
journal = {CoRR},
volume = {abs/1607.02318},
year = {2016},
url = {http://arxiv.org/abs/1607.02318},
eprinttype = {arXiv},
eprint = {1607.02318},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/CelioDPA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/nature/SunWLOAGWSALMKP15,
author = {Chen Sun and
Mark T. Wade and
Yunsup Lee and
Jason S. Orcutt and
Luca Alloatti and
Michael Georgas and
Andrew Waterman and
Jeffrey M. Shainline and
Rimas Avizienis and
Sen Lin and
Benjamin Moss and
Rajesh Kumar and
Fabio Pavanello and
Amir H. Atabaki and
Henry Cook and
Albert J. Ou and
Jonathan C. Leu and
Yu{-}Hsin Chen and
Krste Asanovic and
Rajeev J. Ram and
Milos A. Popovic and
Vladimir Marko Stojanovic},
title = {Single-chip microprocessor that communicates directly using light},
journal = {Nat.},
volume = {528},
number = {7581},
pages = {534--538},
year = {2015},
url = {https://doi.org/10.1038/nature16454},
doi = {10.1038/NATURE16454},
timestamp = {Tue, 08 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/nature/SunWLOAGWSALMKP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/JevticLBBAAN15,
author = {Ruzica Jevtic and
Hanh{-}Phuc Le and
Milovan Blagojevic and
Stevo Bailey and
Krste Asanovic and
Elad Alon and
Borivoje Nikolic},
title = {Per-Core {DVFS} With Switched-Capacitor Converters for Energy Efficiency
in Manycore Processors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {23},
number = {4},
pages = {723--730},
year = {2015},
url = {https://doi.org/10.1109/TVLSI.2014.2316919},
doi = {10.1109/TVLSI.2014.2316919},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/JevticLBBAAN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/TanQCAP15,
author = {Zhangxi Tan and
Zhenghao Qian and
Xi Chen and
Krste Asanovic and
David A. Patterson},
editor = {{\"{O}}zcan {\"{O}}zturk and
Kemal Ebcioglu and
Sandhya Dwarkadas},
title = {{DIABLO:} {A} Warehouse-Scale Computer Network Simulator using FPGAs},
booktitle = {Proceedings of the Twentieth International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2015, Istanbul, Turkey, March 14-18, 2015},
pages = {207--221},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2694344.2694362},
doi = {10.1145/2694344.2694362},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/TanQCAP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/LeeZWPKJKBBCCAR15,
author = {Yunsup Lee and
Brian Zimmer and
Andrew Waterman and
Alberto Puggelli and
Jaehwa Kwak and
Ruzica Jevtic and
Ben Keller and
Stevo Bailey and
Milovan Blagojevic and
Pi{-}Feng Chiu and
Henry Cook and
Rimas Avizienis and
Brian C. Richards and
Elad Alon and
Borivoje Nikolic and
Krste Asanovic},
title = {Raven: {A} 28nm {RISC-V} vector processor with integrated switched-capacitor
{DC-DC} converters and adaptive clocking},
booktitle = {2015 {IEEE} Hot Chips 27 Symposium (HCS), Cupertino, CA, USA, August
22-25, 2015},
pages = {1--45},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2015.7477469},
doi = {10.1109/HOTCHIPS.2015.7477469},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hotchips/LeeZWPKJKBBCCAR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotos/Maas0AK15,
author = {Martin Maas and
Tim Harris and
Krste Asanovic and
John Kubiatowicz},
editor = {George Candea},
title = {Trash Day: Coordinating Garbage Collection in Distributed Systems},
booktitle = {15th Workshop on Hot Topics in Operating Systems, HotOS XV, Kartause
Ittingen, Switzerland, May 18-20, 2015},
publisher = {{USENIX} Association},
year = {2015},
url = {https://www.usenix.org/conference/hotos15/workshop-program/presentation/maas},
timestamp = {Fri, 08 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hotos/Maas0AK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/BeamerAP15,
author = {Scott Beamer and
Krste Asanovic and
David A. Patterson},
title = {Locality Exists in Graph Processing: Workload Characterization on
an Ivy Bridge Server},
booktitle = {2015 {IEEE} International Symposium on Workload Characterization,
{IISWC} 2015, Atlanta, GA, USA, October 4-6, 2015},
pages = {56--65},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/IISWC.2015.12},
doi = {10.1109/IISWC.2015.12},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iiswc/BeamerAP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/BeamerAP15,
author = {Scott Beamer and
Krste Asanovic and
David A. Patterson},
editor = {Antonino Tumeo and
John Feo and
Oreste Villa},
title = {{GAIL:} the graph algorithm iron law},
booktitle = {Proceedings of the 5th Workshop on Irregular Applications - Architectures
and Algorithms, {IA3} 2015, Austin, Texas, USA, November 15, 2015},
pages = {13:1--13:4},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2833179.2833187},
doi = {10.1145/2833179.2833187},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sc/BeamerAP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZimmerLPKJKBBCL15,
author = {Brian Zimmer and
Yunsup Lee and
Alberto Puggelli and
Jaehwa Kwak and
Ruzica Jevtic and
Ben Keller and
Stevo Bailey and
Milovan Blagojevic and
Pi{-}Feng Chiu and
Hanh{-}Phuc Le and
Po{-}Hung Chen and
Nicholas Sutardja and
Rimas Avizienis and
Andrew Waterman and
Brian C. Richards and
Philippe Flatresse and
Elad Alon and
Krste Asanovic and
Borivoje Nikolic},
title = {A {RISC-V} vector processor with tightly-integrated switched-capacitor
{DC-DC} converters in 28nm {FDSOI}},
booktitle = {Symposium on {VLSI} Circuits, {VLSIC} 2015, Kyoto, Japan, June 17-19,
2015},
pages = {316},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/VLSIC.2015.7231305},
doi = {10.1109/VLSIC.2015.7231305},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/ZimmerLPKJKBBCL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/BeamerAP15,
author = {Scott Beamer and
Krste Asanovic and
David A. Patterson},
title = {The {GAP} Benchmark Suite},
journal = {CoRR},
volume = {abs/1508.03619},
year = {2015},
url = {http://arxiv.org/abs/1508.03619},
eprinttype = {arXiv},
eprint = {1508.03619},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/BeamerAP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/LeeWACSSA14,
author = {Yunsup Lee and
Andrew Waterman and
Rimas Avizienis and
Henry Cook and
Chen Sun and
Vladimir Stojanovic and
Krste Asanovic},
title = {A 45nm 1.3GHz 16.7 double-precision {GFLOPS/W} {RISC-V} processor
with vector accelerators},
booktitle = {{ESSCIRC} 2014 - 40th European Solid State Circuits Conference, Venice
Lido, Italy, September 22-26, 2014},
pages = {199--202},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ESSCIRC.2014.6942056},
doi = {10.1109/ESSCIRC.2014.6942056},
timestamp = {Tue, 17 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/esscirc/LeeWACSSA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/essderc/ZimmerTTVAN14,
author = {Brian Zimmer and
Olivier Thomas and
Seng Oon Toh and
Taylor Vincent and
Krste Asanovic and
Borivoje Nikolic},
title = {Joint impact of random variations and {RTN} on dynamic writeability
in 28nm bulk and {FDSOI} {SRAM}},
booktitle = {44th European Solid State Device Research Conference, {ESSDERC} 2014,
Venice Lido, Italy, September 22-26, 2014},
pages = {98--101},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ESSDERC.2014.6948767},
doi = {10.1109/ESSDERC.2014.6948767},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/essderc/ZimmerTTVAN14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/BilmesACD14,
author = {Jeff A. Bilmes and
Krste Asanovic and
Chee{-}Whye Chin and
Jim Demmel},
editor = {Utpal Banerjee},
title = {Author retrospective for optimizing matrix multiply using PHiPAC:
a portable high-performance {ANSI} {C} coding methodology},
booktitle = {{ACM} International Conference on Supercomputing 25th Anniversary
Volume},
pages = {42--44},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2591635.2591656},
doi = {10.1145/2591635.2591656},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ics/BilmesACD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LeeGKSKA14,
author = {Yunsup Lee and
Vinod Grover and
Ronny Krashinsky and
Mark Stephenson and
Stephen W. Keckler and
Krste Asanovic},
title = {Exploring the Design Space of {SPMD} Divergence Management on Data-Parallel
Architectures},
booktitle = {47th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2014, Cambridge, United Kingdom, December 13-17, 2014},
pages = {101--113},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/MICRO.2014.48},
doi = {10.1109/MICRO.2014.48},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/LeeGKSKA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sp/BeamerAP13,
author = {Scott Beamer and
Krste Asanovic and
David A. Patterson},
title = {Direction-optimizing breadth-first search},
journal = {Sci. Program.},
volume = {21},
number = {3-4},
pages = {137--148},
year = {2013},
url = {https://doi.org/10.3233/SPR-130370},
doi = {10.3233/SPR-130370},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sp/BeamerAP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tocs/LeeABXLBA13,
author = {Yunsup Lee and
Rimas Avizienis and
Alex Bishara and
Richard Xia and
Derek Lockhart and
Christopher Batten and
Krste Asanovic},
title = {Exploring the Tradeoffs between Programmability and Efficiency in
Data-Parallel Accelerators},
journal = {{ACM} Trans. Comput. Syst.},
volume = {31},
number = {3},
pages = {6},
year = {2013},
url = {https://doi.org/10.1145/2491464},
doi = {10.1145/2491464},
timestamp = {Fri, 10 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tocs/LeeABXLBA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccs/MaasLSTSAKS13,
author = {Martin Maas and
Eric Love and
Emil Stefanov and
Mohit Tiwari and
Elaine Shi and
Krste Asanovic and
John Kubiatowicz and
Dawn Song},
editor = {Ahmad{-}Reza Sadeghi and
Virgil D. Gligor and
Moti Yung},
title = {{PHANTOM:} practical oblivious computation in a secure processor},
booktitle = {2013 {ACM} {SIGSAC} Conference on Computer and Communications Security,
CCS'13, Berlin, Germany, November 4-8, 2013},
pages = {311--324},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2508859.2516692},
doi = {10.1145/2508859.2516692},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ccs/MaasLSTSAKS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cgo/LeeKGKA13,
author = {Yunsup Lee and
Ronny Krashinsky and
Vinod Grover and
Stephen W. Keckler and
Krste Asanovic},
title = {Convergence and scalarization for data-parallel architectures},
booktitle = {Proceedings of the 2013 {IEEE/ACM} International Symposium on Code
Generation and Optimization, {CGO} 2013, Shenzhen, China, February
23-27, 2013},
pages = {32:1--32:11},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/CGO.2013.6494995},
doi = {10.1109/CGO.2013.6494995},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cgo/LeeKGKA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ColmenaresEHBMCGRBMAK13,
author = {Juan A. Colmenares and
Gage Eads and
Steven A. Hofmeyr and
Sarah Bird and
Miquel Moret{\'{o}} and
David Chou and
Brian Gluzman and
Eric Roman and
Davide B. Bartolini and
Nitesh Mor and
Krste Asanovic and
John Kubiatowicz},
title = {Tessellation: refactoring the {OS} around explicit resource containers
with continuous adaptation},
booktitle = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
TX, USA, May 29 - June 07, 2013},
pages = {76:1--76:10},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2463209.2488827},
doi = {10.1145/2463209.2488827},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ColmenaresEHBMCGRBMAK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/AsanovicW13,
author = {Krste Asanovic and
Jan{-}Willem van de Waerdt},
title = {Welcome from general chairs},
booktitle = {2013 {IEEE} Hot Chips 25 Symposium (HCS), Stanford University, CA,
USA, August 25-27, 2013},
pages = {1--2},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2013.7478282},
doi = {10.1109/HOTCHIPS.2013.7478282},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hotchips/AsanovicW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/LeeSWAKA13,
author = {Yunsup Lee and
David Sheffield and
Andrew Waterman and
Michael J. Anderson and
Kurt Keutzer and
Krste Asanovic},
title = {Measuring the gap between programmable and fixed-function accelerators:
{A} case study on speech recognition},
booktitle = {2013 {IEEE} Hot Chips 25 Symposium (HCS), Stanford University, CA,
USA, August 25-27, 2013},
pages = {1--2},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2013.7478326},
doi = {10.1109/HOTCHIPS.2013.7478326},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hotchips/LeeSWAKA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/WatermanLACPA13,
author = {Andrew Waterman and
Yunsup Lee and
Rimas Avizienis and
Henry Cook and
David A. Patterson and
Krste Asanovic},
title = {The {RISC-V} instruction set},
booktitle = {2013 {IEEE} Hot Chips 25 Symposium (HCS), Stanford University, CA,
USA, August 25-27, 2013},
pages = {1},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2013.7478332},
doi = {10.1109/HOTCHIPS.2013.7478332},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hotchips/WatermanLACPA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/BeamerBAP13,
author = {Scott Beamer and
Aydin Bulu{\c{c}} and
Krste Asanovic and
David A. Patterson},
title = {Distributed Memory Breadth-First Search Revisited: Enabling Bottom-Up
Search},
booktitle = {2013 {IEEE} International Symposium on Parallel {\&} Distributed
Processing, Workshops and Phd Forum, Cambridge, MA, USA, May 20-24,
2013},
pages = {1618--1627},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/IPDPSW.2013.159},
doi = {10.1109/IPDPSW.2013.159},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ipps/BeamerBAP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/CookMBDPA13,
author = {Henry Cook and
Miquel Moret{\'{o}} and
Sarah Bird and
Khanh Dao and
David A. Patterson and
Krste Asanovic},
editor = {Avi Mendelson},
title = {A hardware evaluation of cache partitioning to improve utilization
and energy-efficiency while preserving responsiveness},
booktitle = {The 40th Annual International Symposium on Computer Architecture,
ISCA'13, Tel-Aviv, Israel, June 23-27, 2013},
pages = {308--319},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2485922.2485949},
doi = {10.1145/2485922.2485949},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/CookMBDPA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esticas/BattenJSA12,
author = {Christopher Batten and
Ajay Joshi and
Vladimir Stojanovic and
Krste Asanovic},
title = {Designing Chip-Level Nanophotonic Interconnection Networks},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {2},
number = {2},
pages = {137--153},
year = {2012},
url = {https://doi.org/10.1109/JETCAS.2012.2193932},
doi = {10.1109/JETCAS.2012.2193932},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esticas/BattenJSA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/LeeNA12,
author = {Jae W. Lee and
Man Cheuk Ng and
Krste Asanovic},
title = {Globally Synchronized Frames for guaranteed quality-of-service in
on-chip networks},
journal = {J. Parallel Distributed Comput.},
volume = {72},
number = {11},
pages = {1401--1411},
year = {2012},
url = {https://doi.org/10.1016/j.jpdc.2012.01.013},
doi = {10.1016/J.JPDC.2012.01.013},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/LeeNA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZimmerTVLTAN12,
author = {Brian Zimmer and
Seng Oon Toh and
Huy Vo and
Yunsup Lee and
Olivier Thomas and
Krste Asanovic and
Borivoje Nikolic},
title = {{SRAM} Assist Techniques for Operation in a Wide Voltage Range in
28-nm {CMOS}},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {59-II},
number = {12},
pages = {853--857},
year = {2012},
url = {https://doi.org/10.1109/TCSII.2012.2231015},
doi = {10.1109/TCSII.2012.2231015},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ZimmerTVLTAN12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BachrachVRLWAWA12,
author = {Jonathan Bachrach and
Huy Vo and
Brian C. Richards and
Yunsup Lee and
Andrew Waterman and
Rimas Avizienis and
John Wawrzynek and
Krste Asanovic},
editor = {Patrick Groeneveld and
Donatella Sciuto and
Soha Hassoun},
title = {Chisel: constructing hardware in a Scala embedded language},
booktitle = {The 49th Annual Design Automation Conference 2012, {DAC} '12, San
Francisco, CA, USA, June 3-7, 2012},
pages = {1216--1225},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2228360.2228584},
doi = {10.1145/2228360.2228584},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/BachrachVRLWAWA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iwmm/MaasRMAJK12,
author = {Martin Maas and
Philip Reames and
Jeffrey Morlan and
Krste Asanovic and
Anthony D. Joseph and
John Kubiatowicz},
editor = {Martin T. Vechev and
Kathryn S. McKinley},
title = {GPUs as an opportunity for offloading garbage collection},
booktitle = {International Symposium on Memory Management, {ISMM} '12, Beijing,
China, June 15-16, 2012},
pages = {25--36},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2258996.2259002},
doi = {10.1145/2258996.2259002},
timestamp = {Thu, 24 Jun 2021 16:19:30 +0200},
biburl = {https://dblp.org/rec/conf/iwmm/MaasRMAJK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/BeamerAP12,
author = {Scott Beamer and
Krste Asanovic and
David A. Patterson},
editor = {Jeffrey K. Hollingsworth},
title = {Direction-optimizing breadth-first search},
booktitle = {{SC} Conference on High Performance Computing Networking, Storage
and Analysis, {SC} '12, Salt Lake City, UT, {USA} - November 11 -
15, 2012},
pages = {12},
publisher = {{IEEE/ACM}},
year = {2012},
url = {https://doi.org/10.1109/SC.2012.50},
doi = {10.1109/SC.2012.50},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sc/BeamerAP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/uss/TiwariMOASLSA12,
author = {Mohit Tiwari and
Prashanth Mohan and
Andrew Osheroff and
Hilfi Alkaff and
Elaine Shi and
Eric Love and
Dawn Song and
Krste Asanovic},
editor = {Patrick Traynor},
title = {Context-centric Security},
booktitle = {7th {USENIX} Workshop on Hot Topics in Security, HotSec'12, Bellevue,
WA, USA, August 7, 2012},
publisher = {{USENIX} Association},
year = {2012},
url = {https://www.usenix.org/conference/hotsec12/workshop-program/presentation/tiwari},
timestamp = {Mon, 01 Feb 2021 08:43:14 +0100},
biburl = {https://dblp.org/rec/conf/uss/TiwariMOASLSA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/ColmenaresBEHKP11,
author = {Juan A. Colmenares and
Sarah Bird and
Gage Eads and
Steven A. Hofmeyr and
Albert Kim and
Rohit Poddar and
Hilfi Alkaff and
Krste Asanovic and
John Kubiatowicz},
title = {Tessellation operating system: Building a real-time, responsive, high-throughput
client {OS} for many-core architectures},
booktitle = {2011 {IEEE} Hot Chips 23 Symposium (HCS), Stanford, CA, USA, August
17-19, 2011},
pages = {1},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2011.7477518},
doi = {10.1109/HOTCHIPS.2011.7477518},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hotchips/ColmenaresBEHKP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/LeeABXLBA11,
author = {Yunsup Lee and
Rimas Avizienis and
Alex Bishara and
Richard Xia and
Derek Lockhart and
Christopher Batten and
Krste Asanovic},
title = {The Maven vector-thread architecture},
booktitle = {2011 {IEEE} Hot Chips 23 Symposium (HCS), Stanford, CA, USA, August
17-19, 2011},
pages = {1},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2011.7477519},
doi = {10.1109/HOTCHIPS.2011.7477519},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hotchips/LeeABXLBA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmc/ColmenaresSBAPA11,
author = {Juan A. Colmenares and
Ian Saxton and
Eric Battenberg and
Rimas Avizienis and
Nils Peters and
Krste Asanovic and
John Kubiatowicz and
David Wessel},
title = {Real-time Musical Applications on an Experimental Operating System
for Multi-Core Processors},
booktitle = {Proceedings of the 2011 International Computer Music Conference, {ICMC}
2011, Huddersfield, UK, July 31 - August 5, 2011},
publisher = {Michigan Publishing},
year = {2011},
url = {https://hdl.handle.net/2027/spo.bbp2372.2011.044},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icmc/ColmenaresSBAPA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LeeABXLBA11,
author = {Yunsup Lee and
Rimas Avizienis and
Alex Bishara and
Richard Xia and
Derek Lockhart and
Christopher Batten and
Krste Asanovic},
editor = {Ravi R. Iyer and
Qing Yang and
Antonio Gonz{\'{a}}lez},
title = {Exploring the tradeoffs between programmability and efficiency in
data-parallel accelerators},
booktitle = {38th International Symposium on Computer Architecture {(ISCA} 2011),
June 4-8, 2011, San Jose, CA, {USA}},
pages = {129--140},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2000064.2000080},
doi = {10.1145/2000064.2000080},
timestamp = {Mon, 15 May 2023 22:11:15 +0200},
biburl = {https://dblp.org/rec/conf/isca/LeeABXLBA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/AsanovicW10,
author = {Krste Asanovic and
Ralph Wittig},
title = {Guest Editors' Introduction: Hot Chips 21},
journal = {{IEEE} Micro},
volume = {30},
number = {2},
pages = {5--6},
year = {2010},
url = {https://doi.org/10.1109/MM.2010.35},
doi = {10.1109/MM.2010.35},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/AsanovicW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/TanWALCPA10,
author = {Zhangxi Tan and
Andrew Waterman and
Rimas Avizienis and
Yunsup Lee and
Henry Cook and
David A. Patterson and
Krste Asanovic},
editor = {Sachin S. Sapatnekar},
title = {{RAMP} gold: an FPGA-based architecture simulator for multiprocessors},
booktitle = {Proceedings of the 47th Design Automation Conference, {DAC} 2010,
Anaheim, California, USA, July 13-18, 2010},
pages = {463--468},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1837274.1837390},
doi = {10.1145/1837274.1837390},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/TanWALCPA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/BeamerSKJBSA10,
author = {Scott Beamer and
Chen Sun and
Yong{-}Jin Kwon and
Ajay Joshi and
Christopher Batten and
Vladimir Stojanovic and
Krste Asanovic},
editor = {Andr{\'{e}} Seznec and
Uri C. Weiser and
Ronny Ronen},
title = {Re-architecting {DRAM} memory systems with monolithically integrated
silicon photonics},
booktitle = {37th International Symposium on Computer Architecture {(ISCA} 2010),
June 19-23, 2010, Saint-Malo, France},
pages = {129--140},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1815961.1815978},
doi = {10.1145/1815961.1815978},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/BeamerSKJBSA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/TanWCBAP10,
author = {Zhangxi Tan and
Andrew Waterman and
Henry Cook and
Sarah Bird and
Krste Asanovic and
David A. Patterson},
editor = {Andr{\'{e}} Seznec and
Uri C. Weiser and
Ronny Ronen},
title = {A case for {FAME:} {FPGA} architecture model execution},
booktitle = {37th International Symposium on Computer Architecture {(ISCA} 2010),
June 19-23, 2010, Saint-Malo, France},
pages = {290--301},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1815961.1815999},
doi = {10.1145/1815961.1815999},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/TanWCBAP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pldi/PanHA10,
author = {Heidi Pan and
Benjamin Hindman and
Krste Asanovic},
editor = {Benjamin G. Zorn and
Alexander Aiken},
title = {Composing parallel software efficiently with lithe},
booktitle = {Proceedings of the 2010 {ACM} {SIGPLAN} Conference on Programming
Language Design and Implementation, {PLDI} 2010, Toronto, Ontario,
Canada, June 5-10, 2010},
pages = {376--387},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1806596.1806639},
doi = {10.1145/1806596.1806639},
timestamp = {Tue, 22 Jun 2021 17:10:56 +0200},
biburl = {https://dblp.org/rec/conf/pldi/PanHA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/AsanovicBDKKKMPSWWY09,
author = {Krste Asanovic and
Rastislav Bod{\'{\i}}k and
James Demmel and
Tony M. Keaveny and
Kurt Keutzer and
John Kubiatowicz and
Nelson Morgan and
David A. Patterson and
Koushik Sen and
John Wawrzynek and
David Wessel and
Katherine A. Yelick},
title = {A view of the parallel computing landscape},
journal = {Commun. {ACM}},
volume = {52},
number = {10},
pages = {56--67},
year = {2009},
url = {https://doi.org/10.1145/1562764.1562783},
doi = {10.1145/1562764.1562783},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cacm/AsanovicBDKKKMPSWWY09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/BattenJOKMHPLSHKRSA09,
author = {Christopher Batten and
Ajay Joshi and
Jason Orcutt and
Anatol Khilo and
Benjamin Moss and
Charles Holzwarth and
Milos A. Popovic and
Hanqing Li and
Henry I. Smith and
Judy L. Hoyt and
Franz X. K{\"{a}}rtner and
Rajeev J. Ram and
Vladimir Stojanovic and
Krste Asanovic},
title = {Building Many-Core Processor-to-DRAM Networks with Monolithic {CMOS}
Silicon Photonics},
journal = {{IEEE} Micro},
volume = {29},
number = {4},
pages = {8--21},
year = {2009},
url = {https://doi.org/10.1109/MM.2009.60},
doi = {10.1109/MM.2009.60},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/BattenJOKMHPLSHKRSA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/BeamerABJS09,
author = {Scott Beamer and
Krste Asanovic and
Christopher Batten and
Ajay Joshi and
Vladimir Stojanovic},
editor = {Michael Gschwind and
Alexandru Nicolau and
Valentina Salapura and
Jos{\'{e}} E. Moreira},
title = {Designing multi-socket systems using silicon photonics},
booktitle = {Proceedings of the 23rd international conference on Supercomputing,
2009, Yorktown Heights, NY, USA, June 8-12, 2009},
pages = {521--522},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1542275.1542360},
doi = {10.1145/1542275.1542360},
timestamp = {Tue, 06 Nov 2018 11:07:03 +0100},
biburl = {https://dblp.org/rec/conf/ics/BeamerABJS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/JoshiBKBSAS09,
author = {Ajay Joshi and
Christopher Batten and
Yong{-}Jin Kwon and
Scott Beamer and
Imran Shamim and
Krste Asanovic and
Vladimir Stojanovic},
title = {Silicon-photonic clos networks for global on-chip communication},
booktitle = {Third International Symposium on Networks-on-Chips, {NOCS} 2009, May
10-13 2009, La Jolla, CA, {USA.} Proceedings},
pages = {124--133},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NOCS.2009.5071460},
doi = {10.1109/NOCS.2009.5071460},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nocs/JoshiBKBSAS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/KrashinskyBA08,
author = {Ronny Krashinsky and
Christopher Batten and
Krste Asanovic},
title = {Implementing the scale vector-thread processor},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {41:1--41:24},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367050},
doi = {10.1145/1367045.1367050},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/KrashinskyBA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cgo/HamptonA08,
author = {Mark Hampton and
Krste Asanovic},
editor = {Mary Lou Soffa and
Evelyn Duesterwald},
title = {Compiling for vector-thread architectures},
booktitle = {Sixth International Symposium on Code Generation and Optimization
{(CGO} 2008), April 5-9, 2008, Boston, MA, {USA}},
pages = {205--215},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1356058.1356085},
doi = {10.1145/1356058.1356085},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cgo/HamptonA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hoti/BattenJOKMHPLSHKRSA08,
author = {Christopher Batten and
Ajay Joshi and
Jason Orcutt and
Anatoly Khilo and
Benjamin Moss and
Charles Holzwarth and
Milos A. Popovic and
Hanqing Li and
Henry I. Smith and
Judy L. Hoyt and
Franz X. K{\"{a}}rtner and
Rajeev J. Ram and
Vladimir Stojanovic and
Krste Asanovic},
title = {Building Manycore Processor-to-DRAM Networks with Monolithic Silicon
Photonics},
booktitle = {16th Annual {IEEE} Symposium on High Performance Interconnects {(HOTI}
2008), 26-28 August 2008, Stanford, CA, {USA}},
pages = {21--30},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/HOTI.2008.11},
doi = {10.1109/HOTI.2008.11},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hoti/BattenJOKMHPLSHKRSA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LeeNA08,
author = {Jae W. Lee and
Man Cheuk Ng and
Krste Asanovic},
title = {Globally-Synchronized Frames for Guaranteed Quality-of-Service in
On-Chip Networks},
booktitle = {35th International Symposium on Computer Architecture {(ISCA} 2008),
June 21-25, 2008, Beijing, China},
pages = {89--100},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISCA.2008.31},
doi = {10.1109/ISCA.2008.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/LeeNA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memocode/SchaumontAH08,
author = {Patrick Schaumont and
Krste Asanovic and
James C. Hoe},
title = {{MEMOCODE} 2008 Co-Design Contest},
booktitle = {6th {ACM} {\&} {IEEE} International Conference on Formal Methods
and Models for Co-Design {(MEMOCODE} 2008), June 5-7, 2008, Anaheim,
CA, {USA}},
pages = {151--154},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/MEMCOD.2008.4547703},
doi = {10.1109/MEMCOD.2008.4547703},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memocode/SchaumontAH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/WawrzynekPOLKHCA07,
author = {John Wawrzynek and
David A. Patterson and
Mark Oskin and
Shih{-}Lien Lu and
Christoforos E. Kozyrakis and
James C. Hoe and
Derek Chiou and
Krste Asanovic},
title = {{RAMP:} Research Accelerator for Multiple Processors},
journal = {{IEEE} Micro},
volume = {27},
number = {2},
pages = {46--57},
year = {2007},
url = {https://doi.org/10.1109/MM.2007.39},
doi = {10.1109/MM.2007.39},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/WawrzynekPOLKHCA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/HeoKA07,
author = {Seongmoo Heo and
Ronny Krashinsky and
Krste Asanovic},
title = {Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {15},
number = {9},
pages = {1060--1064},
year = {2007},
url = {https://doi.org/10.1109/TVLSI.2007.902211},
doi = {10.1109/TVLSI.2007.902211},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/HeoKA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/Asanovic07,
author = {Krste Asanovic},
title = {Transactors for parallel hardware and software co-design},
booktitle = {{IEEE} International High Level Design Validation and Test Workshop,
{HLDVT} 2007, Irvine, CA, USA, November 7-9, 2007},
pages = {140--142},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/HLDVT.2007.4392802},
doi = {10.1109/HLDVT.2007.4392802},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/Asanovic07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LeeKA07,
author = {Jae W. Lee and
Myron King and
Krste Asanovic},
title = {Continual hashing for efficient fine-grain state inconsistency detection},
booktitle = {25th International Conference on Computer Design, {ICCD} 2007, 7-10
October 2007, Lake Tahoe, CA, USA, Proceedings},
pages = {33--40},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICCD.2007.4601877},
doi = {10.1109/ICCD.2007.4601877},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LeeKA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/AnanianAKLL06,
author = {C. Scott Ananian and
Krste Asanovic and
Bradley C. Kuszmaul and
Charles E. Leiserson and
Sean Lie},
title = {Unbounded Transactional Memory},
journal = {{IEEE} Micro},
volume = {26},
number = {1},
pages = {59--69},
year = {2006},
url = {https://doi.org/10.1109/MM.2006.26},
doi = {10.1109/MM.2006.26},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/AnanianAKLL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tocs/BarrA06,
author = {Kenneth C. Barr and
Krste Asanovic},
title = {Energy-aware lossless data compression},
journal = {{ACM} Trans. Comput. Syst.},
volume = {24},
number = {3},
pages = {250--291},
year = {2006},
url = {https://doi.org/10.1145/1151690.1151692},
doi = {10.1145/1151690.1151692},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tocs/BarrA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/PattersonAACHKL06,
author = {David A. Patterson and
Arvind and
Krste Asanovic and
Derek Chiou and
James C. Hoe and
Christos Kozyrakis and
Shih{-}Lien Lu and
Mark Oskin and
Jan M. Rabaey and
John Wawrzynek},
title = {Research accelerator for multiple processors},
booktitle = {2006 {IEEE} Hot Chips 18 Symposium (HCS), Stanford, CA, USA, August
20-22, 2006},
pages = {1--42},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2006.7477751},
doi = {10.1109/HOTCHIPS.2006.7477751},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hotchips/PattersonAACHKL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/HamptonA06,
author = {Mark Hampton and
Krste Asanovic},
editor = {Gregory K. Egan and
Yoichi Muraoka},
title = {Implementing virtual memory in a vector processor with software restart
markers},
booktitle = {Proceedings of the 20th Annual International Conference on Supercomputing,
{ICS} 2006, Cairns, Queensland, Australia, June 28 - July 01, 2006},
pages = {135--144},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1183401.1183422},
doi = {10.1145/1183401.1183422},
timestamp = {Tue, 06 Nov 2018 11:07:03 +0100},
biburl = {https://dblp.org/rec/conf/ics/HamptonA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/LiuA06,
author = {Rose F. Liu and
Krste Asanovic},
title = {Accelerating architectural exploration using canonical instruction
segments},
booktitle = {2006 {IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2006, March 19-21, 2006, Austin, Texas, USA,
Proceedings},
pages = {13--24},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISPASS.2006.1620786},
doi = {10.1109/ISPASS.2006.1620786},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/LiuA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/BarrA06,
author = {Kenneth C. Barr and
Krste Asanovic},
title = {Branch trace compression for snapshot-based simulation},
booktitle = {2006 {IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2006, March 19-21, 2006, Austin, Texas, USA,
Proceedings},
pages = {25--36},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISPASS.2006.1620787},
doi = {10.1109/ISPASS.2006.1620787},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/BarrA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/LeeA06,
author = {Jae W. Lee and
Krste Asanovic},
title = {{METERG:} Measurement-Based End-to-End Performance Estimation Technique
in QoS-Capable Multiprocessors},
booktitle = {12th {IEEE} Real-Time and Embedded Technology and Applications Symposium
{(RTAS} 2006), 4-7 April 2006, San Jose, California, {USA}},
pages = {135--147},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RTAS.2006.29},
doi = {10.1109/RTAS.2006.29},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtas/LeeA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/uss/PaxsonADLPSW06,
author = {Vern Paxson and
Krste Asanovic and
Sarang Dharmapurikar and
John W. Lockwood and
Ruoming Pang and
Robin Sommer and
Nicholas Weaver},
title = {Rethinking Hardware Support for Network Analysis and Intrusion Prevention},
booktitle = {1st {USENIX} Workshop on Hot Topics in Security, HotSec'06, Vancouver,
BC, Canada, July 31, 2006},
publisher = {{USENIX} Association},
year = {2006},
url = {https://www.usenix.org/conference/hotsec-06/rethinking-hardware-support-network-analysis-and-intrusion-prevention},
timestamp = {Mon, 01 Feb 2021 08:43:09 +0100},
biburl = {https://dblp.org/rec/conf/uss/PaxsonADLPSW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/PanACL05,
author = {Heidi Pan and
Krste Asanovic and
Robert Cohn and
Chi{-}Keung Luk},
title = {Controlling program execution through binary instrumentation},
journal = {{SIGARCH} Comput. Archit. News},
volume = {33},
number = {5},
pages = {45--50},
year = {2005},
url = {https://doi.org/10.1145/1127577.1127587},
doi = {10.1145/1127577.1127587},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/PanACL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/TsengA05,
author = {Jessica H. Tseng and
Krste Asanovic},
title = {A Speculative Control Scheme for an Energy-Efficient Banked Register
Fil},
journal = {{IEEE} Trans. Computers},
volume = {54},
number = {6},
pages = {741--751},
year = {2005},
url = {https://doi.org/10.1109/TC.2005.88},
doi = {10.1109/TC.2005.88},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/TsengA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AnanianAKLL05,
author = {C. Scott Ananian and
Krste Asanovic and
Bradley C. Kuszmaul and
Charles E. Leiserson and
Sean Lie},
title = {Unbounded Transactional Memory},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {316--327},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.41},
doi = {10.1109/HPCA.2005.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/AnanianAKLL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ZhangA05,
author = {Michael Zhang and
Krste Asanovic},
title = {Victim Replication: Maximizing Capacity while Hiding Wire Delay in
Tiled Chip Multiprocessors},
booktitle = {32st International Symposium on Computer Architecture {(ISCA} 2005),
4-8 June 2005, Madison, Wisconsin, {USA}},
pages = {336--345},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISCA.2005.53},
doi = {10.1109/ISCA.2005.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ZhangA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/HeoA05,
author = {Seongmoo Heo and
Krste Asanovic},
editor = {Kaushik Roy and
Vivek Tiwari},
title = {Replacing global wires with an on-chip network: a power analysis},
booktitle = {Proceedings of the 2005 International Symposium on Low Power Electronics
and Design, 2005, San Diego, California, USA, August 8-10, 2005},
pages = {369--374},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1077603.1077692},
doi = {10.1145/1077603.1077692},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/HeoA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/BarrPZA05,
author = {Kenneth C. Barr and
Heidi Pan and
Michael Zhang and
Krste Asanovic},
title = {Accelerating Multiprocessor Simulation with a Memory Timestamp Record},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2005, March 20-22, 2005, Austin, Texas, USA,
Proceedings},
pages = {66--77},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISPASS.2005.1430560},
doi = {10.1109/ISPASS.2005.1430560},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/BarrPZA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sosp/WitchelRA05,
author = {Emmett Witchel and
Junghwan Rhee and
Krste Asanovic},
editor = {Andrew Herbert and
Kenneth P. Birman},
title = {Mondrix: memory isolation for linux using mondriaan memory protection},
booktitle = {Proceedings of the 20th {ACM} Symposium on Operating Systems Principles
2005, {SOSP} 2005, Brighton, UK, October 23-26, 2005},
pages = {31--44},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1095810.1095814},
doi = {10.1145/1095810.1095814},
timestamp = {Tue, 06 Nov 2018 16:59:32 +0100},
biburl = {https://dblp.org/rec/conf/sosp/WitchelRA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/KrashinskyBHGPCA04,
author = {Ronny Krashinsky and
Christopher Batten and
Mark Hampton and
Steve Gerding and
Brian Pharris and
Jared Casper and
Krste Asanovic},
title = {The Vector-Thread Architecture},
journal = {{IEEE} Micro},
volume = {24},
number = {6},
pages = {84--90},
year = {2004},
url = {https://doi.org/10.1109/MM.2004.90},
doi = {10.1109/MM.2004.90},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/KrashinskyBHGPCA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KrashinskyBHGPCA04,
author = {Ronny Krashinsky and
Christopher Batten and
Mark Hampton and
Steve Gerding and
Brian Pharris and
Jared Casper and
Krste Asanovic},
title = {The Vector-Thread Architecture},
booktitle = {31st International Symposium on Computer Architecture {(ISCA} 2004),
19-23 June 2004, Munich, Germany},
pages = {52--63},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ISCA.2004.1310763},
doi = {10.1109/ISCA.2004.1310763},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/KrashinskyBHGPCA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/HeoA04,
author = {Seongmoo Heo and
Krste Asanovic},
editor = {Rajiv V. Joshi and
Kiyoung Choi and
Vivek Tiwari and
Kaushik Roy},
title = {Power-optimal pipelining in deep submicron technology},
booktitle = {Proceedings of the 2004 International Symposium on Low Power Electronics
and Design, 2004, Newport Beach, California, USA, August 9-11, 2004},
pages = {218--223},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1013235.1013291},
doi = {10.1145/1013235.1013291},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/HeoA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/BattenKGA04,
author = {Christopher Batten and
Ronny Krashinsky and
Steve Gerding and
Krste Asanovic},
title = {Cache Refill/Access Decoupling for Vector Machines},
booktitle = {37th Annual International Symposium on Microarchitecture {(MICRO-37}
2004), 4-8 December 2004, Portland, OR, {USA}},
pages = {331--342},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/MICRO.2004.9},
doi = {10.1109/MICRO.2004.9},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/BattenKGA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotos/WitchelA03,
author = {Emmett Witchel and
Krste Asanovic},
editor = {Michael B. Jones},
title = {Hardware Works, Software Doesn't: Enforcing Modularity with Mondriaan
Memory Protection},
booktitle = {Proceedings of HotOS'03: 9th Workshop on Hot Topics in Operating Systems,
May 18-21, 2003, Lihue (Kauai), Hawaii, {USA}},
pages = {139--144},
publisher = {{USENIX}},
year = {2003},
url = {https://www.usenix.org/conference/hotos-ix/hardware-works-software-doesnt-enforcing-modularity-mondriaan-memory-protection},
timestamp = {Wed, 04 Jul 2018 13:06:34 +0200},
biburl = {https://dblp.org/rec/conf/hotos/WitchelA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/TsengA03,
author = {Jessica H. Tseng and
Krste Asanovic},
editor = {Allan Gottlieb and
Kai Li},
title = {Banked Multiported Register Files for High-Frequency Superscalar Microprocessors},
booktitle = {30th International Symposium on Computer Architecture {(ISCA} 2003),
9-11 June 2003, San Diego, California, {USA}},
pages = {62--71},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/ISCA.2003.1206989},
doi = {10.1109/ISCA.2003.1206989},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/TsengA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/HeoBA03,
author = {Seongmoo Heo and
Kenneth C. Barr and
Krste Asanovic},
editor = {Ingrid Verbauwhede and
Hyung Roh},
title = {Reducing power density through activity migration},
booktitle = {Proceedings of the 2003 International Symposium on Low Power Electronics
and Design, 2003, Seoul, Korea, August 25-27, 2003},
pages = {217--222},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/871506.871561},
doi = {10.1145/871506.871561},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/islped/HeoBA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mobisys/BarrA03,
author = {Kenneth C. Barr and
Krste Asanovic},
editor = {Daniel P. Siewiorek and
Mary Baker and
Robert T. Morris},
title = {Energy Aware Lossless Data Compression},
booktitle = {Proceedings of the First International Conference on Mobile Systems,
Applications, and Services, MobiSys 2003, San Francisco, CA, USA,
May 5-8, 2003},
pages = {231--244},
publisher = {{USENIX}},
year = {2003},
url = {https://www.usenix.org/events/mobisys03/tech/barr.html},
doi = {10.1145/1066116.1066123},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mobisys/BarrA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/WitchelCA02,
author = {Emmett Witchel and
Josh Cates and
Krste Asanovic},
editor = {Kourosh Gharachorloo and
David A. Wood},
title = {Mondrian memory protection},
booktitle = {Proceedings of the 10th International Conference on Architectural
Support for Programming Languages and Operating Systems (ASPLOS-X),
San Jose, California, USA, October 5-9, 2002},
pages = {304--316},
publisher = {{ACM} Press},
year = {2002},
url = {https://doi.org/10.1145/605397.605429},
doi = {10.1145/605397.605429},
timestamp = {Wed, 07 Jul 2021 13:23:08 +0200},
biburl = {https://dblp.org/rec/conf/asplos/WitchelCA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HeoBHA02,
author = {Seongmoo Heo and
Kenneth C. Barr and
Mark Hampton and
Krste Asanovic},
editor = {Yale N. Patt and
Dirk Grunwald and
Kevin Skadron},
title = {Dynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines},
booktitle = {29th International Symposium on Computer Architecture {(ISCA} 2002),
25-29 May 2002, Anchorage, AK, {USA}},
pages = {137--147},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ISCA.2002.1003571},
doi = {10.1109/ISCA.2002.1003571},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/HeoBHA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/ZhangA02,
author = {Michael Zhang and
Krste Asanovic},
editor = {Vivek De and
Mary Jane Irwin and
Ingrid Verbauwhede and
Christian Piguet},
title = {Fine-grain CAM-tag cache resizing using miss tags},
booktitle = {Proceedings of the 2002 International Symposium on Low Power Electronics
and Design, 2002, Monterey, California, USA, August 12-14, 2002},
pages = {130--135},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/566408.566444},
doi = {10.1145/566408.566444},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/ZhangA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/SungKA01,
author = {Michael Sung and
Ronny Krashinsky and
Krste Asanovic},
title = {Multithreading decoupled architectures for complexity-effective general
purpose computing},
journal = {{SIGARCH} Comput. Archit. News},
volume = {29},
number = {5},
pages = {56--61},
year = {2001},
url = {https://doi.org/10.1145/563647.563658},
doi = {10.1145/563647.563658},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/SungKA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arvlsi/HeoKA01,
author = {Seongmoo Heo and
Ronny Krashinsky and
Krste Asanovic},
title = {Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy},
booktitle = {19th Conference on Advanced Research in {VLSI} {(ARVLSI} 2001), 14-16
March 2001, Salt Lake City, UT, {USA}},
pages = {59--74},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ARVLSI.2001.915551},
doi = {10.1109/ARVLSI.2001.915551},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arvlsi/HeoKA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PanA01,
author = {Heidi Pan and
Krste Asanovic},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Heads and tails: a variable-length instruction format supporting parallel
fetch and decode},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {168--175},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502244},
doi = {10.1145/502217.502244},
timestamp = {Tue, 06 Nov 2018 11:07:42 +0100},
biburl = {https://dblp.org/rec/conf/cases/PanA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/WitchelLAA01,
author = {Emmett Witchel and
Samuel Larsen and
C. Scott Ananian and
Krste Asanovic},
editor = {Yale N. Patt and
Josh Fisher and
Paolo Faraboschi and
Kevin Skadron},
title = {Direct addressed caches for reduced power consumption},
booktitle = {Proceedings of the 34th Annual International Symposium on Microarchitecture,
Austin, Texas, USA, December 1-5, 2001},
pages = {124--133},
publisher = {{ACM/IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/MICRO.2001.991111},
doi = {10.1109/MICRO.2001.991111},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/WitchelLAA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/VillaZA00,
author = {Luis Villa and
Michael Zhang and
Krste Asanovic},
editor = {Andrew Wolfe and
Michael S. Schlansker},
title = {Dynamic zero compression for cache energy reduction},
booktitle = {Proceedings of the 33rd Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 33, Monterey, California, USA, December
10-13, 2000},
pages = {214--220},
publisher = {{ACM/IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/MICRO.2000.898072},
doi = {10.1109/MICRO.2000.898072},
timestamp = {Tue, 31 May 2022 14:30:45 +0200},
biburl = {https://dblp.org/rec/conf/micro/VillaZA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/TsengA00,
author = {Jessica H. Tseng and
Krste Asanovic},
title = {Energy-Efficient Register Access},
booktitle = {Proceedings of the 13th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2000, Manaus, Brazil, September 18-24, 2000},
pages = {377--384},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://dl.acm.org/doi/10.5555/827245.827319},
doi = {10.5555/827245.827319},
timestamp = {Fri, 03 Jun 2022 10:50:13 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/TsengA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/KozyrakisPPAACFGGKTTY97,
author = {Christoforos E. Kozyrakis and
Stylianos Perissakis and
David A. Patterson and
Thomas E. Anderson and
Krste Asanovic and
Neal Cardwell and
Richard Fromm and
Jason Golbus and
Benjamin Gribstad and
Kimberly Keeton and
Randi Thomas and
Noah Treuhaft and
Katherine A. Yelick},
title = {Scalable Processors in the Billion-Transistor Era: {IRAM}},
journal = {Computer},
volume = {30},
number = {9},
pages = {75--78},
year = {1997},
url = {https://doi.org/10.1109/2.612252},
doi = {10.1109/2.612252},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/KozyrakisPPAACFGGKTTY97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/BilmesACD97,
author = {Jeff A. Bilmes and
Krste Asanovic and
Chee{-}Whye Chin and
James Demmel},
title = {Using PHiPAC to speed error back-propagation learning},
booktitle = {1997 {IEEE} International Conference on Acoustics, Speech, and Signal
Processing, {ICASSP} '97, Munich, Germany, April 21-24, 1997},
pages = {4153--4156},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICASSP.1997.604861},
doi = {10.1109/ICASSP.1997.604861},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icassp/BilmesACD97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/PattersonABFGGKKMPTTY97,
author = {David A. Patterson and
Krste Asanovic and
Aaron B. Brown and
Richard Fromm and
Jason Golbus and
Benjamin Gribstad and
Kimberly Keeton and
Christoforos E. Kozyrakis and
David R. Martin and
Stylianos Perissakis and
Randi Thomas and
Noah Treuhaft and
Katherine A. Yelick},
title = {Intelligent {RAM} {(IRAM):} The Industrial Setting, Applications and
Architectures},
booktitle = {Proceedings 1997 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '97, Austin, Texas, USA,
October 12-15, 1997},
pages = {2--7},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICCD.1997.628842},
doi = {10.1109/ICCD.1997.628842},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccd/PattersonABFGGKKMPTTY97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/BilmesACD97,
author = {Jeff A. Bilmes and
Krste Asanovic and
Chee{-}Whye Chin and
James Demmel},
editor = {Steven J. Wallach and
Hans P. Zima},
title = {Optimizing Matrix Multiply Using PHiPAC: {A} Portable, High-Performance,
{ANSI} {C} Coding Methodology},
booktitle = {Proceedings of the 11th international conference on Supercomputing,
{ICS} 1997, Vienna, Austria, July 7-11, 1997},
pages = {340--347},
publisher = {{ACM}},
year = {1997},
url = {https://doi.org/10.1145/263580.263662},
doi = {10.1145/263580.263662},
timestamp = {Tue, 06 Nov 2018 11:07:03 +0100},
biburl = {https://dblp.org/rec/conf/ics/BilmesACD97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iwann/Asanovic97,
author = {Krste Asanovic},
editor = {Jos{\'{e}} Mira and
Roberto Moreno{-}D{\'{\i}}az and
Joan Cabestany},
title = {A Fast Kohonen Net Implementation for Spert-II},
booktitle = {Biological and Artificial Computation: From Neuroscience to Technology,
International Work-Conference on Artificial and Natural Neural Networks,
{IWANN} '97, Lanzarote, Canary Islands, Spain, June 4-6, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1240},
pages = {792--800},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/BFb0032538},
doi = {10.1007/BFB0032538},
timestamp = {Tue, 14 May 2019 10:00:51 +0200},
biburl = {https://dblp.org/rec/conf/iwann/Asanovic97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/WawrzynekAKJBM96,
author = {John Wawrzynek and
Krste Asanovic and
Brian Kingsbury and
David Johnson and
James Beck and
Nelson Morgan},
title = {Spert-II: {A} Vector Microprocessor System},
journal = {Computer},
volume = {29},
number = {3},
pages = {79--86},
year = {1996},
url = {https://doi.org/10.1109/2.485896},
doi = {10.1109/2.485896},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/WawrzynekAKJBM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nips/WawrzynekAKBJM95,
author = {John Wawrzynek and
Krste Asanovic and
Brian Kingsbury and
James Beck and
David Johnson and
Nelson Morgan},
editor = {David S. Touretzky and
Michael Mozer and
Michael E. Hasselmo},
title = {{SPERT-II:} {A} Vector Microprocessor System and its Application to
Large Problems in Backpropagation Training},
booktitle = {Advances in Neural Information Processing Systems 8, NIPS, Denver,
CO, USA, November 27-30, 1995},
pages = {619--625},
publisher = {{MIT} Press},
year = {1995},
url = {http://papers.nips.cc/paper/1067-spert-ii-a-vector-microprocessor-system-and-its-application-to-large-problems-in-backpropagation-training},
timestamp = {Mon, 16 May 2022 15:41:51 +0200},
biburl = {https://dblp.org/rec/conf/nips/WawrzynekAKBJM95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijns/AsanovicBFMW93,
author = {Krste Asanovic and
James Beck and
Jerry Feldman and
Nelson Morgan and
John Wawrzynek},
title = {Designing {A} Connectionist Network Supercomputer},
journal = {Int. J. Neural Syst.},
volume = {4},
number = {4},
pages = {317--326},
year = {1993},
url = {https://doi.org/10.1142/S0129065793000250},
doi = {10.1142/S0129065793000250},
timestamp = {Tue, 01 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijns/AsanovicBFMW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tnn/WawrzynekAM93,
author = {John Wawrzynek and
Krste Asanovic and
Nelson Morgan},
title = {The design of a neuro-microprocessor},
journal = {{IEEE} Trans. Neural Networks},
volume = {4},
number = {3},
pages = {394--399},
year = {1993},
url = {https://doi.org/10.1109/72.217180},
doi = {10.1109/72.217180},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tnn/WawrzynekAM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/AsanovicMW93,
author = {Krste Asanovic and
Nelson Morgan and
John Wawrzynek},
title = {Using simulations of reduced precision arithmetic to design a neuro-microprocessor},
journal = {J. {VLSI} Signal Process.},
volume = {6},
number = {1},
pages = {33--44},
year = {1993},
url = {https://doi.org/10.1007/BF01581957},
doi = {10.1007/BF01581957},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/AsanovicMW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AsanovicBKKMW92,
author = {Krste Asanovic and
James Beck and
Brian Kingsbury and
Phil Kohn and
Nelson Morgan and
John Wawrzynek},
title = {{SPERT:} a {VLIW/SIMD} microprocessor for artificial neural network
computations},
booktitle = {Application Specific Array Processors, {ASAP} 1992, Proceedings of
the International Conference on, Berkeley, CA, USA, 4-7 August, 1992},
pages = {178--190},
publisher = {{IEEE}},
year = {1992},
url = {https://doi.org/10.1109/ASAP.1992.218573},
doi = {10.1109/ASAP.1992.218573},
timestamp = {Sun, 08 Aug 2021 01:40:48 +0200},
biburl = {https://dblp.org/rec/conf/asap/AsanovicBKKMW92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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