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BibTeX records: Sameh W. Asaad
@inproceedings{DBLP:conf/fpga/SukhwaniKOSOWHA23, author = {Bharat Sukhwani and Mohit Kapur and Alda Ohmacht and Liran Schour and Martin Ohmacht and Chris Ward and Chuck Haymes and Sameh W. Asaad}, editor = {Paolo Ienne and Zhiru Zhang}, title = {Janus: An Experimental Reconfigurable SmartNIC with {P4} Programmability and {SDN} Isolation}, booktitle = {Proceedings of the 2023 {ACM/SIGDA} International Symposium on Field Programmable Gate Arrays, {FPGA} 2023, Monterey, CA, USA, February 12-14, 2023}, pages = {230}, publisher = {{ACM}}, year = {2023}, url = {https://doi.org/10.1145/3543622.3573158}, doi = {10.1145/3543622.3573158}, timestamp = {Sat, 25 Feb 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fpga/SukhwaniKOSOWHA23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sosp/ReidysXLSHCA023, author = {Benjamin Reidys and Yuqi Xue and Daixuan Li and Bharat Sukhwani and Wen{-}Mei Hwu and Deming Chen and Sameh W. Asaad and Jian Huang}, editor = {Jason Flinn and Margo I. Seltzer and Peter Druschel and Antoine Kaufmann and Jonathan Mace}, title = {RackBlox: {A} Software-Defined Rack-Scale Storage System with Network-Storage Co-Design}, booktitle = {Proceedings of the 29th Symposium on Operating Systems Principles, {SOSP} 2023, Koblenz, Germany, October 23-26, 2023}, pages = {182--199}, publisher = {{ACM}}, year = {2023}, url = {https://doi.org/10.1145/3600006.3613170}, doi = {10.1145/3600006.3613170}, timestamp = {Fri, 27 Oct 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/sosp/ReidysXLSHCA023.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-2309-06513, author = {Benjamin Reidys and Yuqi Xue and Daixuan Li and Bharat Sukhwani and Wen{-}mei W. Hwu and Deming Chen and Sameh W. Asaad and Jian Huang}, title = {RackBlox: {A} Software-Defined Rack-Scale Storage System with Network-Storage Co-Design}, journal = {CoRR}, volume = {abs/2309.06513}, year = {2023}, url = {https://doi.org/10.48550/arXiv.2309.06513}, doi = {10.48550/ARXIV.2309.06513}, eprinttype = {arXiv}, eprint = {2309.06513}, timestamp = {Tue, 19 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-2309-06513.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/micro/SukhwaniRHKMDSL17, author = {Bharat Sukhwani and Thomas Roewer and Charles L. Haymes and Kyu{-}Hyoun Kim and Adam J. McPadden and Daniel M. Dreps and Dean Sanner and Jan van Lunteren and Sameh W. Asaad}, editor = {Hillery C. Hunter and Jaime Moreno and Joel S. Emer and Daniel S{\'{a}}nchez}, title = {Contutto: a novel FPGA-based prototyping platform enabling innovation in the memory subsystem of a server class processor}, booktitle = {Proceedings of the 50th Annual {IEEE/ACM} International Symposium on Microarchitecture, {MICRO} 2017, Cambridge, MA, USA, October 14-18, 2017}, pages = {15--26}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3123939.3124535}, doi = {10.1145/3123939.3124535}, timestamp = {Fri, 28 Jul 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/micro/SukhwaniRHKMDSL17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/LeeMAS16, author = {Dajung Lee and Roger Moussalli and Sameh W. Asaad and Mudhakar Srivatsa}, title = {Spatial Predicates Evaluation in the Geohash Domain Using Reconfigurable Hardware}, booktitle = {24th {IEEE} Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2016, Washington, DC, USA, May 1-3, 2016}, pages = {176--183}, publisher = {{IEEE} Computer Society}, year = {2016}, url = {https://doi.org/10.1109/FCCM.2016.51}, doi = {10.1109/FCCM.2016.51}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/LeeMAS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijpp/SukhwaniTMDBAD15, author = {Bharat Sukhwani and Mathew Thoennes and Hong Min and Parijat Dube and Bernard Brezzo and Sameh W. Asaad and Donna Dillenberger}, title = {A Hardware/Software Approach for Database Query Acceleration with FPGAs}, journal = {Int. J. Parallel Program.}, volume = {43}, number = {6}, pages = {1129--1159}, year = {2015}, url = {https://doi.org/10.1007/s10766-014-0327-4}, doi = {10.1007/S10766-014-0327-4}, timestamp = {Wed, 01 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijpp/SukhwaniTMDBAD15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/MoussalliSA15, author = {Roger Moussalli and Mudhakar Srivatsa and Sameh W. Asaad}, title = {Fast and Flexible Conversion of Geohash Codes to and from Latitude/Longitude Coordinates}, booktitle = {23rd {IEEE} Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2015, Vancouver, BC, Canada, May 2-6, 2015}, pages = {179--186}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/FCCM.2015.18}, doi = {10.1109/FCCM.2015.18}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/MoussalliSA15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/micro/SukhwaniMTDBAD14, author = {Bharat Sukhwani and Hong Min and Mathew Thoennes and Parijat Dube and Bernard Brezzo and Sameh W. Asaad and Donna Dillenberger}, title = {Database Analytics: {A} Reconfigurable-Computing Approach}, journal = {{IEEE} Micro}, volume = {34}, number = {1}, pages = {19--29}, year = {2014}, url = {https://doi.org/10.1109/MM.2013.107}, doi = {10.1109/MM.2013.107}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/micro/SukhwaniMTDBAD14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/trets/KimAL14, author = {Lok{-}Won Kim and Sameh W. Asaad and Ralph Linsker}, title = {A Fully Pipelined {FPGA} Architecture of a Factored Restricted Boltzmann Machine Artificial Neural Network}, journal = {{ACM} Trans. Reconfigurable Technol. Syst.}, volume = {7}, number = {1}, pages = {5:1--5:23}, year = {2014}, url = {https://doi.org/10.1145/2539125}, doi = {10.1145/2539125}, timestamp = {Wed, 25 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/trets/KimAL14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sc/CassidyAASAMDTTAAEKAHBMBBMSCIMIMNVGNLAFJFRMM14, author = {Andrew S. Cassidy and Rodrigo Alvarez{-}Icaza and Filipp Akopyan and Jun Sawada and John V. Arthur and Paul Merolla and Pallab Datta and Marc Gonz{\'{a}}lez Tallada and Brian Taba and Alexander Andreopoulos and Arnon Amir and Steven K. Esser and Jeff Kusnitz and Rathinakumar Appuswamy and Chuck Haymes and Bernard Brezzo and Roger Moussalli and Ralph Bellofatto and Christian W. Baks and Michael Mastro and Kai Schleupen and Charles E. Cox and Ken Inoue and Steven E. Millman and Nabil Imam and Emmett McQuinn and Yutaka Y. Nakamura and Ivan Vo and Chen Guok and Don Nguyen and Scott Lekuch and Sameh W. Asaad and Daniel J. Friedman and Bryan L. Jackson and Myron Flickner and William P. Risk and Rajit Manohar and Dharmendra S. Modha}, editor = {Trish Damkroger and Jack J. Dongarra}, title = {Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with {\textasciitilde}100{\texttimes} Speedup in Time-to-Solution and {\textasciitilde}100, 000{\texttimes} Reduction in Energy-to-Solution}, booktitle = {International Conference for High Performance Computing, Networking, Storage and Analysis, {SC} 2014, New Orleans, LA, USA, November 16-21, 2014}, pages = {27--38}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/SC.2014.8}, doi = {10.1109/SC.2014.8}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/sc/CassidyAASAMDTTAAEKAHBMBBMSCIMIMNVGNLAFJFRMM14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/HalsteadSMTDAI13, author = {Robert J. Halstead and Bharat Sukhwani and Hong Min and Mathew Thoennes and Parijat Dube and Sameh W. Asaad and Balakrishna Iyer}, title = {Accelerating Join Operation for Relational Databases with FPGAs}, booktitle = {21st {IEEE} Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2013, Seattle, WA, USA, April 28-30, 2013}, pages = {17--20}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/FCCM.2013.17}, doi = {10.1109/FCCM.2013.17}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/HalsteadSMTDAI13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/globalsip/MoussalliSA13, author = {Roger Moussalli and Bharat Sukhwani and Sameh W. Asaad}, title = {{FINPAGE:} Generating high performance feed-specific parser circuits}, booktitle = {{IEEE} Global Conference on Signal and Information Processing, GlobalSIP 2013, Austin, TX, USA, December 3-5, 2013}, pages = {1132}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/GlobalSIP.2013.6737095}, doi = {10.1109/GLOBALSIP.2013.6737095}, timestamp = {Wed, 16 Oct 2019 14:14:51 +0200}, biburl = {https://dblp.org/rec/conf/globalsip/MoussalliSA13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sbac-pad/SukhwaniTMDBAD13, author = {Bharat Sukhwani and Mathew Thoennes and Hong Min and Parijat Dube and Bernard Brezzo and Sameh W. Asaad and Donna Dillenberger}, title = {Large Payload Streaming Database Sort and Projection on FPGAs}, booktitle = {25th International Symposium on Computer Architecture and High Performance Computing, {SBAC-PAD} 2013, Porto de Galinhas, Pernambuco, Brazil, October 23-26, 2013}, pages = {25--32}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/SBAC-PAD.2013.21}, doi = {10.1109/SBAC-PAD.2013.21}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/sbac-pad/SukhwaniTMDBAD13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/IEEEpact/SukhwaniMTDIBDA12, author = {Bharat Sukhwani and Hong Min and Mathew Thoennes and Parijat Dube and Balakrishna Iyer and Bernard Brezzo and Donna Dillenberger and Sameh W. Asaad}, editor = {Pen{-}Chung Yew and Sangyeun Cho and Luiz DeRose and David J. Lilja}, title = {Database analytics acceleration using FPGAs}, booktitle = {International Conference on Parallel Architectures and Compilation Techniques, {PACT} '12, Minneapolis, MN, {USA} - September 19 - 23, 2012}, pages = {411--420}, publisher = {{ACM}}, year = {2012}, url = {https://doi.org/10.1145/2370816.2370874}, doi = {10.1145/2370816.2370874}, timestamp = {Wed, 11 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/IEEEpact/SukhwaniMTDIBDA12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/AsaadBBHKPRSTT12, author = {Sameh W. Asaad and Ralph Bellofatto and Bernard Brezzo and Chuck Haymes and Mohit Kapur and Benjamin D. Parker and Thomas Roewer and Proshanta Saha and Todd Takken and Jos{\'{e}} A. Tierno}, editor = {Katherine Compton and Brad L. Hutchings}, title = {A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating multi-core processor simulation}, booktitle = {Proceedings of the {ACM/SIGDA} 20th International Symposium on Field Programmable Gate Arrays, {FPGA} 2012, Monterey, California, USA, February 22-24, 2012}, pages = {153--162}, publisher = {{ACM}}, year = {2012}, url = {https://doi.org/10.1145/2145694.2145720}, doi = {10.1145/2145694.2145720}, timestamp = {Tue, 06 Nov 2018 16:58:22 +0100}, biburl = {https://dblp.org/rec/conf/fpga/AsaadBBHKPRSTT12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/SahaHBBKA12, author = {Proshanta Saha and Chuck Haymes and Ralph Bellofatto and Bernard Brezzo and Mohit Kapur and Sameh W. Asaad}, editor = {Katherine Compton and Brad L. Hutchings}, title = {Efficient in-system {RTL} verification and debugging using FPGAs (abstract only)}, booktitle = {Proceedings of the {ACM/SIGDA} 20th International Symposium on Field Programmable Gate Arrays, {FPGA} 2012, Monterey, California, USA, February 22-24, 2012}, pages = {269}, publisher = {{ACM}}, year = {2012}, url = {https://doi.org/10.1145/2145694.2145753}, doi = {10.1145/2145694.2145753}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fpga/SahaHBBKA12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/SukhwaniABA11, author = {Bharat Sukhwani and B{\"{u}}lent Abali and Bernard Brezzo and Sameh W. Asaad}, editor = {Paul Chow and Michael J. Wirthlin}, title = {High-Throughput, Lossless Data Compresion on FPGAs}, booktitle = {{IEEE} 19th Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2011, Salt Lake City, Utah, USA, 1-3 May 2011}, pages = {113--116}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/FCCM.2011.56}, doi = {10.1109/FCCM.2011.56}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/SukhwaniABA11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/glvlsi/ZyubanAFHLM04, author = {Victor V. Zyuban and Sameh W. Asaad and Thomas W. Fox and Anne{-}Marie Haen and Daniel Littrell and Jaime H. Moreno}, editor = {David Garrett and John C. Lach and Charles A. Zukowski}, title = {Design methodology for semi custom processor cores}, booktitle = {Proceedings of the 14th {ACM} Great Lakes Symposium on {VLSI} 2004, Boston, MA, USA, April 26-28, 2004}, pages = {448--452}, publisher = {{ACM}}, year = {2004}, url = {https://doi.org/10.1145/988952.989060}, doi = {10.1145/988952.989060}, timestamp = {Fri, 20 Aug 2021 16:30:37 +0200}, biburl = {https://dblp.org/rec/conf/glvlsi/ZyubanAFHLM04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ibmrd/MorenoZSNDWKZGBAFLBNH03, author = {Jaime H. Moreno and Victor V. Zyuban and Uzi Shvadron and Fredy D. Neeser and Jeff H. Derby and Malcolm S. Ware and Krishnan Kailas and Ayal Zaks and Amir B. Geva and Shay Ben{-}David and Sameh W. Asaad and Thomas W. Fox and Daniel Littrell and Marina Biberstein and Dorit Naishlos and Hillery C. Hunter}, title = {An innovative low-power high-performance programmable signal processor for digital communications}, journal = {{IBM} J. Res. Dev.}, volume = {47}, number = {2-3}, pages = {299--326}, year = {2003}, url = {https://doi.org/10.1147/rd.472.0299}, doi = {10.1147/RD.472.0299}, timestamp = {Fri, 13 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ibmrd/MorenoZSNDWKZGBAFLBNH03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/islped/RiversAWM03, author = {Jude A. Rivers and Sameh W. Asaad and John{-}David Wellman and Jaime H. Moreno}, editor = {Ingrid Verbauwhede and Hyung Roh}, title = {Reducing instruction fetch energy with backwards branch control information and buffering}, booktitle = {Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003}, pages = {322--325}, publisher = {{ACM}}, year = {2003}, url = {https://doi.org/10.1145/871506.871586}, doi = {10.1145/871506.871586}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/islped/RiversAWM03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/BaptyNSSA00, author = {Ted Bapty and Sandeep Neema and Jason Scott and Janos Sztipanovits and Sameh W. Asaad}, title = {Model-integrated Tools for the Design of Dynamically Reconfigurable Systems}, journal = {{VLSI} Design}, volume = {10}, number = {3}, pages = {281--306}, year = {2000}, url = {https://doi.org/10.1155/2000/74708}, doi = {10.1155/2000/74708}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsi/BaptyNSSA00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/AsaadW98, author = {Sameh W. Asaad and Kevin W. Warren}, editor = {Reiner W. Hartenstein and Andres Keevallik}, title = {Speed Optimization of the {ALR} Circuit Using an {FPGA} with Embedded {RAM:} {A} Design Experience}, booktitle = {Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm, 8th International Workshop, FPL'98, Tallinn, Estonia, August 31 - September 3, 1998, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {1482}, pages = {278--287}, publisher = {Springer}, year = {1998}, url = {https://doi.org/10.1007/BFb0055255}, doi = {10.1007/BFB0055255}, timestamp = {Tue, 14 May 2019 10:00:48 +0200}, biburl = {https://dblp.org/rec/conf/fpl/AsaadW98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vts/KosonockyBWHKABHHIJJPRS98, author = {Stephen V. Kosonocky and Arthur A. Bright and Kevin W. Warren and Ruud A. Haring and Steve Klepner and Sameh W. Asaad and S. Basavaiah and Bob Havreluk and David F. Heidel and Michael Immediato and Keith A. Jenkins and Rajiv V. Joshi and Benjamin D. Parker and T. V. Rajeevakumar and Kevin Stawiasz}, title = {Designing a Testable System on a Chip}, booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998, Princeton, NJ, {USA}}, pages = {2--7}, publisher = {{IEEE} Computer Society}, year = {1998}, url = {https://doi.org/10.1109/VTEST.1998.670841}, doi = {10.1109/VTEST.1998.670841}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vts/KosonockyBWHKABHHIJJPRS98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iros/SuzumoriA96, author = {Koichi Suzumori and Sameh W. Asaad}, title = {A novel pneumatic rubber actuator for mobile robot bases}, booktitle = {Proceedings of {IEEE/RSJ} International Conference on Intelligent Robots and Systems. {IROS} 1996, November 4-8, 1996, Osaka, Japan}, pages = {1001--1006}, publisher = {{IEEE}}, year = {1996}, url = {https://doi.org/10.1109/IROS.1996.571091}, doi = {10.1109/IROS.1996.571091}, timestamp = {Sun, 14 Nov 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iros/SuzumoriA96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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