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Yucong Huang
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2020 – today
- 2024
- [c8]Bingzhen Chen, Xingbo Wang, Yucong Huang, Zhiyuan Xu:
RISCV-FNT: A Fast FNT-based RISC-V Processor for CNN Acceleration. AICAS 2024: 292-296 - [c7]Xingbo Wang
, Chenxi Feng
, Bingzhen Chen
, Qi Wang
, Yucong Huang
, Terry Tao Ye
:
RV-GEMM: Neural Network Inference Acceleration with Near-Memory GEMM Instructions on RISC-V. CF 2024 - [i1]Jiesong Lian, Yucong Huang, Mingzhi Wang, Chengdong Ma, Yixue Hao, Ying Wen, Yaodong Yang:
Fusion-PSRO: Nash Policy Fusion for Policy Space Response Oracles. CoRR abs/2405.21027 (2024) - 2023
- [c6]Jingyu He, Yucong Huang, Miguel Lastras, Terry Tao Ye
, Chi-Ying Tsui, Kwang-Ting Cheng:
RVComp: Analog Variation Compensation for RRAM-Based in-Memory Computing. ASP-DAC 2023: 246-251 - 2021
- [c5]Zhitao Yang, Zhujiang Han, Yucong Huang, Terry Tao Ye
:
55nm CMOS Analog Circuit Implementation of LIF and STDP Functions for Low-Power SNNs. ISLPED 2021: 1-6 - 2020
- [c4]Zhitao Yang, Yucong Huang, Jianghan Zhu, Terry Tao Ye
:
Analog Circuit Implementation of LIF and STDP Models for Spiking Neural Networks. ACM Great Lakes Symposium on VLSI 2020: 469-474 - [c3]Yucong Huang, Zhitao Yang, Jianghan Zhu, Terry Tao Ye
:
Analog Circuit Implementation of Neurons with Multiply-Accumulate and ReLU Functions. ACM Great Lakes Symposium on VLSI 2020: 493-498
2010 – 2019
- 2019
- [c2]Jianghan Zhu, Yucong Huang, Zhitao Yang, Xiaoying Tang, Terry Tao Ye
:
Analog Implementation of Reconfigurable Convolutional Neural Network Kernels. APCCAS 2019: 265-268 - 2015
- [c1]Yucong Huang, Bing Hu:
Enhanced DCTCP to explicitly inform of packet loss. ICC 2015: 5511-5516
Coauthor Index
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last updated on 2024-08-01 21:07 CEST by the dblp team
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