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Larry Dennison
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2020 – today
- 2023
- [c15]Mikhail Isaev
, Nic McDonald
, Larry Dennison
, Richard W. Vuduc
:
Calculon: a methodology and tool for high-level co-design of systems and large language models. SC 2023: 71:1-71:14 - 2022
- [j2]George Michelogiannakis
, Benjamin Klenk
, Brandon Cook
, Min Yee Teh
, Madeleine Glick
, Larry Dennison
, Keren Bergman
, John Shalf
:
A Case For Intra-rack Resource Disaggregation in HPC. ACM Trans. Archit. Code Optim. 19(2): 29:1-29:26 (2022) - 2020
- [j1]Madeleine Glick, Nathan C. Abrams, Qixiang Cheng
, Min Yee Teh, Yu-Han Hung, Oscar A. Jimenez
, Songtao Liu
, Yoshitomo Okawachi
, Xiang Meng
, Leif Johansson, Manya Ghobadi, Larry Dennison, George Michelogiannakis
, John Shalf
, Alan Y. Liu, John E. Bowers, Alexander L. Gaeta, Michal Lipson, Keren Bergman:
PINE: Photonic Integrated Networked Energy efficient datacenters (ENLITENED Program) [Invited]. JOCN 12(12): 443-456 (2020) - [c14]Benjamin Klenk, Nan Jiang, Greg Thorson, Larry Dennison:
An In-Network Architecture for Accelerating Shared-Memory Multiprocessor Collectives. ISCA 2020: 996-1009 - [c13]Benjamin Klenk, Larry Dennison:
Why Data Science and Machine Learning Need Silicon Photonics. OFC 2020: 1-3
2010 – 2019
- 2019
- [c12]George Michelogiannakis
, Yiwen Shen
, Min Yee Teh, Xiang Meng
, Benjamin Aivazi, Taylor L. Groves, John Shalf
, Madeleine Glick, Manya Ghobadi, Larry Dennison, Keren Bergman:
Bandwidth steering in HPC using silicon nanophotonics. SC 2019: 41:1-41:25 - 2018
- [c11]George Michelogiannakis
, Benjamin Aivazi, Yiwen Shen
, Larry Dennison, John Shalf
, Keren Bergman, Madeleine Glick:
Architectural Opportunities and Challenges from Emerging Photonics in Future Systems. PSC 2018: 1-3 - [c10]Matthias A. Blumrich, Nan Jiang, Larry R. Dennison:
Exploiting idle resources in a high-radix switch for supplemental storage. SC 2018: 4:1-4:13 - [c9]Hans Eberle, Larry Dennison:
Light-weight protocols for wire-speed ordering. SC 2018: 6:1-6:12 - [c8]William J. Dally, C. Thomas Gray, John Poulton, Brucek Khailany, John M. Wilson, Larry R. Dennison:
Hardware-Enabled Artificial Intelligence. VLSI Circuits 2018: 3-6 - 2017
- [c7]Benjamin Klenk, Holger Fröning, Hans Eberle, Larry Dennison:
Relaxations for High-Performance Message Passing on Massively Parallel SIMT Processors. IPDPS 2017: 855-865 - 2015
- [c6]Nan Jiang, Larry R. Dennison, William J. Dally:
Network endpoint congestion control for fine-grained communication. SC 2015: 35:1-35:12 - 2012
- [c5]Maysam Lavasani, Larry Dennison, Derek Chiou:
Compiling high throughput network processors. FPGA 2012: 87-96
1990 – 1999
- 1996
- [b1]Larry R. Dennison:
The reliable router: an architecture for fault tolerant interconnect. Massachusetts Institute of Technology, Cambridge, MA, USA, 1996 - 1995
- [c4]Larry R. Dennison, William J. Dally, Thucydides Xanthopoulos:
Low-latency plesiochronous data retiming. ARVLSI 1995: 304-315 - 1994
- [c3]William J. Dally, Larry R. Dennison, David Money Harris, Kinhong Kan, Thucydides Xanthopoulos:
Architecture and implementation of the reliable router. Hot Interconnects 1994: 197-208 - [c2]William J. Dally, Larry R. Dennison, David Money Harris, Kinhong Kan, Thucydides Xanthopoulos:
The Reliable Router: A Reliable and High-Performance Communication Substrate for Parallel Computers. PCRCW 1994: 241-255 - 1990
- [c1]Kevin Lam, Larry R. Dennison, William J. Dally:
Simultaneous bidirectional signalling for IC systems. ICCD 1990: 430-433
Coauthor Index
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