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ORCIDGordon Cichon
Person information
- affiliation: Mongolian University of Science and Technology, Ulaanbaatar, Mongolia
- affiliation (former): Ludwig Maximilian University of Munich, Germany
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2020 – today
- 2021
[j4]Ganbat Ganbaatar
, Dugar Nyamdorj, Gordon Cichon, Tseren-Onolt Ishdorj:
Implementation of RSA cryptographic algorithm using SN P systems based on HP/LP neurons. J. Membr. Comput. 3(1): 22-34 (2021)- 2020
- [j3]Otgonnaran Ochirbat, Tseren-Onolt Ishdorj, Gordon Cichon:
An error-tolerant serial binary full-adder via a spiking neural P system using HP/LP basic neurons. J. Membr. Comput. 2(1): 42-48 (2020)
2010 – 2019
- 2016
- [c13]Lin Li, Markus Fussenegger, Gordon Cichon:
A Data Locality and Memory Contention Analysis Method in Embedded NUMA Multi-core Systems. MCSoC 2016: 85-92 - 2014
- [c12]Gordon Cichon, Martin Hofmann:
Formal Semantics of Synchronous Transfer Architecture. Modellierung 2014: 257-272
2000 – 2009
- 2008
- [j2]Pablo Robelly, Gordon Cichon, Hendrik Ahlendorf, Gerhard P. Fettweis:
A HW/SW design methodology for embedded SIMD vector signal processors. Int. J. Embed. Syst. 3(3): 160-169 (2008) - 2005
- [c11]Emil Matús, Gordon Cichon, Hendrik Seidel, Pablo Robelly, Torsten Limberg, Gerhard P. Fettweis:
A Compiler-friendly and Low-power DSP architecture. GI Jahrestagung (1) 2005: 459 - [c10]Juan Pablo Robelly, Gordon Cichon, Hendrik Seidel, Gerhard P. Fettweis:
Design and automatic code generation of the LMS algorithm for SIMD signal processors. ICASSP (5) 2005: 81-84 - 2004
- [c9]Juan Pablo Robelly, Gordon Cichon, Hendrik Seidel, Gerhard P. Fettweis:
Implementation of recursive digital filters into vector SIMD DSP architectures. ICASSP (5) 2004: 165-168 - [c8]Gordon Cichon, Pablo Robelly, Hendrik Seidel, Marcus Bronzel, Gerhard P. Fettweis:
Compiler Scheduling for STA-Processors. PARELEC 2004: 45-50 - [c7]Hendrik Seidel, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis:
Hardware / Software Co-Design of a SIMD-DSP-Based DVB-T Receiver. PARELEC 2004: 221-225 - [c6]Pablo Robelly, Gordon Cichon, Hendrik Seidel, Gerhard P. Fettweis:
Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach. PARELEC 2004: 372-375 - [c5]Gordon Cichon, Gerhard P. Fettweis:
MOUSE: A Shortcut from Matlab Source to SIMD DSP Assembly Code. SAMOS 2004: 159-167 - [c4]Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matús, Marcus Bronzel, Gerhard P. Fettweis:
Synchronous Transfer Architecture (STA). SAMOS 2004: 343-352 - [c3]Hendrik Seidel, Emil Matús, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis:
Generated DSP Cores for Implementation of an OFDM Communication System. SAMOS 2004: 353-362 - 2002
- [j1]Gordon Cichon:
Schnittstellenbasierter Entwurf mit wiederverwendbaren Modulen (Interface Based Design Based With Reusable Modules). Informationstechnik Tech. Inform. 44(2): 75-81 (2002) - 2001
- [c2]Gordon Cichon, Winthir Brunnbauer:
Annotated data types for addressed token passing networks. DATE 2001: 801 - [c1]Winthir Brunnbauer, Gordon Cichon:
Bringing two worlds together: AAL2 over IP for radio access networks. GLOBECOM 2001: 2606-2610
Coauthor Index
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