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The Journal of VLSI Signal Processing, Volume 12

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Volume 12, Number 1, January 1996

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Wayne Luk, Duncan A. Buell:
Guest editors' introduction. 5
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James B. Peterson, Peter M. Athanas:
High-speed 2-D convolution with a custom computing machine. 7-19
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Laurent Moll, Jean Vuillemin, Philippe Boucard, Lars Lundheim:
Real-time high-energy physics applications on DECPeRLe-1 programmable active memory. 21-33
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Matthew Aubury, Wayne Luk:
Binomial filters. 35-50
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Paul Shaw, W. Paul Cockshott, Peter Barrie:
Implementation of lattice gases using FPGAs. 51-66
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James G. Eldredge, Brad L. Hutchings:
Run-Time Reconfiguration: A method for enhancing the functional density of SRAM-based FPGAs. 67-86
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Ian Page:
Constructing hardware-software systems from a single description. 87-107

Volume 12, Number 2, May 1996

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Maria Grazia Albanesi, Anna Antola, Marco Ferretti, Roberto M. Negrini:
A chip-set for the Generalized Hough Transform. 115-134
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Jinn-Wang Yeh, Wen-Jiunn Cheng, Chein-Wei Jen:
VASS - A VLSI array system synthesizer. 135-158
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Francis H. Y. Chan, Francis K. Lam, Hon Fung Li, J. G. Liu:
An all adder systolic structure for fast computation of moments. 159-175
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Roderick McConnell, Dominique Lavenier:
Prototyping of VLSI components from a formal specification. 177-186
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Karl-Heinz Zimmermann:
Linear mappings ofn-dimensional uniform recurrences ontok-dimensional systolic arrays. 187-202

Volume 12, Number 3, June 1996

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Javier D. Bruguera, Nicolás Guil, Tomás Lang, Julio Villalba, Emilio L. Zapata:
Cordic based parallel/pipelined architecture for the Hough transform. 207-221
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Joseph Thomas:
Pipelined systolic architectures for DLMS adaptive filtering. 223-246
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Tracy C. Denk, Keshab K. Parhi:
Lower bounds on memory requirements for statically scheduled DSP programs. 247-264
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Taewhan Kim, C. L. Liu:
An integrated algorithm for incremental data path synthesis. 265-285

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