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ORCIDSIGARCH Computer Architecture News, Volume 19
Volume 19, Number 1, March 1991
- Frank Thomson Leighton:
Selected Papers from the Symposium on Parallel Algorithms and Architectures. 5 - John Y. Ngai, Charles L. Seitz:
A framework for adaptive routing in multicomputer networks. 6-14 - Richard Beigel, Clyde P. Kruskal:
Processor networks and interconnection networks without long wires (extended abstract). 15-24 - Fred S. Annexstein:
Fault tolerance in hypercube-derivative networks (preliminary version). 25-34 - Richard M. Fujimoto:
The virtual machine. 35-44 - Gianfranco Bilardi, Scot W. Hornick, Majid Sarrafzadeh:
Optimal VLSI architectures for multidimensional DFT (preliminary version). 45-52 - Clark D. Thomborson
, Belle W. Y. Wei:
Systolic implementations of a move-to-front text compressor. 53-60 - Thomas F. Knight Jr.:
Technologies for low latency interconnection switches. 61-68 - Martin C. Herbordt, Charles C. Weems, James C. Corbett:
Message-passing algorithms for a SIMD torus with coteries. 69-78 - Smaragda Konstantinidou, Lawrence Snyder:
The chaos router: a practical application of randomization in network routing. 79-88 - Jehoshua Bruck, Robert Cypher, Danny Soroker:
Running algorithms efficiently on faulty hypercubes (extended abstract). 89-96 - Naomi Nishimura:
Asynchronous shared memory parallel computation (preliminary version). 97-105 - Mark Shand, Patrice Bertin, Jean Vuillemin:
Hardware speedups in long integer multiplication. 106-113 - Manu Thapar, Bruce Delagi:
Cache coherence for large scale shared memory multiprocessors. 114-119 - Peter Grabienski:
FLIP-FLOP: a stack-oriented multiprocessing system. 120-127 - Camille C. Price:
Task allocation in data flow multiprocessors: an annotated bibliography. 128-134 - Rod Adams, Gordon B. Steven:
A parallel pipelined processor with conditional instruction execution. 135-142 - Mark Thorson:
Usenet Nuggets. 146-150 - Michael L. Hilton:
Book review: Systems Programming in Parallel Logic Languages by lan Foster (Prentice Hall, 1990). 151 - Keith Anthony:
Book review: Technology Projection Modeling of Future Computer Systems by Al Cutaia (Prentice-Hall, 1990). 152-153 - Paul B. Schneck:
Book review: Optimizing FORTRAN Programs by C. F. Schofield (Halstead Press, 1989). 153-154 - Robert Bernecky:
Book review: Multiprocessors by Daniel Tabak (Prentice Hall, Englewood Cliffs, NJ). 154-156 - Robert Bernecky:
Book review: Multiprocessor Performance by Erol Gelenbe (J. Wiley & Sons, Chichester, England). 156-157 - John Fulcher:
Book review: Neural Net Applications and Products by Richard K. Miller, Terri C. Walker, and Anne M. Ryan (SEAl Technical Publications, 1990). 157-158
Volume 19, Number 2, April 1991
- David A. Patterson, Bob Rau:
ASPLOS-IV Proceedings - Forth International Conference on Architectural Support for Programming Languages and Operating Systems, Santa Clara, California, USA, April 8-11, 1991. ACM Press 1991, ISBN 0-89791-380-9 [contents]
Volume 19, Number 3, May 1991
- Zvonko G. Vranesic:
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, Canada, May, 27-30 1991. ACM 1991, ISBN 0-89791-394-9 [contents]
Volume 19, Number 4, June 1991
- Paul R. Wilson:
Pointer swizzling at page fault time: efficiently supporting huge address spaces on standard hardware. 6-13 - Morihiro Kuga, Kazuaki J. Murakami, Shinji Tomita:
DSNS (dynamically-hazard-resolved statically-code-scheduled, nonuniform superscalar): yet another superscalar processor architecture. 14-29 - Carl Ponder:
Performance variation across benchmark suites. 30-36 - Thomas M. Conte, Wen-mei W. Hwu:
A brief survey of benchmark usage in the architecture community. 37-44 - Todd D. Morris, Edward F. Gehringer:
A cost-effective reliable multipath interconnection network. 45-65 - Phillip A. Laplante:
An improved conditional branching scheme for a single instruction computer architecture. 66-68 - Andrew J. DuBois, John Rasure:
Design and evaluation of a distributed asynchronous VLSI crossbar switch controller for a packet switched supercomputer network. 69-79 - Stanley E. Lass:
The compiler controlled pack cache and messaging. 80-85 - Theo Ungerer, Eberhard Zehendner:
A multi-level parallelism architecture. 86-93 - Wolfgang Matthes:
How many operation units are adequate? 94-108 - Alberto R. Cunha, Carlos N. Ribeiro, José A. Marques:
The architecture of a memory management unit for object-oriented systems. 109-116 - Norman S. Matloff:
An argument against scalable cache coherency. 117-123 - Darren Patrick Rodohan, Ray J. Glover:
An overview of the A architecture for optimisation problems in a logic programming environment. 124-131 - Stuart C. Wray:
Time-sequenced DMA for multimedia computers. 132-137 - Ganesh Ramamoorthy, Alok N. Choudhary:
A bibliography for multiprocessor cache memories. 138-153 - Alan Jay Smith:
Second bibliography on Cache memories. 154-182 - Mark Thorson:
Usenet Nuggets. 185-191
Volume 19, Number 5, September 1991
- David A. Patterson:
Towards guidelines for SIGARCH sponsored conferences. 7 - Yeong-Chang Maa, Dhiraj K. Pradhan, Dominique Thiébaut:
Two economical directory schemes for large-scale cache coherent multiprocessors. 10 - Mark Thorson:
Usenet Nuggets. 21-26 - Vladimir G. Ivanovíc:
Book review: Computation Structures by Stephen A Ward and Robert H. Halstead, Jr. (MIT Press or McGraw-Hill, 1990). 27-29 - Moshe Krieger:
Book review: Multiprocessors by D. Tabak (Prentice-Hall, 1990). 27-29 - John Fulcher:
Book review: The 68000 and 68020 Microprocessors: Hardware, Software and Interfacing Techniques by W. Triebel and A. Singh (Prentice Hall, 1991). 29-30
Volume 19, Number 6, December 1991
- Henry G. Baker:
Precise instruction scheduling without a precise machine model. 4-8 - Robert McLaughlin:
Look-ahead branching hardware. 9-11 - Thomas Beth, Volker Hatz:
A restricted crossbar implementation and its applications. 12-16 - Mark Thorson:
Usenet nuggets. 19-23 - Robert Bernecky:
Book review: Past, Present, Parallel: A Survey of Available Parallel Computing Systems by Arthur Trew & Greg Wilson (Eds.), (Springer-Verlag 1991). 24-25
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