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ORCIDJournal of Systems Architecture - Embedded Systems Design, Volume 55
Volume 55, Number 1, January 2009
- Siew Kei Lam
, Thambipillai Srikanthan:
Rapid design of area-efficient custom instructions for reconfigurable embedded processing. 1-14 - Hyungkeun Song, Sukwon Choi, Hojung Cha, Rhan Ha:
Improving energy efficiency for flash memory based embedded applications. 15-24 - Andrés Ortiz, Julio Ortega Lopera, Antonio F. Díaz, Pablo Cascón, Alberto Prieto:
Protocol offload analysis by simulation. 25-42 - Adrian Moga, Michel Dubois:
A comparative evaluation of hybrid distributed shared-memory systems. 43-52 - Hai-Chen Wang, Chung-Kwong Yuen:
Exploiting an abstract-machine-based framework in the design of a Java ILP processor. 53-60 - Ruirui Guo, José G. Delgado-Frias:
IP Routing table compaction and sampling schemes to enhance TCAM cache performance. 61-69 - Neng-Chung Wang, Yi-Ping Hung:
Multicast communication in wormhole-routed 2D torus networks with hamiltonian cycle model. 70-78
Volume 55, Number 2, February 2009
- Fernando Castro, Daniel Chaver, Luis Piñuel, Manuel Prieto, Francisco Tirado:
Using age registers for a simple load-store queue filtering. 79-89 - Rodrigo M. Santos, Jorge Santos, Javier Orozco:
Power saving and fault-tolerance in real-time critical embedded systems. 90-101 - Sara Blanc, Alberto Bonastre, Pedro J. Gil:
Dependability assessment of by-wire control systems using fault injection. 102-113 - Joseph C. Libby, Kenneth B. Kent:
An embedded implementation of the Common Language Infrastructure. 114-126 - Marcos Sánchez-Élez, Nader Bagherzadeh, Román Hermida:
A framework for low energy data management in reconfigurable multi-context architectures. 127-139 - Guo-Huang Hsu, Chieh-Feng Chiang, Lun-Min Shih, Lih-Hsing Hsu, Jimmy J. M. Tan:
Conditional diagnosability of hypercubes under the comparison diagnosis model. 140-146
Volume 55, Number 3, March 2009
- Mariagiovanna Sami:
Guest Editor's introduction. 147-148 - Kostas Bousias, Liang Guang, Chris R. Jesshope, Mike Lankamp:
Implementation and evaluation of a microthread architecture. 149-161 - Michiel W. van Tol, Chris R. Jesshope, Mike Lankamp, Simon Polstra:
An implementation of the SANE Virtual Processor using POSIX threads. 162-169 - Onur Derin, Alberto Ferrante, Antonio Vincenzo Taddeo:
Coordinated management of hardware and software self-adaptivity. 170-179
- Abbas Shahini Shamsabadi, Behrouz Shahgholi Ghahfarokhi, Kamran Zamanifar, Naser Movahhedinia:
Applying inherent capabilities of quantum-dot cellular automata to design: D flip-flop case study. 180-187 - Arpad Gellert, Adrian Florea, Lucian N. Vintan:
Exploiting selective instruction reuse and value prediction in a superscalar architecture. 188-195 - Chun-Mok Chung, Jihong Kim:
Broadcast filtering: Snoop energy reduction in shared bus-based low-power MPSoCs. 196-208
Volume 55, Number 4, April 2009
- Ernesto Damiani, Seth Proctor:
Editorial. 209-210 - Christian Wolter, Michael Menzel, Andreas Schaad, Philip Miseldine, Christoph Meinel:
Model-driven business process security requirement specification. 211-223 - Florian Kerschbaum, Philip Robinson:
Security architecture for virtual organizations of business web services. 224-232 - Song Han, Tharam S. Dillon, Elizabeth Chang, Biming Tian:
Secure web services using two-way authentication and three-party key establishment for service delivery. 233-242 - Claudio Agostino Ardagna, Marco Cremonini, Gabriele Gianini:
Landscape-aware location-privacy protection in location-based services. 243-254 - Damjan Kovac, Denis Trcek:
Qualitative trust modeling in SOA. 255-263 - Bechara al Bouna, Richard Chbeir, Stefania Marrara:
Enforcing role based access control model with multimedia signatures. 264-274 - Layth Sliman, Frédérique Biennier, Youakim Badr:
A security policy framework for context-aware and user preferences in e-services. 275-288 - José M. Alcaraz Calero, Gabriel López Millán, Gregorio Martínez Pérez, Antonio Fernandez Gómez-Skarmeta:
Towards the homogeneous access and use of PKI solutions: Design and implementation of a WS-XKMS server. 289-297
Volume 55, Numbers 5-6, May - June 2009
- Yi-Jung Chen, Chia-Lin Yang, Yen-Sheng Chang:
An architectural co-synthesis algorithm for energy-aware Network-on-Chip design. 299-309 - Federico Baronti, Andrea Lazzeri, Roberto Roncella, Roberto Saletti:
FPGA/DSP-based implementation of a high-performance multi-channel counter. 310-316 - Tzu-Chi Huang, Ce-Kuen Shieh, Yu-Ben Miao:
Dual-Mode Execution Environment for active network. 317-331 - Tae-Sun Chung, Dong-Joo Park, Sangwon Park, Dong-Ho Lee, Sang-Won Lee, Ha-Joo Song:
A survey of Flash Translation Layer. 332-343 - Mouaaz Nahas, Michael J. Pont, Michael Short:
Reducing message-length variations in resource-constrained embedded systems implemented using the Controller Area Network (CAN) protocol. 344-354
Volume 55, Numbers 7-9, July - September 2009
- Daesung Lim, Nam Su Chang, Sung Yeon Ji, Chang Han Kim, Sangjin Lee, Young-Ho Park:
An efficient signed digit montgomery multiplication for RSA. 355-362 - Jan-Jan Wu, En-Jan Chou, Pangfeng Liu:
Computation and communication schedule optimization for data-sharing tasks on uniprocessor. 363-372 - Mostafa E. Salehi, Sied Mehdi Fakhraie:
Quantitative analysis of packet-processing applications regarding architectural guidelines for network-processing-engine development. 373-386 - Mohamed Bakhouya:
Evaluating the energy consumption and the silicon area of on-chip interconnect architectures. 387-395 - Haifeng Shen:
Maintaining constraints of UML models in distributed collaborative environments. 396-408 - Ismail Assayad:
A platform-based design framework for joint SW/HW multiprocessor systems design. 409-420
Volume 55, Numbers 10-12, October - December 2009
- Ramaswamy Ramaswamy, Ning Weng, Tilman Wolf:
Analysis of network processing workloads. 421-433 - Gyungho Lee, Yixin Shi:
Access region cache with register guided memory reference partitioning. 434-445 - Hyunhee Kim, Sungjune Youn, Jihong Kim:
Reusability-aware cache memory sharing for chip multiprocessors with private L2 caches. 446-456 - Bin Li, Lu Peng, Balachandran Ramadass:
Accurate and efficient processor performance prediction via regression tree based modeling. 457-467 - Saraju P. Mohanty:
A secure digital camera architecture for integrated real-time digital rights management. 468-480
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