Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDMicroprocessing and Microprogramming, Volume 33
Volume 33, Number 1, September 1991
- I. D'Antone:
A DSP-based VME system for event selection. 1-8 - Jae-Woo Chang, Yoon-Joon Lee:
Design and evaluation of multikey access methods using signature files. 9-19 - Hong Shen:
Fast path-disjoint routing in transputer networks. 21-31 - Lionel C. Waring:
Deadlock prevention in a communications shell using empty slots. 33-43 - George C. Wells:
An approach to the evaluation of microcomputer operating systems with respect to real-time issues. 45-55 - George C. Wells:
An evaluation of XENIX system V as a real-time operating system. 57-66
Volume 33, Number 2, November 1991
- Vincenzo Di Lecce, Eugenio Di Sciascio
:
Evaluation of a bit-serial ASIC chip for SAR processing. 71-78 - K. C. Lee:
A variable round-robin arbiter for high speed buses and statistical multiplexers. 79-90 - Luis A. Merayo, Juan I. Solana, Luisa Mola Morales:
A microprogram-based hardware implementation of the Leaky Bucket algorithm. 91-99 - Susanta Sarkar, Arun K. Majumdar:
An instruction systolic array implementation of the two-dimensional Fast Fourier Transform. 101-110 - Susanta Sarkar, Arun K. Majumdar, R. K. Sen:
A hardware efficient systolic solution to the two-dimensional Discrete Fourier Transform. 111-117 - Kang Zhang, Ray Thomas:
A dataflow Prolog execution model and its architectural support. 119-130
Volume 33, Number 3, May 1992
- Haron S. Andima:
Microcomputer modeling and optimization with dBASE. 133-143 - Jai-Hoon Chung, Hyunsoo Yoon, Seung Ryoul Maeng:
A systolic array exploiting the inherent parallelisms of artificial neural networks. 145-159 - Andrej Dobnikar, J. Ficzko, Damjan Podbregar, U. Rezar:
Invariant pattern classification neural network versus FT approach. 161-168 - P. Sankaran, V. Jagadeesh Kumar:
A microprocessor-based scheme for deriving sampling frequency. 169-172 - Hong Shen:
Occam implementation of process-to-processor mapping on the Hathi-2 transputer system. 173-189
Volume 33, Number 4, June 1992
- Xiaoming Fan:
Realization of multiprocessing on a RISC-like architecture. 195-206 - Young U. Kim, Songchun Moon:
Object-relationship diagrams for object-oriented modeling with concurrency feature. 207-221 - D. H. Oh, Jong H. Nang, Hyunsoo Yoon, Seung Ryoul Maeng:
An efficient mapping of Boltzmann machine computations onto distributed-memory multiprocessors. 223-236 - Venkat Tiruveedhula, J. S. Bedi:
Performance analysis of a cache-based multiprocessor system using data movement policies. 237-248
Volume 33, Number 5, August 1992
- George Hassapis:
Simulation of embedded VME multiprocessors. 253-260 - Jung H. Kim, Phill K. Rhee, Dong S. Ha:
An optimal domain-based reconfiguration algorithm for WSI processor arrays. 261-278 - Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose:
Register-interconnect optimization in data path synthesis. 279-288 - Il-Seok Oh:
Segmentation of cylindrical parts stored in a bin. 289-298 - Jie Wu, María M. Larrondo-Petrie:
Cube-connected-cubes network. 299-310
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-04-30 20:57 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
