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IPSJ Transactions on System LSI Design Methodology, Volume 18
Volume 18, Number 0, 2025
- Tohru Ishihara:

Message from the Editor-in-Chief. 1 - Masayuki Shimoda

, Atsushi Takahashi
:
Gridless Gap Channel Routing to Minimize Wirelength. 2-9 - Kenshu Seto:

Scalar Replacement in the Presence of Multiple Write Accesses with Non-constant Reuse Distances. 10-18 - Ryotaro Ohara, Masaya Kabuto, Atsushi Fukunaga, Masakazu Taichi, Yuto Yasuda, Riku Hamabe, Shintaro Izumi, Hiroshi Kawaguchi:

1W8R 20T SRAM Codebook for 20% Energy Reduction in Mixed-precision Deep-learning Inference Processor System. 19-27 - Mitsuru Hasegawa, Taiki Matsuzaki, Kunihiro Fujiyoshi:

Polygon Fracture Method Considering Maximum Shot Size for Variable Shaped-beam Mask Writing. 28-35 - Keizo Hiraga, Kenshu Seto, Kazuhiro Bessho, Masahiro Iida:

Proposal for Non-Volatilization of Logic Cell Architecture for eFPGA IP. 36-38

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