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ORCIDInternational Journal of Reconfigurable Computing, Volume 2019
Volume 2019, 2019
- Kizheppatt Vipin
:
AsyncBTree: Revisiting Binary Tree Topology for Efficient FPGA-Based NoC Implementation. 7239858:1-7239858:9 - Ting Zhang, Bin Liu:
Exposing End-to-End Delay in Software-Defined Networking. 7363901:1-7363901:12 - Nitish Das, Aruna Priya P.:
FPGA Implementation of an Improved Reconfigurable FSMIM Architecture Using Logarithmic Barrier Function Based Gradient Descent Approach. 3727254:1-3727254:17 - Michael Kirchhoff, Philipp Kerling, Detlef Streitferdt, Wolfgang Fengler:
A Real-Time Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor. 4723838:1-4723838:14 - Hamish J. Macintosh, Jasmine Banks, Neil A. Kelson:
Implementing and Evaluating an Heterogeneous, Scalable, Tridiagonal Linear System Solver with OpenCL to Target FPGAs, GPUs, and CPUs. 3679839:1-3679839:13 - Gianmarco Dinelli, Gabriele Meoni, Emilio Rapuano, Gionata Benelli, Luca Fanucci:
An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick. 7218758:1-7218758:13 - Roberto Giorgi, Farnam Khalili, Marco Procaccini:
Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise - Designing a Computer Architecture via HLS). 2624938:1-2624938:18 - Naveed Mahmud, Esam El-Araby:
Dimension Reduction Using Quantum Wavelet Transform on a High-Performance Reconfigurable Computer. 1949121:1-1949121:14 - Karim M. A. Ali, Rabie Ben Atitallah, Abdessamad Ait El Cadi, Nizar Fakhfakh, Jean-Luc Dekeyser:
ViPar: High-Level Design Space Exploration for Parallel Video Processing Architectures. 4298013:1-4298013:19 - Syed Waqar Nabi, Wim Vanderbauwhede:
Automatic Pipelining and Vectorization of Scientific Code for FPGAs. 7348013:1-7348013:12 - Rym Skhiri, Virginie Fresse, Jean-Paul Jamont, Benoît Suffran, Jihene Malek:
From FPGA to Support Cloud to Cloud of FPGA: State of the Art. 8085461:1-8085461:17 - Xin Fang, Stratis Ioannidis, Miriam Leeser:
SIFO: Secure Computational Infrastructure Using FPGA Overlays. 1439763:1-1439763:18
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