


default search action
CF 2025: Cagliari, Italy
- Francesca Palumbo, Antonino Tumeo, Ana Lucia Varbanescu, Yogesh Simmhan:
Proceedings of the 22nd ACM International Conference on Computing Frontiers, CF 2025, Cagliari, Italy, May 28-30, 2025. ACM 2025, ISBN 979-8-4007-1528-0
Keynote Abstracts
- Ingrid Verbauwhede
:
Hardware Security: state of the art: Keynote. 1 - Mathias Soeken
:
Quantum system architecture for utility scale: Keynote. 2
Full and Short Papers: Best Paper Candidates
- Vasileios Titopoulos
, George Alexakis
, Kosmas Alexandridis
, Chrysostomos Nicopoulos
, Giorgos Dimitrakopoulos
:
Register Dispersion: Reducing the Footprint of the Vector Register File in Vector Engines of Low-Cost RISC-V CPUs. 3-11 - Zexin Fu
, Riccardo Tedeschi
, Gianmarco Ottavi
, Nils Wistoff
, César Fuguet
, Davide Rossi
, Luca Benini
:
Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution. 12-20 - Jakob Gerhardt
, Johannes Langguth
:
Solution of Backtracking Problems on Tile-Centric AI Accelerators. 21-28
Crosscutting Developments and Hardware Frontiers
- Yanbin Chen
:
Unleashing Optimization in Dynamic Circuits through Branch Expansion. 29-37 - Zhuoqun Xia
, Lan Pu
, Jingjing Tan
, Yicong Shu
:
Multi-Task Collaborative Learning for Robust Diabetic Retinopathy Grading on Low-Quality Fundus Images. 38-46 - Zhuoqun Xia
, Yicong Shu
, Jingjing Tan
, Lan Pu
:
MCCNet: Multi-Scale Context Cross-Attention Network for Diabetic Retinopathy classification. 47-54 - Simone Perriello
:
Quantum Circuit Design for Finding k-Cliques via Quantum Amplitude Amplification Strategies. 55-63
Distributed Systems and Networking Frontiers
- Rentian Wei
, Wenli Zheng
:
NeurDORA: Neural-Aided Decentralized Offloading Based on Resource Auction. 64-67 - Lu Liu
, Xuan Liu
, Yong Yuan
, Dong Yang
, Yuanyuan Ke
:
A Novel Multi-Winner Auction-based Transaction Mechanism for Blockchain Storage Networks. 68-75 - Xiaoning Li
, Lu Wang
, Guangda Zhang
, Xia Zhao
, Shiqing Zhang
:
Flex8: A Flexible Precision Co-design for 8-bit Neural Network. 76-79 - Gianluca Brilli
, Alessandro Capotondi
, Paolo Burgio
, Andrea Marongiu
:
Enabling the Proxy Computing Paradigm on DPU-based FPGA Acceleration. 80-83 - Victor Isachi
, Alessandro Nadalini
, Riccardo Fiorani Gallotta
, Angelo Garofalo
, Francesco Conti
, Davide Rossi
:
FractalSync: Lightweight Scalable Global Synchronization of Massive Bulk Synchronous Parallel AI Accelerators. 84-87
Hardware Frontiers
- Junliang Wu
, Feng Xue
, Fuxin Zhang
:
AdaTP: Enhancing Temporal Prefetching with Adaptive Metadata Filtering. 88-97 - DongHuan Xie
, Zhenyu Gao
, Qingjie Lang
, Dunbo Zhang
, Junsheng Chang
, Li Shen
:
Combination of Storage and Accumulation for Synchronous SpMV Acceleration on FPGAs with HBM. 98-106 - Jiangyuan Gu
, Xunbo Hu
, Zidi Qin
, Shaojun Wei
, Shouyi Yin
:
Computing Efficiency Improvement for Multi-PEA CGRA with Built-in Control Design. 107-115
Memory Frontiers
- Christopher Reinwardt
, Robert Balas
, Alessandro Ottaviano
, Angelo Garofalo
, Luca Benini
:
CVA6-VMRT: A Modular Approach Towards Time-Predictable Virtual Memory in a 64-bit Application Class RISC-V Processor. 116-123 - Manuel Renz
, Sohan Lal
:
Enhancing Practicality of Memory Compression for GPUs with High-Throughput Simplifications. 124-127 - Zihao Yang
, Mengxin Zheng
, Shengyu Fan
, Qian Lou
, Rui Hou
, Dan Meng
, Mingzhe Zhang
:
Corrosion Hammer: A Self-Activated Bit-Flip Attack to the Processing-In-Memory Accelerator. 128-131
Pushing the Boundaries of Cross-Cutting Computing Challenges
- Kun Qin
, Xiaorang Guo
, Martin Schulz
, Carsten Trinitis
:
FERIVer: An FPGA-assisted Emulated Framework for RTL Verification of RISC-V Processors. 132-140 - Mathieu Escouteloup
, Vincent Migliore
:
PowerSecBench: reveal microarchitectural power leakages using generic RISC-V microbenchmarks. 141-150 - Minyu Cui
, Miquel Pericàs
:
Characterizing and Mitigating Performance Variability in Parallel Applications on Modern HPC multicore Systems. 151-158 - Pirah Noor Soomro
, Nikela Papadopoulou
, Miquel Pericàs
:
Accordion: A malleable pipeline scheduling approach for adaptive SLO-aware inference serving. 159-167
System Software and Runtime Frontiers
- Patrick Iff
, Benigna Bruggmann
, Blaise Morel
, Maciej Besta
, Luca Benini
, Torsten Hoefler
:
RapidChiplet: A Toolchain for Rapid Design Space Exploration of Inter-Chiplet Interconnects. 168-171 - Giacomo Belli
, Marco Mordacci
, Michele Amoretti
:
SRBB-based Quantum State Preparation. 172-175 - Benedikt Huber
, Andreas Krall
:
Pattern Matching, Transformation and Code Replacement on a Polyhedral Representation of Nested Loops. 176-184 - Ian Di Dio Lavore
, Guido Walter Di Donato
, Alberto Parravicini
, Francesco Sgherzi
, Daniele Bonetta
, Marco Domenico Santambrogio
:
Multi-GPU Greedy Scheduling Through a Polyglot Runtime. 185-194
Systems for AI
- Hongyu Wang
, Mingzhen Li
, Weile Jia
, Hailong Yang
, Guangming Tan
:
FastSpMM: Leveraging Tensor Cores for Sparse Matrix Multiplication. 195-204 - Xingbo Wang
, Chenxi Feng
, Xinyu Kang
, Yuru Li
, Yucong Huang
, Terry Tao Ye
:
Logic Gate Network Inference Acceleration with RISC-V Custom Instruction Set. 205-211 - Yueting Li
, Wanshuang Lin
, Wendong Xu
, Ngai Wong
, Weisheng Zhao
:
A Custom RISC-V ISA with Scalable Processing Units for Efficient Neural Network Inference. 212-215
Poster Papers
- Michele Fiorito
, Serena Curzel
, Fabrizio Ferrandi
:
POSTER: A System-level HW/SW Co-simulation Framework for HLS-generated Accelerators. 216-217 - Giorgio Cora
, Simone Tollardo
, Sarah Azimi
:
POSTER: A RISC-V Open-Source Platform for Reliability Evaluation in Safety-Critical Operating Systems. 218-219 - Eleonora Vacca
, Federico Buccellato
:
POSTER: Hardware-Aware Software-Based Fault Injection Platform for DNN Accelerators. 220-221 - Federico Buccellato
, Davide Nicolini
, Eleonora Vacca
, Corrado De Sio
, Luca Sterpone
:
POSTER: AI-Powered Anomaly Detection for Satellite Telemetry. 222-223 - Javier Jesus Poveda Rodrigo
, Mohamed Amine Hamdi
, Cyril Koenig
, Alessio Burrello
, Daniele Jahier Pagliari
, Luca Benini
:
POSTER: V-Seek: Optimizing LLM Reasoning on A Server-Class General-Purpose RISC-V Platform. 224-225 - Jakob Schäffeler
, Bengisu Elis
, Amir Raoofy
, Josef Weidendorfer
, Martin Schulz
:
POSTER: Performance Comparison of GPU Programming Models Using HeCBench Benchmarks. 226-227 - Panagiotis-Eleftherios Eleftherakis
, George Anagnostopoulos
, Anastassis Kapetanakis
, Mohammad Umair
, Jean-Yves Vet
, Konstantinos Iliakis
, Jonathan Vincent
, Jing Gong
, Ricardo Vinuesa
, Sotirios Xydis
:
POSTER: Performance Portability in GPU-Accelerated Spectral Finite Element Fluid Simulations: A Cross-layer Exploration Approach. 228-229

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.