25th Asian Test Symposium 2016: Hiroshima, Japan

Session 1A: Delay Test and Simulation

Session 1B: Fault Diagnosis, Debug and Verification

Session 1C: Hardware Security

Session 2A: Special Session 1

Session 2B: Analog and Mixed-Signal Test

Session 2C: Scan Test

Session 3A: Industry Session (Oral Presentation)

Session 3C: Fault Diagnosis

Session 4B: Fault Modeling

Session 4C: Power-Aware Test

Session 5A: Automatic Test Pattern Generation

Session 5B: Built-In Self-Test

Session 5C: 3D IC Testing

Session 6A: Special Session 4: Managing Reliability of Integrated Circuits: Lifetime Metering and Design for Healing

Session 6B: Fault Tolerance

Session 6C: Analog Circuits and High-Speed I/O Test

Session 7A: Memory Test and Reliability

Session 7B: Dependable Systems

a service of Schloss Dagstuhl - Leibniz Center for Informatics