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ORCID21st ARC 2025: Seville, Spain
- Roberto Giorgi
, Mirjana Stojilovic, Dirk Stroobandt, Piedad Brox Jiménez, Ángel Barriga Barros:
Applied Reconfigurable Computing. Architectures, Tools, and Applications - 21st International Symposium, ARC 2025, Seville, Spain, April 9-11, 2025, Proceedings. Lecture Notes in Computer Science 15594, Springer 2025, ISBN 978-3-031-87994-4
20 Years of ARC
- João M. P. Cardoso, Walid A. Najjar:
First Twenty Years of the International Symposium on Applied Reconfigurable Computing (ARC): A Selection of Papers. 3-12
Hardware Acceleration Frontiers
- Mohamed Amine Zhiri, Hana Krichene, Chiara Sandionigi, Sébastien Pillement:
HT-NoC: Reconfigurable High Throughput Network-on-Chip for AI Dataflow Accelerators. 15-32 - Yuxuan Wang, Cristian Tirelli, Lara Orlandic, Juan Sapriza, Rubén Rodríguez Álvarez, Giovanni Ansaloni, Laura Pozzi, David Atienza:
An MLIR-Based Compilation Framework for CGRA Application Deployment. 33-50 - Hiroshi Nakano, Krzysztof Blachut, Kamil Jeziorek, Piotr Wzorek, Manon Dampfhoffer, Thomas Mesquida, Hiroaki Nishi, Tomasz Kryjak, Thomas Dalgaty:
Hardware-Accelerated Event-Graph Neural Networks for Low-Latency Time-Series Classification on SoC FPGA. 51-68
Security and Resilience in FPGA Systems
- Giorgio Cora, Eleonora Vacca, Corrado De Sio, Sarah Azimi, Luca Sterpone:
RePAIR: Reconfigurable Platform for AI Resilience Within RISC-V Ecosystem. 71-87 - Dina G. Mahmoud, Simone Andreani, Vincent Lenders, Mirjana Stojilovic:
ROBoost: A Study of FPGA Logic-Based Power-Wasting Primitives. 88-105 - Arish Sateesan, Jo Vliegen, Nele Mentens:
FLARE: An FPGA-Based Universal Large Flow Detection Engine. 106-120
Efficient AI and Stream Analytics on FPGAs
- Deepak Kumar Athur, Rutuparn Pawar, Aman Arora:
Out-of-the-Box Performance of FPGAs for ML Workloads Using Vitis AI. 123-139 - Aymane Kharchouf, Smail Niar, Virginie Deniau, Rihab Hmida, Christophe Gaquière:
A Heterogeneous Embedded Platform for AI-Based Protocol Identification. 140-159 - Ali Ebrahim:
Counting Heavy Items in Filtered Data Streams Using an HLS-Generated FPGA Kernel. 160-175
Fast and Adaptive AI on FPGAs
- Atousa Jafari, Marco Platzner:
Ultra-Low Latency and Extreme-Throughput Echo State Neural Networks on FPGA. 179-195 - Muhammad Ihsan Al Hafiz, Naresh Balaji Ravichandran, Anders Lansner, Pawel Andrzej Herman, Artur Podobas:
A Reconfigurable Stream-Based FPGA Accelerator for Bayesian Confidence Propagation Neural Networks. 196-213 - Michal Danilowicz, Tomasz Kryjak:
Real-Time Multi-object Tracking Using YOLOv8 and SORT on a SoC FPGA. 214-230
Short Paper
- Téo Sobrino Alves, Vanderlei Bonato:
Dynamic Function Exchange in FPGA to Redefine RISC-V Multicore Architectures at Runtime. 233-243
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