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ORCID7th ACSD 2007: Bratislava, Slovak Republic
- Twan Basten, Gabriel Juhás, Sandeep K. Shukla:
Seventh International Conference on Application of Concurrency to System Design (ACSD 2007), 10-13 July 2007, Bratislava, Slovak Republic. IEEE Computer Society 2007, ISBN 978-0-7695-2902-8
Invited Papers
- Wil M. P. van der Aalst
, Christian W. Günther:
Finding Structure in Unstructured Processes: The Case for Process Mining. 3-12 - Philippe Darondeau:
Synthesis and Control of Asynchronous and Distributed Systems. 13-22 - Rishiyur S. Nikhil:
Composable Guarded Atomic Actions: a Bridging Model for SoC Design. 23-28 - Lothar Thiele, Iuliana Bacivarov, Wolfgang Haid, Kai Huang:
Mapping Applications to Tiled Multiprocessor Embedded Systems. 29-40
Regular Papers
- Souheib Baarir, Alexandre Duret-Lutz:
Emptiness Check of Powerset Buchi Automata using Inclusion Tests. 41-50 - Frédéric Béal, Tomohiro Yoneda, Chris J. Myers:
Hazard Checking of Timed Asynchronous Circuits Revisited. 51-60 - Hanifa Boucheneb, Hind Rakkay:
A more efficient time Petri net state space abstraction preserving linear properties. 61-70 - Juliana Küster Filipe Bowles, Behzad Bordbar:
A Formal Model for Integrating Multiple Views. 71-79 - Cécile Braunstein, Emmanuelle Encrenaz:
Using CTL formulae as component abstraction in a design and verification flow. 80-89 - Franck Cassez, Stavros Tripakis, Karine Altisen:
Sensor Minimization Problems with Static or Dynamic Observers for Fault Diagnosis. 90-99 - Yuan Chen, Fei Xia, Delong Shang, Alexandre Yakovlev:
The Design of Virtual Self-timed Block for Activity Communication in SOC. 100-109 - Raymond Devillers, Hanna Klaudel, Maciej Koutny:
Modelling Mobility in High-level Petri Nets. 110-119 - Guan Yu, Gauthier Lafruit, Peter Schelkens:
Platform-scalable Task Partition and Multilevel Buffering in Multi-processor Plessey Corner Detector. 120-126 - Jinfeng Huang, Jeroen Voeten, Marcel A. Groothuis, Jan F. Broenink, Henk Corporaal:
A model-driven design approach for mechatronic systems. 127-136 - Victor Khomenko:
Efficient Automatic Resolution of Encoding Conflicts Using STG Unfoldings. 137-146 - Victor Khomenko, Mark Schäfer, Walter Vogler:
Output-Determinacy and Asynchronous Circuit Synthesis. 147-156 - Robert Lorenz, Robin Bergenthum, Jörg Desel, Sebastian Mauser:
Synthesis of Petri Nets from Finite Partial Languages. 157-166 - Robert Lorenz, Sebastian Mauser, Robin Bergenthum:
Testing the executability of scenarios in general inhibitor nets. 167-176 - Jasen Markovski, Erik P. de Vink:
Real-Time Process Algebra with Stochastic Delays. 177-186 - Siamak Nazari, John G. Thistle:
Structural Conditions for Model-checking of Parameterized Networks. 187-196 - Danil Sokolov, Ivan Poliakov, Alexandre Yakovlev:
Asynchronous Data Path Models. 197-210
Tool Papers
- Ivana Budinska, Viktor Oravec, Emil Gatial, Michal Laclavik, Martin Seleng, Zoltán Balogh, Baltazár Frankovic, Radoslav Forgác, Igor Mokris, Ladislav Hluchý:
RAPORT - a knowledge support system for administrative workflow processes. 211-215 - Hossein Hojjat, Marjan Sirjani, Mohammad Reza Mousavi, Jan Friso Groote:
Sarir: A Rebeca to mCRL2 Translator. 216-222
Tutorial
- Martin Drozda:
Sensor and Ad HocWireless Networks. 223-230
Extended Abstracts
- Hemangee K. Kapoor:
Modelling Latency-Insensitive Systems in CSP. 231-232 - Donald C. Craig, Wlodek M. Zuberek:
Multicomponent Compatibility and its Verification. 233-235 - Wojciech Penczek, Maciej Szreter:
SAT-based Unbounded Model Checking of Timed Automata. 236-237 - Jinzhao Wu, Lin Zhao:
An Algebraic Approach to Multi-Valued Model Checking. 238-239 - Marius C. Bujorianu, Manuela-Luminita Bujorianu:
Towards Hilbertian Formal Methods. 240-241
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