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BibTeX record journals/ipsj/YabuuchiK16
@article{DBLP:journals/ipsj/YabuuchiK16, author = {Michitarou Yabuuchi and Kazutoshi Kobayashi}, title = {Size Optimization Technique for Logic Circuits that Considers {BTI} and Process Variations}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {9}, pages = {72--78}, year = {2016}, url = {https://doi.org/10.2197/ipsjtsldm.9.72}, doi = {10.2197/IPSJTSLDM.9.72}, timestamp = {Tue, 29 Sep 2020 10:57:17 +0200}, biburl = {https://dblp.org/rec/journals/ipsj/YabuuchiK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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