BibTeX record journals/corr/BhairannawarRRVP14

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@article{DBLP:journals/corr/BhairannawarRRVP14,
  author       = {Satish S. Bhairannawar and
                  R. Rathan and
                  K. B. Raja and
                  K. R. Venugopal and
                  Lalit M. Patnaik},
  title        = {{FPGA} Based Efficient Multiplier for Image Processing Applications
                  Using Recursive Error Free Mitchell Log Multiplier and {KOM} Architecture},
  journal      = {CoRR},
  volume       = {abs/1407.2082},
  year         = {2014},
  url          = {http://arxiv.org/abs/1407.2082},
  eprinttype    = {arXiv},
  eprint       = {1407.2082},
  timestamp    = {Mon, 23 Nov 2020 08:53:34 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/BhairannawarRRVP14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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