BibTeX record conf/sips/AbbaszadehD09

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@inproceedings{DBLP:conf/sips/AbbaszadehD09,
  author       = {Asgar Abbaszadeh and
                  Khosrov Dabbagh{-}Sadeghipour},
  title        = {A new FPGA-based postprocessor architecture for channel mismatch correction
                  of time interleaved {ADCS}},
  booktitle    = {Proceedings of the {IEEE} Workshop on Signal Processing Systems, SiPS
                  2009, October 7-9, 2009, Tampere, Finland},
  pages        = {202--207},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/SIPS.2009.5336252},
  doi          = {10.1109/SIPS.2009.5336252},
  timestamp    = {Sun, 21 May 2017 00:20:18 +0200},
  biburl       = {https://dblp.org/rec/conf/sips/AbbaszadehD09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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