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BibTeX record conf/recosoc/IakymchukRFB12
@inproceedings{DBLP:conf/recosoc/IakymchukRFB12, author = {Taras Iakymchuk and Alfredo Rosado and Jos{\'{e}} V. Franc{\'{e}}s and Manuel Bataller}, editor = {Leandro Soares Indrusiak and Guy Gogniat and Nikolaos S. Voros}, title = {Fast spiking neural network architecture for low-cost {FPGA} devices}, booktitle = {7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), York, United Kingdom, July 9-11, 2012}, pages = {1--6}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/ReCoSoC.2012.6322906}, doi = {10.1109/RECOSOC.2012.6322906}, timestamp = {Wed, 16 Oct 2019 14:14:56 +0200}, biburl = {https://dblp.org/rec/conf/recosoc/IakymchukRFB12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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