BibTeX record conf/isscc/SohnYOOSPSJSRYJ16

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@inproceedings{DBLP:conf/isscc/SohnYOOSPSJSRYJ16,
  author       = {Kyomin Sohn and
                  Won{-}Joo Yun and
                  Reum Oh and
                  Chi{-}Sung Oh and
                  Seong{-}Young Seo and
                  Min{-}Sang Park and
                  Dong{-}Hak Shin and
                  Won{-}Chang Jung and
                  Sang{-}Hoon Shin and
                  Je{-}Min Ryu and
                  Hye{-}Seung Yu and
                  Jae{-}Hun Jung and
                  Kyung{-}Woo Nam and
                  Seouk{-}Kyu Choi and
                  Jaewook Lee and
                  Uksong Kang and
                  Young{-}Soo Sohn and
                  Jung{-}Hwan Choi and
                  Chi{-}Wook Kim and
                  Seong{-}Jin Jang and
                  Gyo{-}Young Jin},
  title        = {18.2 {A} 1.2V 20nm 307GB/s {HBM} {DRAM} with at-speed wafer-level
                  {I/O} test scheme and adaptive refresh considering temperature distribution},
  booktitle    = {2016 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2016, San Francisco, CA, USA, January 31 - February 4, 2016},
  pages        = {316--317},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ISSCC.2016.7418034},
  doi          = {10.1109/ISSCC.2016.7418034},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SohnYOOSPSJSRYJ16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}