BibTeX record conf/isscc/BullDSDFB10

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@inproceedings{DBLP:conf/isscc/BullDSDFB10,
  author       = {David M. Bull and
                  Shidhartha Das and
                  Karthik Shivashankar and
                  Ganesh S. Dasika and
                  Kriszti{\'{a}}n Flautner and
                  David T. Blaauw},
  title        = {A power-efficient 32b {ARM} {ISA} processor using timing-error detection
                  and correction for transient-error tolerance and adaptation to {PVT}
                  variation},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
                  Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
                  2010},
  pages        = {284--285},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISSCC.2010.5433919},
  doi          = {10.1109/ISSCC.2010.5433919},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/BullDSDFB10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}