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ORCIDSang Joon Hwang
Person information
- affiliation: Samsung Electronics, Hwasung, Korea
- affiliation: Korea University, Department of Electrical Engineering, Seoul, South Korea
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2020 – today
- 2023
[i1]Seungki Hong, Dongha Kim, Jaehyung Lee, Reum Oh, Changsik Yoo, Sang Joon Hwang, Jooyoung Lee:
DSAC: Low-Cost Rowhammer Mitigation Using In-DRAM Stochastic and Approximate Counting Algorithm. CoRR abs/2302.03591 (2023)- 2022
- [c5]Dae-Hyun Kim
, Byungkyu Song, Hyun-A. Ahn, Woongjoon Ko, Sung-Geun Do, Seokjin Cho, Kihan Kim, Seung-Hoon Oh, Hye-Yoon Joo, Geuntae Park, Jin-Hun Jang, Yong-Hun Kim, Donghun Lee, Jaehoon Jung, Yongmin Kwon, Youngjae Kim, Jaewoo Jung, Seongil O, Seoulmin Lee, Jaeseong Lim, Junho Son, Jisu Min, Haebin Do, Jaejun Yoon, Isak Hwang, Jinsol Park, Hong Shim, Seryeong Yoon, Dongyeong Choi, Jihoon Lee, Soohan Woo, Eunki Hong, Junha Choi, Jae-Sung Kim, Sangkeun Han, Jong-Min Bang, Bokgue Park, Jang-Hoo Kim, Seouk-Kyu Choi, Gong-Heum Han, Yoo-Chang Sung, Wonil Bae, Jeong-Don Lim, Seungjae Lee, Changsik Yoo, Sang Joon Hwang, Jooyoung Lee:
A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process. ISSCC 2022: 448-450 - 2021
- [c4]Seunghwan Hong, Chang-Hyun Bae, Yoo-Chang Sung, Jaewoong Kim, Junsub Yoon, Sangwoo Kim, Jin-Hyeok Baek, Cheongryong Cho, Useung Shin, Sang-Kyeom Kim, Hwan-Chul Jung, Ho-Jun Chang, Jang-Hoo Kim, Jeongsik Hwang, Hyunki Kim, Ki-Won Lee, Dongmin Kim, Han-Ki Jeong, Myung-O. Kim, Kyomin Sohn, Jeong-Don Ihm, Changsik Yoo, Sang Joon Hwang:
A Reflection and Crosstalk Canceling Continuous-Time Linear Equalizer for High-Speed DDR SDRAM. VLSI Circuits 2021: 1-2
2000 – 2009
- 2008
- [j4]Sang Joon Hwang, Young-Hyun Jun, Man Young Sung:
A pre-emphasis output buffer control scheme for a GDDR3 SDRAM interface. IEICE Electron. Express 5(12): 446-450 (2008) - [j3]Aram Shin, Sang Jun Hwang, Seung Woo Yu, Man Young Sung:
Design of Organic TFT Pixel Electrode Circuit for Active-Matrix OLED Displays. J. Comput. 3(3): 1-5 (2008) - [j2]Seung-Jun Bae, Kwang-Il Park, Jeong-Don Ihm, Ho-Young Song, Woo-Jin Lee, Hyun-Jin Kim, Kyoung-Ho Kim, Yoon-Sik Park, Min-Sang Park, Hong-Kyong Lee, Sam-Young Bang, Gil-Shin Moon, Seokwon Hwang, Young-Chul Cho, Sang-Jun Hwang, Dae-Hyun Kim, Ji-Hoon Lim, Jae-Sung Kim, Sunghoon Kim, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim, Soo-In Cho:
An 80 nm 4 Gb/s/pin 32 bit 512 Mb GDDR4 Graphics DRAM With Low Power and Low Noise Data Bus Inversion. IEEE J. Solid State Circuits 43(1): 121-131 (2008) - 2007
- [c3]Aram Shin, Sang Jun Hwang, Seung Woo Yu, Man Young Sung:
A New Organic Thin-Film Transistor Based Current-Driving Pixel Circuit for Active-Matrix Organic Light-Emitting Displays. ISQED 2007: 59-66 - [c2]Jeong-Don Ihm, Seung-Jun Bae, Kwang-Il Park, Ho-Young Song, Woo-Jin Lee, Hyun-Jin Kim, Kyoung-Ho Kim, Ho-Kyung Lee, Min-Sang Park, Sam-Young Bang, Mi-Jin Lee, Gil-Shin Moon, Young-Wook Jang, Suk-Won Hwang, Young-Chul Cho, Sang-Jun Hwang, Dae-Hyun Kim, Ji-Hoon Lim, Jae-Sung Kim, Su-Jin Park, Ok-Joo Park, Se-Mi Yang, Jin-Yong Choi, Young-Wook Kim, Hyun-Kyu Lee, Sunghoon Kim, Seong-Jin Jang, Young-Hyun Jun, Soo-In Cho:
An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion. ISSCC 2007: 492-617 - 2005
- [j1]Sang-Bo Lee, Seong-Jin Jang, Jin-Seok Kwak, Sang-Jun Hwang, Young-Hyun Jun, Soo-In Cho, Chil-Gee Lee:
A 1.6-Gb/s/pin double data rate SDRAM with wave-pipelined CAS latency control. IEEE J. Solid State Circuits 40(1): 223-232 (2005) - [c1]Sang-Jun Hwang, Jaechun No, Sung-Soon Park:
A Case Study in Distributed Locking Protocol on Linux Clusters. International Conference on Computational Science (1) 2005: 380-387
Coauthor Index
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