BibTeX records: Steve Ngueya W.

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@article{DBLP:journals/jolpe/WPAMR18,
  author    = {Steve Ngueya W. and
               Jean Michel Portal and
               Hassen Aziza and
               Julien Mellier and
               Stephane Ricard},
  title     = {An Ultra-Low Power and High Performance Single Ended Sense Amplifier
               for Low Voltage Flash Memories},
  journal   = {J. Low Power Electronics},
  volume    = {14},
  number    = {1},
  pages     = {157--169},
  year      = {2018},
  url       = {https://doi.org/10.1166/jolpe.2018.1543},
  doi       = {10.1166/jolpe.2018.1543},
  timestamp = {Wed, 04 Apr 2018 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/jolpe/WPAMR18},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/WPAMR17,
  author    = {Steve Ngueya W. and
               Jean Michel Portal and
               Hassen Aziza and
               Julien Mellier and
               Stephane Ricard},
  title     = {A Power Efficient Regulated Charge Pump Based on Charge Sharing for
               Contactless Devices: An Alternative to Four-Phase Charge Pumps},
  journal   = {J. Low Power Electronics},
  volume    = {13},
  number    = {4},
  pages     = {595--604},
  year      = {2017},
  url       = {https://doi.org/10.1166/jolpe.2017.1519},
  doi       = {10.1166/jolpe.2017.1519},
  timestamp = {Thu, 04 Jan 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/jolpe/WPAMR17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ngcas/WMRPA17,
  author    = {Steve Ngueya W. and
               Julien Mellier and
               Stephane Ricard and
               Jean Michel Portal and
               Hassen Aziza},
  title     = {An Ultra-Low Power and High Speed Single Ended Sense Amplifier for
               Non-Volatile Memories},
  booktitle = {New Generation of CAS, {NGCAS} 2017, Genova, Italy, September 6-9,
               2017},
  pages     = {209--212},
  year      = {2017},
  crossref  = {DBLP:conf/ngcas/2017},
  url       = {https://doi.org/10.1109/NGCAS.2017.33},
  doi       = {10.1109/NGCAS.2017.33},
  timestamp = {Fri, 27 Oct 2017 14:04:25 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ngcas/WMRPA17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/norchip/WMRPA17,
  author    = {Steve Ngueya W. and
               Julien Mellier and
               Stephane Ricard and
               Jean Michel Portal and
               Hassen Aziza},
  title     = {Power efficiency optimization of charge pumps in embedded low voltage
               {NOR} flash memory},
  booktitle = {{IEEE} Nordic Circuits and Systems Conference, {NORCAS} 2017: {NORCHIP}
               and International Symposium of System-on-Chip (SoC), Link{\"{o}}ping,
               Sweden, October 23-25, 2017},
  pages     = {1--5},
  year      = {2017},
  crossref  = {DBLP:conf/norchip/2017},
  url       = {https://doi.org/10.1109/NORCHIP.2017.8124949},
  doi       = {10.1109/NORCHIP.2017.8124949},
  timestamp = {Mon, 12 Mar 2018 11:45:50 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/norchip/WMRPA17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/WMRPA17,
  author    = {Steve Ngueya W. and
               Julien Mellier and
               Stephane Ricard and
               Jean Michel Portal and
               Hassen Aziza},
  title     = {High voltage recycling scheme to improve power consumption of regulated
               charge pumps},
  booktitle = {27th International Symposium on Power and Timing Modeling, Optimization
               and Simulation, {PATMOS} 2017, Thessaloniki, Greece, September 25-27,
               2017},
  pages     = {1--5},
  year      = {2017},
  crossref  = {DBLP:conf/patmos/2017},
  url       = {https://doi.org/10.1109/PATMOS.2017.8106995},
  doi       = {10.1109/PATMOS.2017.8106995},
  timestamp = {Thu, 23 Nov 2017 14:53:04 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/patmos/WMRPA17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ngcas/2017,
  title     = {New Generation of CAS, {NGCAS} 2017, Genova, Italy, September 6-9,
               2017},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8049744},
  isbn      = {978-1-5090-6447-2},
  timestamp = {Fri, 27 Oct 2017 14:04:25 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ngcas/2017},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/norchip/2017,
  title     = {{IEEE} Nordic Circuits and Systems Conference, {NORCAS} 2017: {NORCHIP}
               and International Symposium of System-on-Chip (SoC), Link{\"{o}}ping,
               Sweden, October 23-25, 2017},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8119342},
  isbn      = {978-1-5386-2844-7},
  timestamp = {Mon, 12 Mar 2018 11:45:50 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/norchip/2017},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/patmos/2017,
  title     = {27th International Symposium on Power and Timing Modeling, Optimization
               and Simulation, {PATMOS} 2017, Thessaloniki, Greece, September 25-27,
               2017},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8095277},
  isbn      = {978-1-5090-6462-5},
  timestamp = {Thu, 23 Nov 2017 14:53:04 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/patmos/2017},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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