BibTeX records: Steffen Vaas

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Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
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@phdthesis{DBLP:phd/dnb/Vaas22,
  author       = {Steffen Vaas},
  title        = {Anwendungsspezifische Mehrkernarchitekturen f{\"{u}}r sicherheitskritische
                  Echtzeitanwendungen},
  school       = {University of Erlangen-Nuremberg, Germany},
  year         = {2022},
  url          = {https://d-nb.info/1259455955},
  isbn         = {978-3-8439-5040-4},
  timestamp    = {Thu, 11 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/phd/dnb/Vaas22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isorc/VaasUEWRF21,
  author       = {Steffen Vaas and
                  Peter Ulbrich and
                  Christian Eichler and
                  Peter W{\"{a}}gemann and
                  Marc Reichenbach and
                  Dietmar Fey},
  title        = {Taming Non-Deterministic Low-Level {I/O:} Predictable Multi-Core Real-Time
                  Systems by SoC Co-Design},
  booktitle    = {24th {IEEE} International Symposium on Real-Time Distributed Computing,
                  {ISORC} 2021, Daegu, South Korea, June 1-3, 2021},
  pages        = {43--52},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISORC52013.2021.00017},
  doi          = {10.1109/ISORC52013.2021.00017},
  timestamp    = {Mon, 09 Aug 2021 15:26:42 +0200},
  biburl       = {https://dblp.org/rec/conf/isorc/VaasUEWRF21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/VaasURF19,
  author       = {Steffen Vaas and
                  Peter Ulbrich and
                  Marc Reichenbach and
                  Dietmar Fey},
  title        = {Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems
                  with Diverse Predictability Demands},
  journal      = {J. Signal Process. Syst.},
  volume       = {91},
  number       = {7},
  pages        = {773--786},
  year         = {2019},
  url          = {https://doi.org/10.1007/s11265-018-1389-0},
  doi          = {10.1007/S11265-018-1389-0},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/VaasURF19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dasip/ReichenbachLVF18,
  author       = {Marc Reichenbach and
                  Lukas Liebischer and
                  Steffen Vaas and
                  Dietmar Fey},
  title        = {Comparison of Lane Detection Algorithms for {ADAS} Using Embedded
                  Hardware Architectures},
  booktitle    = {2018 Conference on Design and Architectures for Signal and Image Processing,
                  {DASIP} 2018, Porto, Portugal, October 10-12, 2018},
  pages        = {48--53},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/DASIP.2018.8596994},
  doi          = {10.1109/DASIP.2018.8596994},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/dasip/ReichenbachLVF18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/europar/BauerHRVHF18,
  author       = {Wolfgang Bauer and
                  Philipp Holzinger and
                  Marc Reichenbach and
                  Steffen Vaas and
                  Paul Hartke and
                  Dietmar Fey},
  editor       = {Gabriele Mencagli and
                  Dora B. Heras and
                  Valeria Cardellini and
                  Emiliano Casalicchio and
                  Emmanuel Jeannot and
                  Felix Wolf and
                  Antonio Salis and
                  Claudio Schifanella and
                  Ravi Reddy Manumachu and
                  Laura Ricci and
                  Marco Beccuti and
                  Laura Antonelli and
                  Jos{\'{e}} Daniel Garc{\'{\i}}a S{\'{a}}nchez and
                  Stephen L. Scott},
  title        = {Programmable {HSA} Accelerators for Zynq UltraScale+ MPSoC Systems},
  booktitle    = {Euro-Par 2018: Parallel Processing Workshops - Euro-Par 2018 International
                  Workshops, Turin, Italy, August 27-28, 2018, Revised Selected Papers},
  series       = {Lecture Notes in Computer Science},
  volume       = {11339},
  pages        = {733--744},
  publisher    = {Springer},
  year         = {2018},
  url          = {https://doi.org/10.1007/978-3-030-10549-5\_57},
  doi          = {10.1007/978-3-030-10549-5\_57},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/europar/BauerHRVHF18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ewme/RachujRVF18,
  author       = {Sebastian Rachuj and
                  Marc Reichenbach and
                  Steffen Vaas and
                  Dietmar Fey},
  title        = {Autonomous Driving in the Curriculum of Computer Architecture},
  booktitle    = {12th European Workshop on Microelectronics Education, {EWME} 2018,
                  Braunschweig, Germany, September 24-26, 2018},
  pages        = {11--16},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/EWME.2018.8629484},
  doi          = {10.1109/EWME.2018.8629484},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ewme/RachujRVF18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dasip/VaasURF17,
  author       = {Steffen Vaas and
                  Peter Ulbrich and
                  Marc Reichenbach and
                  Dietmar Fey},
  title        = {The best of both: High-performance anc deterministic real-time executive
                  by application-specific multi-core SoCs},
  booktitle    = {2017 Conference on Design and Architectures for Signal and Image Processing,
                  {DASIP} 2017, Dresden, Germany, September 27-29, 2017},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/DASIP.2017.8122107},
  doi          = {10.1109/DASIP.2017.8122107},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/dasip/VaasURF17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/samos/LieskePVRF17,
  author       = {Tobias Lieske and
                  Benjamin Pfundt and
                  Steffen Vaas and
                  Marc Reichenbach and
                  Dietmar Fey},
  editor       = {Yale N. Patt and
                  S. K. Nandy},
  title        = {System on chip generation for multi-sensor and sensor fusion applications},
  booktitle    = {2017 International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July
                  17-20, 2017},
  pages        = {20--29},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/SAMOS.2017.8344607},
  doi          = {10.1109/SAMOS.2017.8344607},
  timestamp    = {Tue, 27 Apr 2021 15:13:55 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/LieskePVRF17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ipps/VaasRF16,
  author       = {Steffen Vaas and
                  Marc Reichenbach and
                  Dietmar Fey},
  title        = {An Application-Specific Instruction Set Processor for Power Quality
                  Monitoring},
  booktitle    = {2016 {IEEE} International Parallel and Distributed Processing Symposium
                  Workshops, {IPDPS} Workshops 2016, Chicago, IL, USA, May 23-27, 2016},
  pages        = {181--188},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/IPDPSW.2016.143},
  doi          = {10.1109/IPDPSW.2016.143},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ipps/VaasRF16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/VaasRMF16,
  author       = {Steffen Vaas and
                  Marc Reichenbach and
                  Ulrich Margull and
                  Dietmar Fey},
  editor       = {Peter M. Athanas and
                  Ren{\'{e}} Cumplido and
                  Claudia Feregrino and
                  Ron Sass},
  title        = {The {R2-D2} toolchain - Automated porting of safety-critical applications
                  to FPGAs},
  booktitle    = {International Conference on ReConFigurable Computing and FPGAs, ReConFig
                  2016, Cancun, Mexico, November 30 - Dec. 2, 2016},
  pages        = {1--7},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ReConFig.2016.7857192},
  doi          = {10.1109/RECONFIG.2016.7857192},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/reconfig/VaasRMF16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/ReichenbachLVHF15,
  author       = {Marc Reichenbach and
                  Tobias Lieske and
                  Steffen Vaas and
                  Konrad H{\"{a}}ublein and
                  Dietmar Fey},
  editor       = {Michael H{\"{u}}bner and
                  Maya B. Gokhale and
                  Ren{\'{e}} Cumplido},
  title        = {{FAUPU} - {A} design framework for the development of programmable
                  image processing architectures},
  booktitle    = {International Conference on ReConFigurable Computing and FPGAs, ReConFig
                  2015, Riviera Maya, Mexico, December 7-9, 2015},
  pages        = {1--8},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ReConFig.2015.7393309},
  doi          = {10.1109/RECONFIG.2015.7393309},
  timestamp    = {Wed, 28 Apr 2021 16:06:54 +0200},
  biburl       = {https://dblp.org/rec/conf/reconfig/ReichenbachLVHF15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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