BibTeX records: Choungki Song

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@article{DBLP:journals/jssc/KwonLKOPHKHPKKJ23,
  author       = {Dae{-}Han Kwon and
                  Seongju Lee and
                  Kyuyoung Kim and
                  Sanghoon Oh and
                  Joonhong Park and
                  Gimoon Hong and
                  Dongyoon Ka and
                  Kyu{-}Dong Hwang and
                  Jeongje Park and
                  Kyeong Pil Kang and
                  Jungyeon Kim and
                  Junyeol Jeon and
                  Nahsung Kim and
                  Yongkee Kwon and
                  Kornijcuk Vladimir and
                  Woojae Shin and
                  Jongsoon Won and
                  Minkyu Lee and
                  Hyunha Joo and
                  Haerang Choi and
                  Guhyun Kim and
                  Byeongju An and
                  Jaewook Lee and
                  Donguc Ko and
                  Younggun Jun and
                  Ilwoong Kim and
                  Choungki Song and
                  Ilkon Kim and
                  Chanwook Park and
                  Seho Kim and
                  Chunseok Jeong and
                  Euicheol Lim and
                  Dongkyun Kim and
                  Jieun Jang and
                  Il Park and
                  Junhyun Chun and
                  Joohwan Cho},
  title        = {A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting
                  1TFLOPS {MAC} Operation and Various Activation Functions for Deep
                  Learning Application},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {58},
  number       = {1},
  pages        = {291--302},
  year         = {2023},
  url          = {https://doi.org/10.1109/JSSC.2022.3200718},
  doi          = {10.1109/JSSC.2022.3200718},
  timestamp    = {Sun, 15 Jan 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/KwonLKOPHKHPKKJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/LeeKOPHKHPKKJKK22,
  author       = {Seong Ju Lee and
                  Kyu{-}Young Kim and
                  Sanghoon Oh and
                  Joonhong Park and
                  Gimoon Hong and
                  Dong Yoon Ka and
                  Kyu{-}Dong Hwang and
                  Jeongje Park and
                  Kyeong Pil Kang and
                  Jungyeon Kim and
                  Junyeol Jeon and
                  Nahsung Kim and
                  Yongkee Kwon and
                  Kornijcuk Vladimir and
                  Woojae Shin and
                  Jongsoon Won and
                  Minkyu Lee and
                  Hyunha Joo and
                  Haerang Choi and
                  Jaewook Lee and
                  Donguc Ko and
                  Younggun Jun and
                  Keewon Cho and
                  Ilwoong Kim and
                  Choungki Song and
                  Chunseok Jeong and
                  Dae{-}Han Kwon and
                  Jieun Jang and
                  Il Park and
                  Junhyun Chun and
                  Joohwan Cho},
  title        = {A 1ynm 1.25V 8Gb, 16Gb/s/pin GDDR6-based Accelerator-in-Memory supporting
                  1TFLOPS {MAC} Operation and Various Activation Functions for Deep-Learning
                  Applications},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
                  San Francisco, CA, USA, February 20-26, 2022},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ISSCC42614.2022.9731711},
  doi          = {10.1109/ISSCC42614.2022.9731711},
  timestamp    = {Mon, 21 Mar 2022 13:32:47 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/LeeKOPHKHPKKJKK22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/HeSKJK0TV20,
  author       = {Mingxuan He and
                  Choungki Song and
                  Ilkon Kim and
                  Chunseok Jeong and
                  Seho Kim and
                  Il Park and
                  Mithuna Thottethodi and
                  T. N. Vijaykumar},
  title        = {Newton: {A} DRAM-maker's Accelerator-in-Memory (AiM) Architecture
                  for Machine Learning},
  booktitle    = {53rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
                  {MICRO} 2020, Athens, Greece, October 17-21, 2020},
  pages        = {372--385},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/MICRO50266.2020.00040},
  doi          = {10.1109/MICRO50266.2020.00040},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/HeSKJK0TV20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/KimSCHJ19,
  author       = {Nam Sung Kim and
                  Choungki Song and
                  Woo Young Cho and
                  Jian Huang and
                  Myoungsoo Jung},
  title        = {{LL-PCM:} Low-Latency Phase Change Memory Architecture},
  booktitle    = {Proceedings of the 56th Annual Design Automation Conference 2019,
                  {DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019},
  pages        = {14},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3316781.3317853},
  doi          = {10.1145/3316781.3317853},
  timestamp    = {Sun, 08 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/dac/KimSCHJ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/IEEEpact/YazdanbakhshSSL18,
  author       = {Amir Yazdanbakhsh and
                  Choungki Song and
                  Jacob Sacks and
                  Pejman Lotfi{-}Kamran and
                  Hadi Esmaeilzadeh and
                  Nam Sung Kim},
  editor       = {Skevos Evripidou and
                  Per Stenstr{\"{o}}m and
                  Michael F. P. O'Boyle},
  title        = {In-DRAM near-data approximate acceleration for GPUs},
  booktitle    = {Proceedings of the 27th International Conference on Parallel Architectures
                  and Compilation Techniques, {PACT} 2018, Limassol, Cyprus, November
                  01-04, 2018},
  pages        = {34:1--34:14},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3243176.3243188},
  doi          = {10.1145/3243176.3243188},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/IEEEpact/YazdanbakhshSSL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieiceee/LiSWAK16,
  author       = {Bingchao Li and
                  Choungki Song and
                  Jizeng Wei and
                  Jung Ho Ahn and
                  Nam Sung Kim},
  title        = {Exploring new features of high-bandwidth memory for GPUs},
  journal      = {{IEICE} Electron. Express},
  volume       = {13},
  number       = {14},
  pages        = {20160527},
  year         = {2016},
  url          = {https://doi.org/10.1587/elex.13.20160527},
  doi          = {10.1587/ELEX.13.20160527},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ieiceee/LiSWAK16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hpca/GopireddySTKAM16,
  author       = {Bhargava Gopireddy and
                  Choungki Song and
                  Josep Torrellas and
                  Nam Sung Kim and
                  Aditya Agrawal and
                  Asit K. Mishra},
  title        = {ScalCore: Designing a core for voltage scalability},
  booktitle    = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
                  {HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
  pages        = {681--693},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/HPCA.2016.7446104},
  doi          = {10.1109/HPCA.2016.7446104},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hpca/GopireddySTKAM16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/KooOKKSLKKLOLLLLJJCKHKCK12,
  author       = {Kibong Koo and
                  Sunghwa Ok and
                  Yonggu Kang and
                  Seungbong Kim and
                  Choungki Song and
                  Hyeyoung Lee and
                  Hyungsoo Kim and
                  Yongmi Kim and
                  Jeonghun Lee and
                  Seunghan Oak and
                  Yosep Lee and
                  Jungyu Lee and
                  Joongho Lee and
                  Hyungyu Lee and
                  Jaemin Jang and
                  Jongho Jung and
                  Byeongchan Choi and
                  Yong{-}Ju Kim and
                  Youngdo Hur and
                  Yunsaing Kim and
                  Byong{-}Tae Chung and
                  Yongtak Kim},
  title        = {A 1.2V 38nm 2.4Gb/s/pin 2Gb {DDR4} {SDRAM} with bank group and {\texttimes}4
                  half-page architecture},
  booktitle    = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2012, San Francisco, CA, USA, February 19-23, 2012},
  pages        = {40--41},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISSCC.2012.6176869},
  doi          = {10.1109/ISSCC.2012.6176869},
  timestamp    = {Mon, 11 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/KooOKKSLKKLOLLLLJJCKHKCK12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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