BibTeX records: Byeong Cheol Na

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@inproceedings{DBLP:conf/vlsic/KlevelandCKACCC14,
  author       = {Bendik Kleveland and
                  Jeong Choi and
                  Jeff Kumala and
                  Pascal Adam and
                  Patrick Chen and
                  Rajesh Chopra and
                  Antonio Cruz and
                  Ronald B. David and
                  Ashish Dixit and
                  Sinan Doluca and
                  Mark Hendrickson and
                  Ben Lee and
                  Ming Liu and
                  Michael John Miller and
                  Mike Morrison and
                  Byeong Cheol Na and
                  Jay Patel and
                  Dipak K. Sikdar and
                  Michael Sporer and
                  Clement Szeto and
                  Anju Tsao and
                  Jianguang Wang and
                  Daniel Yau and
                  Wesley Yu},
  title        = {Early detection and repair of {VRT} and aging {DRAM} bits by margined
                  in-field {BIST}},
  booktitle    = {Symposium on {VLSI} Circuits, {VLSIC} 2014, Digest of Technical Papers,
                  Honolulu, HI, USA, June 10-13, 2014},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/VLSIC.2014.6858414},
  doi          = {10.1109/VLSIC.2014.6858414},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/KlevelandCKACCC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/VamvakosKSALBBBCCCCCDDDDGHHCKKLLMMNPPRRRSSSSWY12,
  author       = {Socrates D. Vamvakos and
                  Bendik Kleveland and
                  Dipak K. Sikdar and
                  B. K. Ahuja and
                  Haidang Lin and
                  Jayaprakash Balachandran and
                  Wignes Balakrishnan and
                  Aldo Bottelli and
                  Jawji Chen and
                  Xiaole Chen and
                  Jae Choi and
                  Jeong Choi and
                  Rajesh Chopra and
                  Sanjay Dabral and
                  Kalyan Dasari and
                  Ronald B. David and
                  Shaishav Desai and
                  Claude R. Gauthier and
                  Mahmudul Hassan and
                  Kuo{-}Chiang Hsieh and
                  Ramosan Canagasaby and
                  Jeff Kumala and
                  E. P. Kwon and
                  Ben Lee and
                  Ming Liu and
                  Gurupada Mandal and
                  Sundari Mitra and
                  Byeong Cheol Na and
                  Siddharth Panwar and
                  Jay Patel and
                  Chethan Rao and
                  Vithal Rao and
                  Richard Rouse and
                  Ritesh Saraf and
                  Subramanian Seshadri and
                  Jae{-}K. Sim and
                  Clement Szeto and
                  Alvin Wang and
                  Jason Yeung},
  title        = {A 576 Mb {DRAM} with 16-channel 10.3125Gbps serial {I/O} and 14.5
                  ns latency},
  booktitle    = {Proceedings of the 38th European Solid-State Circuit conference, {ESSCIRC}
                  2012, Bordeaux, France, September 17-21, 2012},
  pages        = {458--461},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ESSCIRC.2012.6341354},
  doi          = {10.1109/ESSCIRC.2012.6341354},
  timestamp    = {Thu, 26 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/esscirc/VamvakosKSALBBBCCCCCDDDDGHHCKKLLMMNPPRRRSSSSWY12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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