BibTeX records: Soumya Eachempati

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@article{DBLP:journals/jetc/ChenEWDXN13,
  author       = {Yung{-}Chih Chen and
                  Soumya Eachempati and
                  Chun{-}Yao Wang and
                  Suman Datta and
                  Yuan Xie and
                  Vijaykrishnan Narayanan},
  title        = {A Synthesis Algorithm for Reconfigurable Single-Electron Transistor
                  Arrays},
  journal      = {{ACM} J. Emerg. Technol. Comput. Syst.},
  volume       = {9},
  number       = {1},
  pages        = {5:1--5:20},
  year         = {2013},
  url          = {https://doi.org/10.1145/2422094.2422099},
  doi          = {10.1145/2422094.2422099},
  timestamp    = {Mon, 08 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jetc/ChenEWDXN13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jpdc/MishraYDEIVD11,
  author       = {Asit K. Mishra and
                  Aditya Yanamandra and
                  Reetuparna Das and
                  Soumya Eachempati and
                  Ravi R. Iyer and
                  Narayanan Vijaykrishnan and
                  Chita R. Das},
  title        = {{RAFT:} {A} router architecture with frequency tuning for on-chip
                  networks},
  journal      = {J. Parallel Distributed Comput.},
  volume       = {71},
  number       = {5},
  pages        = {625--640},
  year         = {2011},
  url          = {https://doi.org/10.1016/j.jpdc.2010.09.005},
  doi          = {10.1016/J.JPDC.2010.09.005},
  timestamp    = {Mon, 15 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jpdc/MishraYDEIVD11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/ChenEWDXN11,
  author       = {Yung{-}Chih Chen and
                  Soumya Eachempati and
                  Chun{-}Yao Wang and
                  Suman Datta and
                  Yuan Xie and
                  Vijaykrishnan Narayanan},
  editor       = {Leon Stok and
                  Nikil D. Dutt and
                  Soha Hassoun},
  title        = {Automated mapping for reconfigurable single-electron transistor arrays},
  booktitle    = {Proceedings of the 48th Design Automation Conference, {DAC} 2011,
                  San Diego, California, USA, June 5-10, 2011},
  pages        = {878--883},
  publisher    = {{ACM}},
  year         = {2011},
  url          = {https://doi.org/10.1145/2024724.2024920},
  doi          = {10.1145/2024724.2024920},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/ChenEWDXN11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/YanamandraESNIK10,
  author       = {Aditya Yanamandra and
                  Soumya Eachempati and
                  Niranjan Soundararajan and
                  Vijaykrishnan Narayanan and
                  Mary Jane Irwin and
                  Ramakrishnan Krishnan},
  title        = {Optimizing power and performance for reliable on-chip networks},
  booktitle    = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
                  {ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
  pages        = {431--436},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ASPDAC.2010.5419844},
  doi          = {10.1109/ASPDAC.2010.5419844},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/YanamandraESNIK10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/iet-cds/EachempatiVNM09,
  author       = {Soumya Eachempati and
                  Narayanan Vijaykrishnan and
                  Arthur Nieuwoudt and
                  Yehia Massoud},
  title        = {Predicting the performance and reliability of future field programmable
                  gate arrays routing architectures with carbon nanotube bundle interconnect},
  journal      = {{IET} Circuits Devices Syst.},
  volume       = {3},
  number       = {2},
  pages        = {64--75},
  year         = {2009},
  url          = {https://doi.org/10.1049/iet-cds.2008.0149},
  doi          = {10.1049/IET-CDS.2008.0149},
  timestamp    = {Thu, 10 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cds/EachempatiVNM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hpca/DasEMVD09,
  author       = {Reetuparna Das and
                  Soumya Eachempati and
                  Asit K. Mishra and
                  Narayanan Vijaykrishnan and
                  Chita R. Das},
  title        = {Design and evaluation of a hierarchical on-chip interconnect for next-generation
                  CMPs},
  booktitle    = {15th International Conference on High-Performance Computer Architecture
                  {(HPCA-15} 2009), 14-18 February 2009, Raleigh, North Carolina, {USA}},
  pages        = {175--186},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HPCA.2009.4798252},
  doi          = {10.1109/HPCA.2009.4798252},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/hpca/DasEMVD09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/MishraIDVED09,
  author       = {Asit K. Mishra and
                  Reetuparna Das and
                  Soumya Eachempati and
                  Ravishankar R. Iyer and
                  Narayanan Vijaykrishnan and
                  Chita R. Das},
  editor       = {David H. Albonesi and
                  Margaret Martonosi and
                  David I. August and
                  Jos{\'{e}} F. Mart{\'{\i}}nez},
  title        = {A case for dynamic frequency tuning in on-chip networks},
  booktitle    = {42st Annual {IEEE/ACM} International Symposium on Microarchitecture
                  {(MICRO-42} 2009), December 12-16, 2009, New York, New York, {USA}},
  pages        = {292--303},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1669112.1669151},
  doi          = {10.1145/1669112.1669151},
  timestamp    = {Mon, 15 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/MishraIDVED09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/nanoarch/0001EYNI09,
  author       = {Yuan Xie and
                  Soumya Eachempati and
                  Aditya Yanamandra and
                  Vijaykrishnan Narayanan and
                  Mary Jane Irwin},
  title        = {Power and area reduction using carbon nanotube bundle interconnect
                  in global clock tree distribution network},
  booktitle    = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
                  {NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
  pages        = {51--56},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/NANOARCH.2009.5226352},
  doi          = {10.1109/NANOARCH.2009.5226352},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/nanoarch/0001EYNI09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isca/ParkEDMXVD08,
  author       = {Dongkook Park and
                  Soumya Eachempati and
                  Reetuparna Das and
                  Asit K. Mishra and
                  Yuan Xie and
                  Narayanan Vijaykrishnan and
                  Chita R. Das},
  title        = {{MIRA:} {A} Multi-layered On-Chip Interconnect Router Architecture},
  booktitle    = {35th International Symposium on Computer Architecture {(ISCA} 2008),
                  June 21-25, 2008, Beijing, China},
  pages        = {251--261},
  publisher    = {{IEEE} Computer Society},
  year         = {2008},
  url          = {https://doi.org/10.1109/ISCA.2008.13},
  doi          = {10.1109/ISCA.2008.13},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/ParkEDMXVD08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/nanoarch/EachempatiSVD08,
  author       = {Soumya Eachempati and
                  Vinay Saripalli and
                  Narayanan Vijaykrishnan and
                  Suman Datta},
  title        = {Reconfigurable {BDD} based quantum circuits},
  booktitle    = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
                  2008, Anaheim, CA, USA, June 12-13, 2008},
  pages        = {61--67},
  publisher    = {{IEEE} Computer Society},
  year         = {2008},
  url          = {https://doi.org/10.1109/NANOARCH.2008.4585793},
  doi          = {10.1109/NANOARCH.2008.4585793},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/nanoarch/EachempatiSVD08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/EachempatiNGVM07,
  author       = {Soumya Eachempati and
                  Arthur Nieuwoudt and
                  Aman Gayasen and
                  Narayanan Vijaykrishnan and
                  Yehia Massoud},
  editor       = {Rudy Lauwereins and
                  Jan Madsen},
  title        = {Assessing carbon nanotube bundle interconnect for future {FPGA} architectures},
  booktitle    = {2007 Design, Automation and Test in Europe Conference and Exposition,
                  {DATE} 2007, Nice, France, April 16-20, 2007},
  pages        = {307--312},
  publisher    = {{EDA} Consortium, San Jose, CA, {USA}},
  year         = {2007},
  url          = {https://doi.org/10.1109/DATE.2007.364609},
  doi          = {10.1109/DATE.2007.364609},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/EachempatiNGVM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isvlsi/EachempatiVNM07,
  author       = {Soumya Eachempati and
                  Narayanan Vijaykrishnan and
                  Arthur Nieuwoudt and
                  Yehia Massoud},
  title        = {Impact of Process Variations on Carbon Nanotube Bundle Interconnect
                  for Future {FPGA} Architectures},
  booktitle    = {2007 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
                  2007), May 9-11, 2007, Porto Alegre, Brazil},
  pages        = {516--517},
  publisher    = {{IEEE} Computer Society},
  year         = {2007},
  url          = {https://doi.org/10.1109/ISVLSI.2007.56},
  doi          = {10.1109/ISVLSI.2007.56},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/EachempatiVNM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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