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ORCIDIEEE Design & Test, Volume 32
Volume 32, Number 1, February 2015
- André Ivanov:
Speeding Up Analog Integration and Test for Mixed-Signal SoCs. 4-5 - Rubin A. Parekhji, Kenneth Butler, Gordon W. Roberts:
Guest Editors' Introduction: Speeding Up Analog Integration and Test for Mixed-Signal SoCs. 6-8 - Antonio Anastasio Bruto da Costa, Pallab Dasgupta:
Formal Interpretation of Assertion-Based Features on AMS Designs. 9-17 - Manuel J. Barragan Asian, Gildas Léger
:
A Procedure for Alternate Test Feature Design and Selection. 18-25 - Siva Kumar Sudani, Li Xu, Degang Chen:
A Comparative Study of State-of-the-Art High-Performance Spectral Test Methods. 26-35 - Ender Yilmaz, Sule Ozev:
Adaptive-Learning-Based Importance Sampling for Analog Circuit DPPM Estimation. 36-43 - ByongChan Lim, Ji-Eun Jang, James Mao, Jaeha Kim, Mark Horowitz:
Digital Analog Design: Enabling Mixed-Signal System Validation. 44-52 - Ke Huang, Nathan Kupp, Constantinos Xanthopoulos, John M. Carulli Jr., Yiorgos Makris:
Low-Cost Analog/RF IC Testing Through Combined Intra- and Inter-Die Correlation Models. 53-60 - Vishwanath Natarajan, Aritra Banerjee, Shreyas Sen, Shyam Kumar Devarakond, Abhijit Chatterjee:
Yield Recovery of RF Transceiver Systems Using Iterative Tuning-Driven Power-Conscious Performance Optimization. 61-69 - Theo Theocharides:
Test Technology TC Newsletter. 75-76 - Peng Li:
The Art of Certifying Analog/Mixed-Signal Circuits. 79-80
Volume 32, Number 2, April 2015
- André Ivanov:
A Look at Trojan Attack, Pruning, and Dependability. 4-5 - Swaroop Ghosh, Abhishek Basak, Swarup Bhunia:
How Secure Are Printed Circuit Boards Against Trojan Attacks? 7-16 - Marco Ottavi, Salvatore Pontarelli, Dimitris Gizopoulos, Cristiana Bolchini, Maria K. Michael, Lorena Anghel, Mehdi Baradaran Tahoori, Antonis M. Paschalis, Pedro Reviriego, Oliver Bringmann, Viacheslav Izosimov, Hans A. R. Manhaeve, Christos Strydis, Said Hamdioui:
Dependable Multicore Architectures at Nanoscale: The View From Europe. 17-28 - Jacob Murray, Nghia Tang, Partha Pratim Pande, Deukhyoun Heo, Behrooz A. Shirazi:
DVFS Pruning for Wireless NoC Architectures. 29-38 - James Buczkowski, Walden C. Rhines:
The Future of Automotive Design and the Road to Get There. 40-47 - Theo Theocharides:
Test Technology TC Newsletter. 49-50 - Scott Davidson:
Getting Credit. 56
Volume 32, Number 3, June 2015
- André Ivanov:
A Look at Asynchronous Design and Photonic Network-on-a-Chip (PNoC). 4 - Steven M. Nowick, Montek Singh:
Asynchronous Design - Part 1: Overview and Recent Advances. 5-18 - Steven M. Nowick, Montek Singh:
Asynchronous Design - Part 2: Systems and Methodologies. 19-28 - Sai Vineel Reddy Chittamuru, Sudeep Pasricha:
Crosstalk Mitigation for High-Radix and Low-Diameter Photonic NoC Architectures. 29-39 - Theo Theocharides:
Test Technology TC Newsletter. 49-50 - Scott Davidson:
Time Out of Mind. 56
Volume 32, Number 4, August 2015
- André Ivanov:
Advances in 3-D Integrated Circuits, Systems, and CAD Tools. 4-5 - Dae Hyun Kim, Sung Kyu Lim:
Guest Editors' Introduction: Advances in 3-D Integrated Circuits, Systems, and CAD Tools. 6-7 - Dae Hyun Kim, Sung Kyu Lim:
Physical Design and CAD Tools for 3-D Integrated Circuits: Challenges and Opportunities. 8-22 - Guruprasad Katti, S. W. Ho, Li Hong Yu, Songbai Zhang, Rahul Dutta, Roshan Weerasekera, Ka-Fai Chang, Jong-Kai Lin, Srinivasa Rao Vempati, Surya Bhattacharya:
Fabrication and Assembly of Cu-RDL-Based 2.5-D Low-Cost Through Silicon Interposer (LC-TSI). 23-31 - Yong Han, Boon Long Lau, Boo Yang Jung, Xiaowu Zhang:
Heat Dissipation Capability of a Package-on-Package Embedded Wafer-Level Package. 32-39 - Christos Papameletis, Brion L. Keller, Vivek Chickermane, Said Hamdioui, Erik Jan Marinissen:
A DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression, Embedded Cores, and Multiple Towers. 40-48 - Dongjun Xu, Sai Manoj P. D., Kanwen Wang, Hao Yu, Ningmei Yu, Mingbin Yu:
A 2.5-D Memory-Logic Integration With Data-Pattern-Aware Memory Controller. 49-58 - Che-Wei Chou, Jin-Fu Li, Yun-Chao Yu, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou:
Hierarchical Test Integration Methodology for 3-D ICs. 59-70 - Ishan G. Thakkar, Sudeep Pasricha:
3-D WiRED: A Novel WIDE I/O DRAM With Energy-Efficient 3-D Bank Organization. 71-80 - Theo Theocharides:
Test Technology TC Newsletter. 85-86 - Scott Davidson:
A 3-D Forward into the Past. 88
Volume 32, Number 5, October 2015
- André Ivanov:
Cyber-Physplical Systems for Medical Apications. 4-5 - Paul Bogdan, Rahul Mangharam:
Guest Editors' Introduction: Cyber-Physical Systems for Medical Applications. 6-8 - James Weimer, Radoslav Ivanov, Alexander Roederer, Sanjian Chen, Insup Lee:
Parameter-Invariant Design of Medical Alarms. 9-16 - Margarida M. Silva, Alexander Medvedev, Torbjörn Wigren, Teresa Mendonça:
Modeling the Effect of Intravenous Anesthetics: A Path Toward Individualization. 17-26 - Zhenqi Huang, Chuchu Fan, Alexandru Mereacre, Sayan Mitra, Marta Z. Kwiatkowska:
Simulation-Based Verification of Cardiac Pacemakers With Guaranteed Coverage. 27-34 - Marilyn Wolf, Mihaela van der Schaar, Honggab Kim, Jie Xu:
Caring Analytics for Adults With Special Needs. 35-44 - Alan Wassyng, Neeraj Kumar Singh, Mischa Geven, Nicholas Proscia, Hao Wang, Mark Lawford, Tom Maibaum:
Can Product-Specific Assurance Case Templates Be Used as Medical Device Standards? 45-55 - Arnab Ray, Rance Cleaveland:
Security Assurance Cases for Medical Cyber-Physical Systems. 56-65 - Anitha Murugesan, Sanjai Rayadurgam, Michael W. Whalen, Mats Per Erik Heimdahl:
Design Considerations for Modeling Modes in Cyber-Physical Systems. 66-73 - Brian R. Larson, Yi Zhang, Stephen C. Barrett, John Hatcliff, Paul L. Jones:
Enabling Safe Interoperation by Medical Device Virtual Integration. 74-88 - Suren Kumar, Pankaj Singhal, Venkat N. Krovi:
Computer-Vision-Based Decision Support in Surgical Robotics. 89-97 - Marco Beccani, Hakan Tunc, Addisu Taddese, Ekawahyu Susilo, Péter Völgyesi, Ákos Lédeczi, Pietro Valdastri:
Systematic Design of Medical Capsule Robots. 98-108 - Theo Theocharides:
Test Technology TC Newsletter. 115-116 - Insup Lee:
Medical Cyber-Physical Systems: The Early Years. 119-120
Volume 32, Number 6, December 2015
- André Ivanov:
Microfluidics: Design and Test Solutions for Enabling Biochemistry on a Chip. 4-5 - Tsung-Yi Ho, Bhargab B. Bhattacharya:
Guest Editors' Introduction: Microfluidics: Design and Test Solutions for Enabling Biochemistry on a Chip. 6-7 - Paul Pop, Ismail Emre Araci, Krishnendu Chakrabarty:
Continuous-Flow Biochips: Technology, Physical-Design Methods, and Testing. 8-19 - Yehya H. Ghallab, Hamdy Abd Elhamid, Yehea Ismail:
Lab on a Chip Based on CMOS Technology: System Architectures, Microfluidic Packaging, and Challenges. 20-31 - Xiwei Huang, Hao Yu, Xu Liu, Yu Jiang, Mei Yan:
A Single-Frame Superresolution Algorithm for Lab-on-a-Chip Lensless Microfluidic Imaging. 32-40 - Robert Wille, Oliver Keszöcze, Rolf Drechsler, Tobias Boehnisch, Alexander Kroker:
Scalable One-Pass Synthesis for Digital Microfluidic Biochips. 41-50 - Jeffrey McDaniel, Brian Crites, Philip Brisk, William H. Grover:
Flow-Layer Physical Design for Microchips Based on Monolithic Membrane Valves. 51-59 - Hailong Yao, Qin Wang, Yizhong Ru, Yici Cai, Tsung-Yi Ho:
Integrated Flow-Control Codesign Methodology for Flow-Based Microfluidic Biochips. 60-68 - Tsun-Ming Tseng, Bing Li, Ulf Schlichtmann, Tsung-Yi Ho:
Storage and Caching: Synthesis of Flow-Based Microfluidic Biochips. 69-75 - Martin Barnasconi, Manfred Dietrich, Karsten Einwich, Thilo Vörtler, Jean-Paul Chaput, Marie-Minerve Louërat, François Pêcheux, Zhi Wang, Philippe Cuenot, Ingmar Neumann, Thang Nguyen, Ronan Lucas, Emmanuel Vaumorin:
UVM-SystemC-AMS Framework for System-Level Verification and Validation of Automotive Use Cases. 76-86 - Makoto Nagata, Satoshi Takaya, Hiroaki Ikeda:
In-Place Signal and Power Noise Waveform Capturing Within 3-D Chip Stacking. 87-98 - Theo Theocharides:
Test Technology TC Newsletter. 110-111 - Scott Davidson:
Chips That Do Things. 112
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