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SIGARCH Computer Architecture News 28(5) 2000, SIGOPS Operating Systems Review 34(5) 2000, SIGPLAN Notices 35(11) 2000

• 
  Steven W. Schlosser, John Linwood Griffin, David Nagle, Gregory R. Ganger:
  Designing computer systems with MEMS-based storage. 1-12
• 
  Kourosh Gharachorloo, Madhu Sharma, Simon Steely, Stephen Van Doren:
  Architecture and design of AlphaServer GS320. 13-24
• 
  Milo M. K. Martin, Daniel J. Sorin, Anastassia Ailamaki, Alaa R. Alameldeen, Ross M. Dickson, Carl J. Mauer, Kevin E. Moore, Manoj Plakal, Mark D. Hill, David A. Wood:
  Timestamp snooping: an approach for extending SMPs. 25-36

• 
  Ashwini K. Nanda, Kwok-Ken Mak, Krishnan Sugavanam, Ramendra K. Sahoo, Vijayaraghavan Soundararajan, T. Basil Smith:
  MemorIES: A Programmable, Real-Time Hardware Emulation Tool for Multiprocessor Server Design. 37-48
• 
  Jeff Gibson, Robert Kunz, David Ofelt, Mark A. Heinrich:
  FLASH vs. (Simulated) FLASH: Closing the Simulation Loop. 49-58
• 
  Andy Chou, Benjamin Chelf, Dawson R. Engler, Mark A. Heinrich:
  Using Meta-level Compilation to Check FLASH Protocol Code. 59-70

• 
  Raoul Bhoedjang, Kees Verstoep, Tim Rühl, Henri E. Bal, Rutger F. H. Hofman:
  Evaluating Design Alternatives for Reliable Communication on High-Speed Networks. 71-81
• 
  Peter R. Mattson, William J. Dally, Scott Rixner, Ujval J. Kapasi, John D. Owens:
  Communication Scheduling. 82-92
• 
  Jason L. Hill, Robert Szewczyk, Alec Woo, Seth Hollar, David E. Culler, Kristofer S. J. Pister:
  System Architecture Directions for Networked Sensors. 93-104

• 
  Alvin R. Lebeck, Xiaobo Fan, Heng Zeng, Carla Schlatter Ellis:
  Power Aware Page Allocation. 105-116
• 
  Emery D. Berger, Kathryn S. McKinley, Robert D. Blumofe, Paul R. Wilson:
  Hoard: A Scalable Memory Allocator for Multithreaded Applications. 117-128
• 
  Krisztián Flautner, Richard Uhlig, Steven K. Reinhardt, Trevor N. Mudge:
  Thread Level Parallelism and Interactive Performance of Desktop Applications. 129-138

• 
  Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani:
  Effective Null Pointer Check Elimination Utilizing Hardware Trap. 139-149
• 
  Youtao Zhang, Jun Yang, Rajiv Gupta:
  Frequent Value Locality and Value-Centric Data Cache Design. 150-159
• 
  Michael Burrows, Úlfar Erlingsson, Shun-Tak Leung, Mark T. Vandevoorde, Carl A. Waldspurger, Kip Walker, William E. Weihl:
  Efficient and Flexible Value Sampling. 160-167

• 
  David Lie, Chandramohan A. Thekkath, Mark Mitchell, Patrick Lincoln, Dan Boneh, John C. Mitchell, Mark Horowitz:
  Architectural Support for Copy and Tamper Resistant Software. 168-177
• 
  Jerome Burke, John McDonald, Todd M. Austin:
  Architectural Support for Fast Symmetric-Key Cryptography. 178-189
• 
  John Kubiatowicz, David Bindel, Yan Chen, Steven E. Czerwinski, Patrick R. Eaton, Dennis Geels, Ramakrishna Gummadi, Sean C. Rhea, Hakim Weatherspoon, Westley Weimer, Chris Wells, Ben Y. Zhao:
  OceanStore: An Architecture for Global-Scale Persistent Storage. 190-201

• 
  Evelyn Duesterwald, Vasanth Bala:
  Software Profiling for Hot Path Prediction: Less is More. 202-211
• 
  Rumi Zahir, Jonathan Ross, Dale Morris, Drew Hess:
  OS and Compiler Considerations in the Design of the IA-64 Architecture. 212-221
• 
  Daniel A. Connors, Hillery C. Hunter, Ben-Chung Cheng, Wen-mei W. Hwu:
  Hardware Support for Dynamic Management of Compiler-Directed Computation Reuse. 222-233

• 
  Allan Snavely, Dean M. Tullsen:
  Symbiotic Jobscheduling for a Simultaneous Multithreading Processor. 234-244
• 
  Joshua Redstone, Susan J. Eggers, Henry M. Levy:
  An Analysis of Operating System Behavior on a Simultaneous Multithreaded Architecture. 245-256
• 
  Karthik Sundaramoorthy, Zachary Purser, Eric Rotenberg:
  Slipstream Processors: Improving both Performance and Fault Tolerance. 257-268

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last updated on 2024-05-10 20:03 CEST by the dblp team

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